Commit Graph

24011 Commits

Author SHA1 Message Date
Krzysztof Kozlowski
aaed15efce ARM: dts: qcom: use dedicated QFPROM compatibles
Use dedicated compatibles for QFPROM on APQ8064, IPQ8064 and MSM9874,
which is expected by the bindings.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220505113802.243301-2-krzysztof.kozlowski@linaro.org
2022-06-29 22:20:47 -05:00
Ansuel Smith
eb9e939377 ARM: dts: qcom: replace gcc PXO with pxo_board fixed clock
Replace gcc PXO phandle to pxo_board fixed clock declared in the dts.
gcc driver doesn't provide PXO_SRC as it's a fixed-clock. This cause a
kernel panic if any driver actually try to use it.

Fixes: 40cf5c884a ("ARM: dts: qcom: add L2CC and RPM for IPQ8064")
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430055118.1947-2-ansuelsmth@gmail.com
2022-06-29 22:10:40 -05:00
Krzysztof Kozlowski
eea939a0da ARM: dts: qcom: add missing gpio-ranges in PMIC GPIOs
The new Qualcomm PMIC GPIO bindings require gpio-ranges property:

  qcom-sdx55-telit-fn980-tlb.dtb: gpio@c000: 'gpio-ranges' is a required property

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220508135932.132378-5-krzysztof.kozlowski@linaro.org
2022-06-27 16:42:50 -05:00
Krzysztof Kozlowski
255889f4ba ARM: dts: qcom: pmx65: add fallback compatible to PMIC GPIO
The bindings require all PMIC GPIO nodes to have two compatibles -
specific followed by SPMI or SSBI fallback.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220507194913.261121-12-krzysztof.kozlowski@linaro.org
2022-06-27 16:40:47 -05:00
Krzysztof Kozlowski
dc590cdc31 ARM: dts: qcom: mdm9615: add missing PMIC GPIO reg
'reg' property is required in SSBI children:
  qcom-mdm9615-wp8548-mangoh-green.dtb: gpio@150: 'reg' is a required property

Fixes: 2c5e596524 ("ARM: dts: Add MDM9615 dtsi")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220507194913.261121-11-krzysztof.kozlowski@linaro.org
2022-06-27 16:40:47 -05:00
Krzysztof Kozlowski
4fcdaf4b03 ARM: dts: qcom: align PMIC GPIO pin configuration with DT schema
DT schema expects PMIC GPIO pin configuration nodes to be named with
'-state' suffix.  Optional children should be either 'pinconf' or
followed with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220507194913.261121-10-krzysztof.kozlowski@linaro.org
2022-06-27 16:40:47 -05:00
Rohit Agarwal
39eebfce4b ARM: dts: qcom: sdx65: Add Watchdog support
Enable Watchdog support for Application Processor Subsystem (APSS) block
on SDX65 platform.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1654080312-5408-11-git-send-email-quic_rohiagar@quicinc.com
2022-06-27 16:12:04 -05:00
Rohit Agarwal
df6d7b86f4 ARM: dts: qcom: sdx65: Add pshold support
Add support for pshold block to drive pshold towards the PMIC, which is
used to trigger a configurable event such as reboot or poweroff of the
SDX65 platform.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1654080312-5408-12-git-send-email-quic_rohiagar@quicinc.com
2022-06-27 16:10:59 -05:00
Rohit Agarwal
aae0f5314f ARM: dts: qcom: sdx65-mtp: Enable modem
Enable modem on SDX65 MTP board.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1654080312-5408-8-git-send-email-quic_rohiagar@quicinc.com
2022-06-27 16:10:59 -05:00
Rohit Agarwal
a3ae01ed96 ARM: dts: qcom: sdx65: Add Modem remoteproc node
Add modem support to SDX65 using the PAS remoteproc driver.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1654080312-5408-7-git-send-email-quic_rohiagar@quicinc.com
2022-06-27 16:10:58 -05:00
Rohit Agarwal
261e09b4e3 ARM: dts: qcom: sdx65: Add SCM node
Add SCM node to enable SCM functionality on SDX65 platform.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1654080312-5408-6-git-send-email-quic_rohiagar@quicinc.com
2022-06-27 16:10:58 -05:00
Rohit Agarwal
69117a2abf ARM: dts: qcom: sdx65: Add IMEM and PIL info region
Add a simple-mfd representing IMEM on SDX65 and define the PIL
relocation info region, so that post mortem tools will be able to locate
the loaded remoteproc.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1654080312-5408-4-git-send-email-quic_rohiagar@quicinc.com
2022-06-27 16:10:34 -05:00
Rohit Agarwal
7f928c7358 ARM: dts: qcom: sdx65: Add modem SMP2P node
Add SMP2P nodes for the SDX65 platform to communicate with the modem.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1654080312-5408-3-git-send-email-quic_rohiagar@quicinc.com
2022-06-27 16:10:34 -05:00
Rohit Agarwal
b427679adc ARM: dts: qcom: sdx65: Add CPUFreq support
Add CPUFreq support to SDX65 platform using the cpufreq-dt driver.
There is no dedicated hardware block available on this platform to
carry on the CPUFreq duties. Hence, it is accomplished using the CPU
clock and regulators tied together by the operating points table.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1654080312-5408-2-git-send-email-quic_rohiagar@quicinc.com
2022-06-27 16:10:33 -05:00
Kaushal Kumar
59e73f67e1 ARM: dts: qcom: sdx65-mtp: Enable QPIC NAND support
Enable QPIC NAND devicetree node for Qualcomm SDX65-MTP board.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1651511286-18690-5-git-send-email-quic_kaushalk@quicinc.com
2022-06-27 16:08:49 -05:00
Kaushal Kumar
eae61fddd6 ARM: dts: qcom: sdx65-mtp: Enable QPIC BAM support
Enable QPIC BAM devicetree node for Qualcomm SDX65-MTP board.
While at it, sort the blsp1_uart3 node in alphabetical order
and set it's status as "okay".

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1651511286-18690-4-git-send-email-quic_kaushalk@quicinc.com
2022-06-27 16:08:49 -05:00
Kaushal Kumar
0ec15b6f76 ARM: dts: qcom: sdx65: Add QPIC NAND support
Add devicetree node to enable support for QPIC
NAND controller on Qualcomm SDX65 platform.
Since there is no "aon" clock in SDX65, a dummy
clock is provided.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1651511286-18690-3-git-send-email-quic_kaushalk@quicinc.com
2022-06-27 16:08:49 -05:00
Kaushal Kumar
ab11b74d87 ARM: dts: qcom: sdx65: Add QPIC BAM support
Add devicetree node to enable support for QPIC
BAM DMA controller on Qualcomm SDX65 platform.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1651511286-18690-2-git-send-email-quic_kaushalk@quicinc.com
2022-06-27 16:08:49 -05:00
Rohit Agarwal
eeaec4f2b9 ARM: dts: qcom: sdx65-mtp: Enable USB3 and PHY support
Enable the support for USB3 controller, QMP PHY and HS PHY on SDX65 MTP.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1651482395-29443-5-git-send-email-quic_rohiagar@quicinc.com
2022-06-27 16:08:03 -05:00
Rohit Agarwal
fbb6447deb ARM: dts: qcom: sdx65: Add USB3 and PHY support
Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and
SNPS HS PHY on SDX65.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1651482395-29443-4-git-send-email-quic_rohiagar@quicinc.com
2022-06-27 16:08:03 -05:00
Rohit Agarwal
b456b5e7d1 ARM: dts: qcom: sdx65: Add interconnect nodes
Add interconnect devicetree nodes in SDX65 platform.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
[bjorn: Sorted nodes]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1651482395-29443-2-git-send-email-quic_rohiagar@quicinc.com
2022-06-27 16:07:55 -05:00
Rohit Agarwal
e378b96533 ARM: dts: qcom: sdx65: Add Shared memory manager support
Add smem node to support shared memory manager on SDX65 platform.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1651480665-14978-5-git-send-email-quic_rohiagar@quicinc.com
2022-06-27 16:02:11 -05:00
Linus Torvalds
54c2cc7919 Merge tag 'usb-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB / Thunderbolt updates from Greg KH:
 "Here is the "big" set of USB and Thunderbolt driver changes for
  5.18-rc1. For the most part it's been a quiet development cycle for
  the USB core, but there are the usual "hot spots" of development
  activity.

  Included in here are:

   - Thunderbolt driver updates:
       - fixes for devices without displayport adapters
       - lane bonding support and improvements
       - other minor changes based on device testing

   - dwc3 gadget driver changes.

     It seems this driver will never be finished given that the IP core
     is showing up in zillions of new devices and each implementation
     decides to do something different with it...

   - uvc gadget driver updates as more devices start to use and rely on
     this hardware as well

   - usb_maxpacket() api changes to remove an unneeded and unused
     parameter.

   - usb-serial driver device id updates and small cleanups

   - typec cleanups and fixes based on device testing

   - device tree updates for usb properties

   - lots of other small fixes and driver updates.

  All of these have been in linux-next for weeks with no reported
  problems"

* tag 'usb-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (154 commits)
  USB: new quirk for Dell Gen 2 devices
  usb: dwc3: core: Add error log when core soft reset failed
  usb: dwc3: gadget: Move null pinter check to proper place
  usb: hub: Simplify error and success path in port_over_current_notify
  usb: cdns3: allocate TX FIFO size according to composite EP number
  usb: dwc3: Fix ep0 handling when getting reset while doing control transfer
  usb: Probe EHCI, OHCI controllers asynchronously
  usb: isp1760: Fix out-of-bounds array access
  xhci: Don't defer primary roothub registration if there is only one roothub
  USB: serial: option: add Quectel BG95 modem
  USB: serial: pl2303: fix type detection for odd device
  xhci: Allow host runtime PM as default for Intel Alder Lake N xHCI
  xhci: Remove quirk for over 10 year old evaluation hardware
  xhci: prevent U2 link power state if Intel tier policy prevented U1
  xhci: use generic command timer for stop endpoint commands.
  usb: host: xhci-plat: omit shared hcd if either root hub has no ports
  usb: host: xhci-plat: prepare operation w/o shared hcd
  usb: host: xhci-plat: create shared hcd after having added main hcd
  xhci: prepare for operation w/o shared hcd
  xhci: factor out parts of xhci_gen_setup()
  ...
2022-06-03 11:17:49 -07:00
Arnd Bergmann
8eecf1c992 Merge tag 'socfpga_dts_updates_for_v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/late
SoCFPGA dts updates for v5.19
- dtschema fix SPI NOR node
- correct dt-bindings doc for Altera gpio driver
- add support for n6000 Agilex platform and dt-bindings documentation

* tag 'socfpga_dts_updates_for_v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: intel: add device tree for n6000
  dt-bindings: intel: add binding for Intel n6000
  dt-bindings: soc: add bindings for Intel HPS Copy Engine
  dt-bindings: gpio: altera: correct interrupt-cells
  ARM: dts: socfpga: align SPI NOR node name with dtschema

Link: https://lore.kernel.org/r/20220519232317.16079-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-30 11:00:02 +02:00
Arnd Bergmann
725523dd36 Merge tag 'aspeed-5.19-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/late
ASPEED device tree updates for 5.19

 - New machine:

    * Nuvia's DC-SCM BMC

 - Enable AST2600 GFX, the BMC-driven graphics device

 - Add a bunch of devices for the AST2600 EVB

 - Updates to the AST2600 Bletchley machine

 - Backwards compatible changes to support the new spi-mem based SPI NOR
   driver

* tag 'aspeed-5.19-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
  ARM: dts: aspeed: ast2600-evb: Enable GFX device
  ARM: dts: aspeed: Add GFX node to AST2600
  ARM: dts: aspeed: ast2600-evb: Enable virtual hub
  ARM: dts: aspeed: ast2600-evb: Enable video engine
  ARM: dts: aspeed: everest, rainier: Add power-ffs-sync-history GPIO
  ARM: dts: aspeed: Add Nuvia DC-SCM BMC
  ARM: dts: aspeed: bletchley: add sample averaging for ADM1278
  ARM: dts: aspeed: bletchley: add eeprom node on each sled
  ARM: dts: aspeed: bletchley: add pca9536 node on each sled
  ARM: dts: aspeed: bletchley: update gpio0 line names
  ARM: dts: aspeed: bletchley: Enable mdio0 bus
  ARM: dts: aspeed: bletchley: switch spi2 driver to aspeed-smc
  ARM: dts: aspeed: bletchley: enable ehci0 device node
  ARM: dts: aspeed: Add USB2.0 device controller node
  ARM: dts: aspeed-g4: Set spi-max-frequency for all flashes
  ARM: dts: aspeed: Enable Dual SPI RX transfers
  ARM: dts: aspeed: Adjust "reg" property of FMC/SPI controllers
  ARM: dts: aspeed: ast2600-evb: Enable RX delay for MAC0/MAC1

Link: https://lore.kernel.org/r/CACPK8XfUmFxU8Y6C+aZ2+=dT7=fCfs2=2_aYqyRjoXCoeQaUWQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-30 10:59:42 +02:00
Arnd Bergmann
440517772b Merge tag 'v5.19-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/late
Amba and clock fixes to conform better to actual dt-bindings.

* tag 'v5.19-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add clocks property to cru node rk3228
  ARM: dts: rockchip: add clocks property to cru node rk3036
  ARM: dts: rockchip: add clocks property to cru node rk3066a/rk3188
  ARM: dts: rockchip: add clocks property to cru node rk3288
  ARM: dts: rockchip: Remove "amba" bus nodes from rv1108
  ARM: dts: rockchip: add clocks property to cru node rv1108

Link: https://lore.kernel.org/r/4798587.jE0xQCEvom@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-27 22:20:32 +02:00
Johan Jonker
840fc447d7 ARM: dts: rockchip: add clocks property to cru node rk3228
Add clocks and clock-names to the rk3228 cru node, because
the device has to have at least one input clock.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220330121923.24240-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-05-27 19:27:00 +02:00
Johan Jonker
8dd85bffc5 ARM: dts: rockchip: add clocks property to cru node rk3036
Add clocks and clock-names to the rk3036 cru node, because
the device has to have at least one input clock.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220330114847.18633-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-05-27 19:27:00 +02:00
Johan Jonker
25f417b563 ARM: dts: rockchip: add clocks property to cru node rk3066a/rk3188
Add clocks property to rk3066a/rk3188 cru node to fix warnings like:
'clocks' is a dependency of 'assigned-clocks'

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220329111323.3569-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-05-27 19:27:00 +02:00
Johan Jonker
9d66847be3 ARM: dts: rockchip: add clocks property to cru node rk3288
Add clocks property to rk3288 cru node to fix warnings like:
'clocks' is a dependency of 'assigned-clocks'.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220329113657.4567-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-05-27 19:27:00 +02:00
Johan Jonker
e8cead54a6 ARM: dts: rockchip: Remove "amba" bus nodes from rv1108
The "amba" bus nodes wrapping all the DMA-330 nodes serve no useful
purpose, and certainly bear no relation at all to the actual underlying
interconnect topology. They appear to be cargo-cult copying from a
design misstep in the very early days of FDT adoption on ARM, which was
righted with the "arm,primecell" compatible, and the last trace of the
idea finally purged by commit 2ef7d5f342 ("ARM, ARM64: dts: drop
"arm,amba-bus" in favor of "simple-bus"").

As such, they can simply be removed and the DMA-330 nodes fitted into
the normal sort order.
The node names should be generic, so rename it to "dma-controller".

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220330131608.30040-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-05-27 19:27:00 +02:00
Johan Jonker
f7230dcfb4 ARM: dts: rockchip: add clocks property to cru node rv1108
Add clocks and clock-names to the rv1108 cru node, because
the device has to have at least one input clock.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220330131608.30040-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-05-27 19:27:00 +02:00
Krzysztof Kozlowski
22a798d7b2 ARM: dts: da850: use new 'dma-channels' property
The '#dma-channels' property was deprecated in favor of one defined by
generic dma-common DT bindings.  Add new property while keeping old one
for backwards compatibility.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220516142857.6419-3-krzysztof.kozlowski@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-27 16:07:34 +02:00
Krzysztof Kozlowski
286b807354 ARM: dts: pxa: use new 'dma-channels/requests' properties
The '#dma-channels' and '#dma-requests' properties were deprecated in
favor of these defined by generic dma-common DT bindings.  Add new
properties while keeping old ones for backwards compatibility.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220516142857.6419-2-krzysztof.kozlowski@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-27 16:07:34 +02:00
Arnd Bergmann
2ef306e16e Merge tag 'at91-dt-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/late
AT91 DT #2 for 5.19:

- at91: more DT compliance updates for RTC and RTT nodes
- at91: sama7g5: add microphone support

* tag 'at91-dt-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sama7g5ek: add node for PDMC0
  ARM: dts: at91: sama7g5: add nodes for PDMC
  ARM: dts: at91: Use the generic "rtc" node name for the rtt IPs
  ARM: dts: at91: Add the required 'atmel, rtt-rtc-time-reg' property

Link: https://lore.kernel.org/r/20220517153252.92393-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-27 15:56:49 +02:00
Arnd Bergmann
3e11194631 Merge branch 'hpe/gxp-soc' into arm/late
Patch series from Nick Hawkins:

"The GXP is the HPE BMC SoC that is used in the majority of HPE current
 generation servers. Traditionally the asic will last multiple
 generations of server before being replaced.

 Info about SoC:

  HPE GXP is the name of the HPE Soc. This SoC is used to implement many
  BMC features at HPE. It supports ARMv7 architecture based on the Cortex
  A9 core. It is capable of using an AXI bus to which a memory controller
  is attached. It has multiple SPI interfaces to connect boot flash and
  BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It has
  multiple i2c engines to drive connectivity with a host infrastructure.
  The initial patches enable the watchdog and timer enabling the host to
  be able to boot."

* hpe/gxp-soc:
  MAINTAINERS: Introduce HPE GXP Architecture
  ARM: dts: Introduce HPE GXP Device tree
  dt-bindings: arm: hpe: add GXP Support
  dt-bindings: timer: hpe,gxp-timer: Add HPE GXP Timer and Watchdog
  clocksource/drivers/timer-gxp: Add HPE GXP Timer
  watchdog: hpe-wdt: Introduce HPE GXP Watchdog
  ARM: configs: multi_v7_defconfig: Add HPE GXP ARCH
  ARM: hpe: Introduce the HPE GXP architecture

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-27 15:55:37 +02:00
Linus Torvalds
ae86218328 Merge tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM DT updates from Arnd Bergmann:
 "There are 40 branches this time, adding a lot of new hardware support,
  and cleanups. Krzysztof Kozlowski continues his treewide cleanups.

  There are a number of new SoCs, all of them as part of existing
  families, and typically added along with a reference board:

   - Renesas RZ/G2UL (R9A07G043) is the single-core version of the
     RZ/G2L general-purpose MPU.

   - Renesas RZ/V2M (R9A09G011) is a smart camera SoC

   - Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76
     cores and deep learning accerlation.

   - Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7
     and dual Wifi-6.

   - Corstone1000 is a generic platform from Arm that is used for
     designing custom SoCs, the support for now is for the Fixed Virtual
     Platform emulation for it.

   - Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in
     upcoming Chromebooks.

   - NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first
     MMU-less SoC to be added in a while

  New machines based on already supported SoCs this time are mainly for
  32-bit platforms and include:

   - Two wireless routers based on Broadcom bcm4708

   - 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly
     for the industrial embedded market, and on NXP LS1021A based IOT
     board.

   - Two ethernet switches based on Microchip LAN966

   - Eight Qualcomm Snapdragon based machines, including a smartwatch, a
     Chromebook board and some phones

   - Another phone based on the old ST-Ericsson Ux500 platform

   - Seven STM32MP1 based boards

   - Four single-board computers based on Rockchip RK3566/RK3568"

* tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (791 commits)
  ARM: dts: kswitch-d10: enable networking
  ARM: dts: lan966x: add switch node
  ARM: dts: lan966x: add serdes node
  ARM: dts: lan966x: add reset switch reset node
  ARM: dts: lan966x: add MIIM nodes
  ARM: dts: lan966x: add hwmon node
  ARM: dts: lan966x: add basic Kontron KSwitch D10 support
  ARM: dts: lan966x: add flexcom I2C nodes
  ARM: dts: lan966x: add flexcom SPI nodes
  ARM: dts: lan966x: add all flexcom usart nodes
  ARM: dts: lan966x: add missing uart DMA channel
  ARM: dts: lan966x: add sgpio node
  ARM: dts: lan966x: swap dma channels for crypto node
  ARM: dts: lan966x: rename pinctrl nodes
  ARM: dts: at91: sama7g5: remove interrupt-parent from gic node
  ARM: dts: at91: use generic node name for dataflash
  ARM: dts: turris-omnia: Add atsha204a node
  arm64: dts: mt8192: Follow binding order for SCP registers
  arm64: dts: mediatek: add mtk-snfi for mt7622
  arm64: dts: mediatek: mt8195-demo: enable uart1
  ...
2022-05-26 10:28:12 -07:00
Jakub Kicinski
d7e6f58360 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
drivers/net/ethernet/mellanox/mlx5/core/main.c
  b33886971d ("net/mlx5: Initialize flow steering during driver probe")
  40379a0084 ("net/mlx5_fpga: Drop INNOVA TLS support")
  f2b41b32cd ("net/mlx5: Remove ipsec_ops function table")
https://lore.kernel.org/all/20220519040345.6yrjromcdistu7vh@sx1/
  16d42d3133 ("net/mlx5: Drain fw_reset when removing device")
  8324a02c34 ("net/mlx5: Add exit route when waiting for FW")
https://lore.kernel.org/all/20220519114119.060ce014@canb.auug.org.au/

tools/testing/selftests/net/mptcp/mptcp_join.sh
  e274f71540 ("selftests: mptcp: add subflow limits test-cases")
  b6e074e171 ("selftests: mptcp: add infinite map testcase")
  5ac1d2d634 ("selftests: mptcp: Add tests for userspace PM type")
https://lore.kernel.org/all/20220516111918.366d747f@canb.auug.org.au/

net/mptcp/options.c
  ba2c89e0ea ("mptcp: fix checksum byte order")
  1e39e5a32a ("mptcp: infinite mapping sending")
  ea66758c17 ("tcp: allow MPTCP to update the announced window")
https://lore.kernel.org/all/20220519115146.751c3a37@canb.auug.org.au/

net/mptcp/pm.c
  95d6865178 ("mptcp: fix subflow accounting on close")
  4d25247d3a ("mptcp: bypass in-kernel PM restrictions for non-kernel PMs")
https://lore.kernel.org/all/20220516111435.72f35dca@canb.auug.org.au/

net/mptcp/subflow.c
  ae66fb2ba6 ("mptcp: Do TCP fallback on early DSS checksum failure")
  0348c690ed ("mptcp: add the fallback check")
  f8d4bcacff ("mptcp: infinite mapping receiving")
https://lore.kernel.org/all/20220519115837.380bb8d4@canb.auug.org.au/

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-19 11:23:59 -07:00
Joel Stanley
8dc7aa0a72 ARM: dts: aspeed: ast2600-evb: Enable GFX device
Enable the GFX device with a framebuffer memory region.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Tommy Haung <tommy_huang@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220302024930.18758-3-tommy_huang@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19 17:18:56 +09:30
Joel Stanley
4fa40bfa25 ARM: dts: aspeed: Add GFX node to AST2600
The GFX device is present in the AST2600 SoC.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Tommy Haung <tommy_huang@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220302024930.18758-2-tommy_huang@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19 17:18:56 +09:30
Howard Chiu
0ef77237c5 ARM: dts: aspeed: ast2600-evb: Enable virtual hub
Enable Aspeed VHub for HID emulation

Signed-off-by: Howard Chiu <howard_chiu@aspeedtech.com>
Link: https://lore.kernel.org/r/SG2PR06MB23155E8A6193118544A7DBF3E61E9@SG2PR06MB2315.apcprd06.prod.outlook.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19 17:14:20 +09:30
Howard Chiu
08daf2c891 ARM: dts: aspeed: ast2600-evb: Enable video engine
Enable video engine and reserve memory for it.

Signed-off-by: Howard Chiu <howard_chiu@aspeedtech.com>
Link: https://lore.kernel.org/r/SG2PR06MB23159B914BF7EF937FEDD2B5E61E9@SG2PR06MB2315.apcprd06.prod.outlook.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19 17:13:25 +09:30
Brandon Wyman
f6b6795004 ARM: dts: aspeed: everest, rainier: Add power-ffs-sync-history GPIO
The IBM Everest and Rainier systems have a GPIO line that goes to the
power supplies. It has a dual function: 1) Fans Full Speed, and 2) Sync
input history.

Signed-off-by: Brandon Wyman <bjwyman@gmail.com>
Link: https://lore.kernel.org/r/20220421213638.1151193-1-bjwyman@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19 17:12:52 +09:30
Graeme Gregory
7b46aa7c00 ARM: dts: aspeed: Add Nuvia DC-SCM BMC
Add initial version of device tree for Nuvia DC-SCM BMC which is
equipped with Aspeed AST2600 BMC SoC.

Signed-off-by: Graeme Gregory <quic_ggregory@quicinc.com>
Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Link: https://lore.kernel.org/r/20220325190247.468079-1-quic_jaehyoo@quicinc.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19 17:08:10 +09:30
Potin Lai
244839d0fe ARM: dts: aspeed: bletchley: add sample averaging for ADM1278
set number of sample averaging to 128 for both PWR_AVG and VI_AVG

Signed-off-by: Potin Lai <potin.lai@quantatw.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20220418094827.6185-1-potin.lai@quantatw.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19 17:05:19 +09:30
Potin Lai
8c9e374387 ARM: dts: aspeed: bletchley: add eeprom node on each sled
Add eeprom (24c26) on each sled for storing sled fru information.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-7-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19 16:57:45 +09:30
Potin Lai
9495c6d570 ARM: dts: aspeed: bletchley: add pca9536 node on each sled
Add an ioexp node on each sled baseed on DVT schematic, address at 0x41.

P0: SLEDX_SWD_MUX
P1: SLEDX_XRES_SWD_N
P2: SLEDX_CLKREQ_N
P3: SLEDX_PCIE_PWR_EN

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-6-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19 16:57:45 +09:30
Potin Lai
60280a214a ARM: dts: aspeed: bletchley: update gpio0 line names
Update GPIO line names based on DVT schematic

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-5-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19 16:57:45 +09:30
Potin Lai
86ec3af52d ARM: dts: aspeed: bletchley: Enable mdio0 bus
Enable mdio0 bus based on DVT schematic.

TODO: Add Marvell 88E6191 Switch

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-4-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19 16:57:45 +09:30
Potin Lai
cc82dc2673 ARM: dts: aspeed: bletchley: switch spi2 driver to aspeed-smc
Due to DVT schematic has stable spi signal, switch back to aspeed-smc
driver for improving performance.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-3-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19 16:57:44 +09:30