AMD EthanolX CRB uses 2-byte POST codes which are sent to ports 0x80/0x81.
Currently ASPEED controller snoops only 0x80 port and therefore captures
only the lower byte of each POST code.
Enable secondary LPC snooping address to capture the higher byte of POST
codes.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210127182326.424-1-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
The Ebang EBAZ4205 is a simple board based on the Xilinx Zynq-7000 SoC.
Its features are:
- one serial port
- 256 MB RAM
- 128 MB NAND flash
- SDcard slot
- IP101GA 10/100 Mbit Ethernet PHY (connected to PL IOs)
- two LEDs (connected to PL IOs)
- one Push Button (connect to PL IOs)
- (optional) RTC
- (optional) Input voltage supervisor
The NAND flash is not supported in mainline linux yet. Unfortunately,
the PHY is connected via the PL, thus for working ethernet the FPGA has
to be configured. Also, depending on the board variant, the PHY has no
external crystal and its clock needs to be driven by the PL. FCLK3 is
used for this and is kept enabled.
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20210120194033.26970-4-michael@walle.cc
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fixed indices for mmc nodes; removal of obsolete amba bus nodes;
addition of nand flash controller odes to rk3036, rk2928, rv1108;
gpu node for rk3288-miqi and some cleanups to make dtbscheck happier.
* tag 'v5.12-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: assign a fixed index to mmc devices on rv1108 boards
ARM: dts: rockchip: assign a fixed index to mmc devices on rk322x boards
ARM: dts: rockchip: Remove bogus "amba" bus nodes
ARM: dts: rockchip: Add NFC node for RK3036 SoC
ARM: dts: rockchip: Add NFC node for RK2928 and other SoCs
ARM: dts: rockchip: Add NFC node for RV1108 SoC
ARM: dts: rockchip: rename thermal subnodes for rk3288
ARM: dts: rockchip: add QoS register compatibles for rk3288
ARM: dts: rockchip: add QoS register compatibles for rk3066/rk3188
ARM: dts: rockchip: add gpu node to rk3288-miqi
Link: https://lore.kernel.org/r/2184150.ElGaqSPkdT@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Actions Semi ARM DT changes for v5.12:
Updates to the existing S500 ARM SoC. Support has been added for CMU (Clock
Management Unit), Reset controller, DMA, Pinctrl/GPIO, MMC, I2C and SIRQ
(interrupt controller). Since the CMU support is added, the dummy fixed clock
used for the UART controller has been removed for all S500 based boards and
proper UART clock from CMU is used.
Added uSD support and I2C pinctrl configuration for Roseapplepi board based on
S500 SoC. This will make the board boot mainline with a distro from uSD card.
The I2C pinctrl config is added specifically for the PMIC which is currently
under review.
* tag 'actions-arm-dt-for-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions:
arm: dts: owl-s500-roseapplepi: Add I2C pinctrl configuration
arm: dts: owl-s500-roseapplepi: Add uSD support
arm: dts: owl-s500: Add SIRQ controller
arm: dts: owl-s500: Add I2C support
arm: dts: owl-s500: Add MMC support
arm: dts: owl-s500: Add pinctrl & GPIO support
arm: dts: owl-s500: Add DMA controller
arm: dts: owl-s500: Add Reset controller
arm: dts: owl-s500: Set CMU clocks for UARTs
arm: dts: owl-s500: Add Clock Management Unit
Link: https://lore.kernel.org/r/20210205050346.GA7619@thinkpad
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
i.MX device tree change for 5.12:
- A series from Oleksij Rempel to add i.MX6 based Plymovent, Protonic
and Kverneland boards.
- A series from Andreas Kemnade to improve UART support for ebook
readers.
- A series from Fabio Estevam to update imx6ul-14x14-evk device tree for
adding GPIO expander and camera support.
- A patch set from Lucas Stach to improve ZII RDU2 support, enabling
WDOG, tuning I2C drive-strength, RMI4 and UCS1002 ALERT.
- Other small and random updates on various boards.
* tag 'imx-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (37 commits)
ARM: dts: imx6: RDU2: adjust audio devices nomenclature
ARM: dts: imx6: RDU2: only trigger IRQ on falling edge ucs1002 ALERT pin
ARM: dts: imx6: RDU2: enable RMI4 reduced reporting
ARM: dts: imx6: RDU2: reduce i2c drive-strength
ARM: dts: imx6: rdu2: enable WDOG1
ARM: dts: imx6-sr-som: increase at8035 PHY gigabit Tw parameter
ARM: dts: imx6: add wakeup support via magic packet
firmware: imx: select SOC_BUS to fix firmware build
arm64: dts: imx8mp: Correct the gpio ranges of gpio3
ARM: dts: imx6qdl-sr-som: fix some cubox-i platforms
ARM: dts: imx: e60k02: add second uart
ARM: dts: imx6sl-tolino-shine3: correct console uart pinmux
ARM: dts: imx6sl-tolino-shine2hd: add second uart
ARM: dts: imx6sl-tolino-shine2hd: correct console uart pinmux
ARM: imx: build suspend-imx6.S with arm instruction set
ARM: dts: imx7d-flex-concentrator: fix pcf2127 reset
ARM: dts: add Kverneland TGO board
ARM: dts: add Kverneland UT1, UT1Q and UT1P
ARM: dts: imx6ul-14x14-evk: Add camera support
ARM: dts: imx6ul-14x14-evk: Describe the KSZ8081 reset
...
Link: https://lore.kernel.org/r/20210204120150.26186-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
ARM: dts: amlogic updates for v5.12
- add thermal zones with cooling configuration
* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: add the thermal-zones with cooling configuration
ARM: dts: meson8: add the thermal-zones with cooling configuration
ARM: dts: meson: add the ADC thermal sensor to meson.dtsi
ARM: dts: meson: move iio-hwmon for the SoC temperature to meson.dtsi
Link: https://lore.kernel.org/r/7ho8h12bto.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Without DT aliases, the numbering of mmc interfaces is unpredictable.
Adding them makes it possible to refer to devices consistently. The
popular suggestion to use UUIDs obviously doesn't work with a blank
device fresh from the factory.
See commit fa2d0aa969 ("mmc: core: Allow setting slot index via
device tree alias") for more discussion.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The 32-bit Amlogic Meson SoCs embed an ARC processor in the Always-On
power domain which is typically used for managing system suspend. The
memory for this ARC core is taken from the AHB SRAM area. Depending on
the actual SoC a different ARC core is used:
- Meson6 and earlier: some ARCv1 ISA based core (probably an ARC625)
- Meson8 and later: an ARC EM4 (ARCv2 ISA) based core
Add the device-tree node for this remote-processor along with the
required SRAM sections, clocks and reset-lines. Also use the
SoC-specific compatible string to manage any differences (should
they exist).
On Meson8, Meson8b and Meson8m2 the "secbus2" IO region is needed as
some bits need to be programmed there. Add this IO region for those
SoCs as well.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20210102205904.2691120-6-martin.blumenstingl@googlemail.com
Pull ARM SoC fixes from Arnd Bergmann:
"The code fixes in this round are all for the Texas Instruments OMAP
platform, addressing several regressions related to the ti-sysc
interconnect changes that was merged in linux-5.11 and one recently
introduced RCU usage warning.
Tero Kristo updates his maintainer file entries as he is changing to a
new employer.
The other changes are for devicetree files across eight different
platforms:
TI OMAP:
- multiple gpio related one-line fixes
Allwinner/sunxi:
- ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
- soc: sunxi: mbus: Remove DE2 display engine compatibles
NXP lpc32xx:
- ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL
STMicroelectronics stm32
- multiple minor fixes for DHCOM/DHCOR boards
NXP Layerscape:
- Fix DCFG address range on LS1046A SoC
Amlogic meson:
- fix reboot issue on odroid C4
- revert an ethernet change that caused a regression
- meson-g12: Set FL-adj property value
Rockchip:
- multiple minor fixes on 64-bit rockchip machines
Qualcomm:
- Regression fixes for Lenovo Yoga touchpad and for interconnect
configuration
- Boot fixes for 'LPASS' clock configuration on two machines"
* tag 'arm-soc-fixes-v5.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (31 commits)
ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL
ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
arm64: dts: ls1046a: fix dcfg address range
soc: sunxi: mbus: Remove DE2 display engine compatibles
arm64: dts: meson: switch TFLASH_VDD_EN pin to open drain on Odroid-C4
Revert "arm64: dts: amlogic: add missing ethernet reset ID"
arm64: dts: rockchip: Disable display for NanoPi R2S
ARM: dts: omap4-droid4: Fix lost keypad slide interrupts for droid4
arm64: dts: rockchip: remove interrupt-names property from rk3399 vdec node
drivers: bus: simple-pm-bus: Fix compatibility with simple-bus for auxdata
ARM: OMAP2+: Fix booting for am335x after moving to simple-pm-bus
ARM: OMAP2+: Fix suspcious RCU usage splats for omap_enter_idle_coupled
ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
ARM: dts: stm32: Fix GPIO hog names on DHCOM
ARM: dts: stm32: Disable optional TSC2004 on DRC02 board
ARM: dts: stm32: Disable WP on DHCOM uSD slot
ARM: dts: stm32: Connect card-detect signal on DHCOM
ARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect
arm64: dts: qcom: sdm845: Reserve LPASS clocks in gcc
...
One fix for a phy-mode ethernet issue, and one to fix the display output on
SoCs with the Display Engine 2
* tag 'sunxi-fixes-for-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
soc: sunxi: mbus: Remove DE2 display engine compatibles
Link: https://lore.kernel.org/r/f8298059-f9ca-43b4-9e29-35bc0e0c9b15.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This reverts commit c17e9377aa.
The lpc32xx clock driver is not able to actually change the PLL rate as
this would require reparenting ARM_CLK, DDRAM_CLK, PERIPH_CLK to SYSCLK,
then stop the PLL, update the register, restart the PLL and wait for the
PLL to lock and finally reparent ARM_CLK, DDRAM_CLK, PERIPH_CLK to HCLK
PLL.
Currently, the HCLK driver simply updates the registers but this has no
real effect and all the clock rate calculation end up being wrong. This is
especially annoying for the peripheral (e.g. UARTs, I2C, SPI).
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Link: https://lore.kernel.org/r/20210203090320.GA3760268@piout.net'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
BPi Pro needs TX and RX delay for Gbit to work reliable and avoid high
packet loss rates. The realtek phy driver overrides the settings of the
pull ups for the delays, so fix this for BananaPro.
Fix the phy-mode description to correctly reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit bbc4d71d63 ("net: phy: realtek: fix rtl8211e
rx/tx delay config").
Fixes: 10662a33dc ("ARM: dts: sun7i: Add dts file for Bananapro board")
Signed-off-by: Hermann Lauer <Hermann.Lauer@uni-heidelberg.de>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210128111842.GA11919@lemon.iwr.uni-heidelberg.de
This adds support for the power button attached to the Embedded Controller
on a Dell Wyse 3020 "Ariel" board.
However, while the EC itself is controlled via I2C, the input capability
for the power button acts as a separate device attached to the SPI, hence
it has a separate device node.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-11-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Drop the linux,usable-memory properties; the schema is unhappy about
them.
They've been cargo-culted from Open Firmware and I don't know what
purpose they serve. Perhaps they are meant to provide the OFW runtime.
In that case it's still okay to drop them from here; OFW is welcome to add
it upon boot.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-6-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Drop the linux,usable-memory properties; the schema is unhappy about
them:
mmp2-olpc-xo-1-75.dt.yaml: /: memory: False schema does not allow
{'linux,usable-memory': [[0, 528482304]],
'available': [[847872, 519245824, 4096, 782336]],
'reg': [[0, 536870912]], 'device_type': ['memory']}
They've been cargo-culted from Open Firmware and I don't know what
purpose they serve. Perhaps they are meant to provide the OFW runtime.
In that case it's still okay to drop them from here; OFW is welcome to add
it upon boot.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-5-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
mvebu dt for 5.12 (part 1)
Improve LED and fan support on Helios4 boad (Armada 388 based)
Add ECC configuration for Linksys board (Aramda 385 based)
* tag 'mvebu-dt-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
ARM: dts: armada388-helios4: assign pinctrl to each fan
ARM: dts: armada388-helios4: assign pinctrl to LEDs
ARM: dts: armada-385-linksys: fix usage with newer devices
Link: https://lore.kernel.org/r/87sg6fn49o.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.12, please pull the following:
- Dave adds a proper compatile string for the DSI1 panel on 2711
(Raspberry Pi 4) to permit adequate driver differentiation
- Nicolas declares reserved memory regions filed by the Rasbperry Pi
bootloader to indicate the running system configuration
- Maxime declares the BSC (HDMI I2C controller) and CEC interrupt
controllers
- Stanislav fixes a tab vs. space issue in the BCM21664 DTS
* tag 'arm-soc/for-5.12/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm2711: Add the CEC interrupt controller
ARM: dts: bcm21664: Replace spaces with a tab
ARM: dts: bcm2711: Add the BSC interrupt controller
ARM: dts: bcm2711: Add reserved memory template to hold firmware configuration
ARM: dts: bcm2711: Use compatible string for BCM2711 DSI1
Link: https://lore.kernel.org/r/20210131221721.685974-3-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
It was observed that decompressor running on hardware implementing ARM v8.2
Load/Store Multiple Atomicity and Ordering Control (LSMAOC), say, as guest,
would stuck just after:
Uncompressing Linux... done, booting the kernel.
The reason is that it clears nTLSMD bit when disabling caches:
nTLSMD, bit [3]
When ARMv8.2-LSMAOC is implemented:
No Trap Load Multiple and Store Multiple to
Device-nGRE/Device-nGnRE/Device-nGnRnE memory.
0b0 All memory accesses by A32 and T32 Load Multiple and Store
Multiple at EL1 or EL0 that are marked at stage 1 as
Device-nGRE/Device-nGnRE/Device-nGnRnE memory are trapped and
generate a stage 1 Alignment fault.
0b1 All memory accesses by A32 and T32 Load Multiple and Store
Multiple at EL1 or EL0 that are marked at stage 1 as
Device-nGRE/Device-nGnRE/Device-nGnRnE memory are not trapped.
This bit is permitted to be cached in a TLB.
This field resets to 1.
Otherwise:
Reserved, RES1
So as effect we start getting traps we are not quite ready for.
Looking into history it seems that mask used for SCTLR clear came from
the similar code for ARMv4, where bit[3] is the enable/disable bit for
the write buffer. That not applicable to ARMv7 and onwards, so retire
that bit from the masks.
Fixes: 7d09e85448 ("[ARM] 4393/2: ARMv7: Add uncompressing code for the new CPU Id format")
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Currently, the start address of physical memory is obtained by masking
the program counter with a fixed mask of 0xf8000000. This mask value
was chosen as a balance between the requirements of different platforms.
However, this does require that the start address of physical memory is
a multiple of 128 MiB, precluding booting Linux on platforms where this
requirement is not fulfilled.
Fix this limitation by validating the masked address against the memory
information in the passed DTB. Only use the start address
from DTB when masking would yield an out-of-range address, prefer the
traditional method in all other cases. Note that this applies only to the
explicitly passed DTB on modern systems, and not to a DTB appended to
the kernel, or to ATAGS. The appended DTB may need to be augmented by
information from ATAGS, which may need to rely on knowledge of the start
address of physical memory itself.
This allows to boot Linux on r7s9210/rza2mevb using the 64 MiB of SDRAM
on the RZA2MEVB sub board, which is located at 0x0C000000 (CS3 space),
i.e. not at a multiple of 128 MiB.
Suggested-by: Nicolas Pitre <nico@fluxnic.net>
Suggested-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Take the 4 instruction byte swapping sequence from the decompressor's
head.S, and turn it into a rev_l GAS macro for general use. While
at it, make it use the 'rev' instruction when compiling for v6 or
later.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The R_INTC block controls more than just the NMI, and it is a different
hardware block than the NMI INTC found in some other Allwinner SoCs, so
the label "nmi_intc" is inaccurate. Name it "r_intc" to match the
compatible and to match the few references in the vendor documentation.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210118055040.21910-6-samuel@sholland.org
