Alex Elder
06ad53efeb
ARM: dts: qcom: sdx55: add IPA information
...
Add IPA-related nodes and definitions to "sdx55.dtsi". The SMP2P
nodes (ipa_smp2p_out and ipa_smp2p_in) are already present.
Signed-off-by: Alex Elder <elder@linaro.org >
Link: https://lore.kernel.org/r/20210409155251.955632-1-elder@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-04-13 21:35:56 -05:00
Manivannan Sadhasivam
67b4744a0c
ARM: dts: qcom: sdx55: Add Modem remoteproc node
...
Add modem support to SDX55 using the PAS remoteproc driver.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210408170457.91409-16-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-04-13 21:17:02 -05:00
Manivannan Sadhasivam
9e1e00f18a
ARM: dts: qcom: Fix node name for NAND controller node
...
Use the common "nand-controller" node name for NAND controller node to
fix the `make dtbs_check` validation for Qcom platforms.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210408170457.91409-10-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-04-13 21:06:37 -05:00
Manivannan Sadhasivam
ce5a28d12e
ARM: dts: qcom: sdx55: Add interconnect nodes
...
Add interconnect nodes for the providers in SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210408170457.91409-9-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-04-13 21:06:31 -05:00
Manivannan Sadhasivam
6bf6655ddc
ARM: dts: qcom: sdx55: Add SCM node
...
Add SCM node to enable SCM functionality on SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210408170457.91409-8-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-04-13 21:06:27 -05:00
Manivannan Sadhasivam
9b7069edb1
ARM: dts: qcom: sdx55: Add IMEM and PIL info region
...
Add a simple-mfd representing IMEM on SDX55 and define the PIL
relocation info region, so that post mortem tools will be able to locate
the loaded remoteproc.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210408170457.91409-6-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-04-13 21:06:18 -05:00
Manivannan Sadhasivam
21e6e1dced
ARM: dts: qcom: sdx55: Add modem SMP2P node
...
Add SMP2P nodes for the SDX55 platform to communicate with the modem.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210408170457.91409-5-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-04-13 21:06:17 -05:00
Manivannan Sadhasivam
0ec7bde7b5
ARM: dts: qcom: sdx55: Add CPUFreq support
...
Add CPUFreq support to SDX55 platform using the cpufreq-dt driver.
There is no dedicated hardware block available on this platform to
carry on the CPUFreq duties. Hence, it is accomplished using the CPU
clock and regulators tied together by the operating points table.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210408170457.91409-4-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-04-13 21:06:16 -05:00
Manivannan Sadhasivam
8e3d9a7c47
ARM: dts: qcom: sdx55: Add support for APCS block
...
The APCS block on SDX55 acts as a mailbox controller and also provides
clock output for the Cortex A7 CPU.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210408170457.91409-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-04-13 21:06:16 -05:00
Manivannan Sadhasivam
37f0f245f9
ARM: dts: qcom: sdx55: Add support for A7 PLL clock
...
On SDX55 there is a separate A7 PLL which is used to provide high
frequency clock to the Cortex A7 CPU via a MUX.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210408170457.91409-2-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-04-13 21:06:15 -05:00
Manivannan Sadhasivam
c4aa86f0dd
ARM: dts: qcom: sdx55: Add pshold support
...
Add support for pshold block to drive pshold towards the PMIC, which is
used to trigger a configurable event such as reboot or poweroff of the
SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210118051005.55958-7-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-01-22 12:41:33 -06:00
Manivannan Sadhasivam
b1d20460f1
ARM: dts: qcom: sdx55: Add Watchdog support
...
Enable Watchdog support for Application Processor Subsystem (APSS) block
on SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210118051005.55958-6-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-01-22 12:41:33 -06:00
Manivannan Sadhasivam
fea4b41022
ARM: dts: qcom: sdx55: Add USB3 and PHY support
...
Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and
SNPS HS PHY on SDX55.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210118051005.55958-3-manivannan.sadhasivam@linaro.org
[bjorn: Added missing #power-domain-cells to &gcc]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-01-22 12:41:07 -06:00
Vinod Koul
3cef2d55f9
ARM: dts: qcom: sdx55: Add rpmpd node
...
This adds rpmpd node and opps for this node to the SDX55 dts.
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210106125322.61840-17-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-01-06 18:46:11 -06:00
Vinod Koul
3b6785ed43
ARM: dts: qcom: sdx55: Add spmi node
...
This adds SPMI node to SDX55 dts.
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210106125322.61840-14-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-01-06 18:46:08 -06:00
Manivannan Sadhasivam
4bd7bfb456
ARM: dts: qcom: sdx55: Add QPIC NAND support
...
Add qpic_nand node to support QPIC NAND controller on SDX55 platform.
Since there is no "aon" clock in SDX55, a dummy clock is provided.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210106125322.61840-11-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-01-06 18:46:02 -06:00
Manivannan Sadhasivam
2470941806
ARM: dts: qcom: sdx55: Add QPIC BAM support
...
Add qpic_bam node to support QPIC BAM DMA controller on SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Reviewed-by: Vinod Koul <vkoul@kernel.org >
Link: https://lore.kernel.org/r/20210106125322.61840-10-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-01-06 18:46:00 -06:00
Manivannan Sadhasivam
8cf74d0565
ARM: dts: qcom: sdx55: Add Shared memory manager support
...
Add smem node to support shared memory manager on SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Reviewed-by: Vinod Koul <vkoul@kernel.org >
Link: https://lore.kernel.org/r/20210106125322.61840-9-manivannan.sadhasivam@linaro.org
[bjorn: Moved smem node out from /soc]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-01-06 18:45:59 -06:00
Manivannan Sadhasivam
985eef1d03
ARM: dts: qcom: sdx55: Add support for TCSR Mutex
...
Add TCSR Mutex node to support Qualcomm Hardware Mutex block on SDX55
platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210106125322.61840-8-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-01-06 18:45:55 -06:00
Bjorn Andersson
a2bdfdfba2
ARM: dts: qcom: sdx55: Enable ARM SMMU
...
Add a node for the ARM SMMU found in the SDX55.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210106125322.61840-7-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-01-06 18:45:53 -06:00
Manivannan Sadhasivam
f036549f29
ARM: dts: qcom: sdx55: Add support for SDHCI controller
...
Add devicetree support for SDHCI controller found in Qualcomm SDX55
platform. The SDHCI controller is based on the MSM SDHCI v5 IP.
Hence, the support is added by reusing the existing sdhci driver with
"qcom,sdhci-msm-v5" as the fallback.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210106125322.61840-5-manivannan.sadhasivam@linaro.org
[bjorn: added include of qcom,gcc-sdx55.h]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-01-06 18:45:24 -06:00
Vinod Koul
ec99770d4b
ARM: dts: qcom: sdx55: Add reserved memory nodes
...
This adds reserved memory nodes to the SDX55 dtsi as defined by v6 of
the memory map
Signed-off-by: Vinod Koul <vkoul@kernel.org >
[mani: moved modem regions to board dts]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210106125322.61840-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-01-06 10:40:04 -06:00
Vinod Koul
dea0e9bc05
ARM: dts: qcom: sdx55: Add pincontrol node
...
This adds pincontrol node to SDX55 dts.
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210106125322.61840-2-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2021-01-06 10:39:51 -06:00
Manivannan Sadhasivam
9d038b2e62
ARM: dts: qcom: Add SDX55 platform and MTP board support
...
Add basic devicetree support for SDX55 platform and MTP board from
Qualcomm. The SDX55 platform features an ARM Cortex A7 CPU which forms
the Application Processor Sub System (APSS) along with standard Qualcomm
peripherals like GCC, TLMM, BLSP, QPIC, and BAM etc... Also, there
exists the networking parts such as IPA, MHI, PCIE-EP, EMAC, and Modem
etc..
Currently, this basic devicetree support includes GCC, RPMh clock, INTC
and Debug UART.
Co-developed-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20201126083138.47047-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org >
2020-12-31 11:21:21 -06:00