Likun Gao
a32fa02921
drm/amdgpu: support IMU front door load
...
Support for front door to load IMU firmware.
Signed-off-by: Likun Gao <Likun.Gao@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:53 -04:00
Jack Xiao
d6b4014ad7
drm/amdgpu: add new CP_MES ucode ids
...
Needed for MES KIQ firmware loading.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:53 -04:00
Likun Gao
6777c8cfca
drm/amdgpu: support for new SDMA front door load
...
Support for SDMA v6_0 ucode front door load.
Signed-off-by: Likun Gao <Likun.Gao@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:53 -04:00
Likun Gao
8e41a56a79
drm/amdgpu: support RLCV firmware front door load
...
Support RLCV firmware front door load.
Signed-off-by: Likun Gao <Likun.Gao@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:53 -04:00
Likun Gao
a0fe38b490
drm/amdgpu: support RLCP firmware front door load
...
Support RLCP firmware front door load.
Signed-off-by: Likun Gao <Likun.Gao@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:53 -04:00
Mukul Joshi
464913c0dd
drm/amdgpu/mes: Update the doorbell function signatures
...
Update the function signatures for process doorbell allocations
with MES enabled to make them more generic. KFD would need to
access these functions to allocate/free doorbells when MES is
enabled.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com >
Acked-by: Oak Zeng <Oak.Zeng@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com >
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:53 -04:00
Jack Xiao
da1c0338f0
drm/amdgpu/mes: disable mes sdma queue test
...
Disable mes sdma queue test on sienna cichlid+,
for fw hasn't supported to map sdma queue.
The test can be enabled if fw supports.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:53 -04:00
Jack Xiao
7c18b40e22
drm/amdgpu/mes: fix vm csa update issue
...
Need reserve VM buffers before update VM csa.
v2: rebase fixes
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:53 -04:00
Jack Xiao
2131733594
drm/amdgpu/mes10.1: add mes self test in late init
...
Add MES self test in late init.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:53 -04:00
Jack Xiao
6624d16103
drm/amdgpu/mes: implement mes self test
...
Add mes self test to verify its fundamental functionality by
running ring test and ib test of mes kernel queue.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:52 -04:00
Jack Xiao
cdb7476d96
drm/amdgpu/mes: add ring/ib test for mes self test
...
Run the ring test and ib test for mes self test.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:52 -04:00
Jack Xiao
f1d93c9c27
drm/amdgpu/mes: create gang and queues for mes self test
...
Create gang and queues for mes self test.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:52 -04:00
Jack Xiao
a22f760a02
drm/amdgpu/mes: map ctx metadata for mes self test
...
Map ctx metadata for mes self test.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:52 -04:00
Jack Xiao
712ce87221
drm/amdgpu: kiq takes charge of all queues
...
To make kgq/kcq and mes queue co-exist, kiq needs take charge
of all queues.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:52 -04:00
Jack Xiao
a4a5f5cab6
drm/amdgpu: skip gds switch for mes queue
...
For mes manages gds allocation, skip gds switch.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:52 -04:00
Jack Xiao
9d3bccdc72
drm/amdgpu: skip kiq ib tests if mes enabled
...
For kiq conflicts with mes, skip kiq ib tests.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:52 -04:00
Jack Xiao
f89703f561
drm/amdgpu: skip some checking for mes queue ib submission
...
Skip some checking for mes queue ib submission.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:52 -04:00
Mukul Joshi
c004d44e10
drm/amdgpu: Enable KFD with MES enabled
...
Enable KFD initialization with MES enabled.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com >
Acked-by: Oak Zeng <Oak.Zeng@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:52 -04:00
Jack Xiao
9c12f5cd06
drm/amdgpu: skip kfd routines when mes enabled
...
For kfd hasn't supported mes, skip kfd routines.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:52 -04:00
Jack Xiao
e3652b0976
drm/amdgpu/mes: add helper functions to alloc/free ctx metadata
...
Add the helper functions to allocate/free context metadata.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:52 -04:00
Jack Xiao
9cc654c8ce
drm/amdgpu/mes: implement removing mes ring
...
Remove the mes ring and its resources.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:52 -04:00
Jack Xiao
d0c423b647
drm/amdgpu/mes: use ring for kernel queue submission
...
Use ring as the front end for kernel queue submission.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:52 -04:00
Jack Xiao
11ec5b3605
drm/amdgpu/mes: add helper function to get the ctx meta data offset
...
Add the helper function to get the corresponding ctx meta data offset.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:52 -04:00
Jack Xiao
1a27aacb6e
drm/amdgpu/mes: add helper function to convert ring to queue property
...
Add the helper function to convert ring to queue property.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:52 -04:00
Jack Xiao
bcc4e1e1d4
drm/amdgpu/mes: implement removing mes queue
...
Remove the MES queue from MES scheduling and free its resources.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:52 -04:00
Jack Xiao
be5609de15
drm/amdgpu/mes: implement adding mes queue
...
Allocate related resources for the queue and add it to mes
for scheduling.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:51 -04:00
Jack Xiao
5fa963d0fc
drm/amdgpu/mes: initialize mqd from queue properties
...
Add helper function to initialize mqd from queue properties.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:51 -04:00
Jack Xiao
ea756bd5cc
drm/amdgpu/mes: implement resuming all gangs
...
Implement resuming all gangs.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:51 -04:00
Jack Xiao
c8bb10572c
drm/amdgpu/mes: implement suspending all gangs
...
Implement suspending all gangs.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:51 -04:00
Jack Xiao
b0306e5840
drm/amdgpu/mes: implement removing mes gang
...
Free the mes gang and its resources.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:51 -04:00
Jack Xiao
5d0f619f72
drm/amdgpu/mes: implement adding mes gang
...
Gang is a group of the same type queue, which is the scheduling
unit of mes hardware scheduler.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:51 -04:00
Jack Xiao
063a38d662
drm/amdgpu/mes: implement destroying mes process
...
Destroy the mes process, which free resources of the process.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:51 -04:00
Jack Xiao
48dcd2b751
drm/amdgpu/mes: implement creating mes process v2
...
Create a mes process which contains process-related resources,
like vm, doorbell bitmap, process ctx bo and etc.
v2: move the simple variable to the end
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:51 -04:00
Jack Xiao
29634c3f8b
drm/amdgpu/mes10.1: implement the suspend/resume routine
...
Implement the suspend/resume routine of mes.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:51 -04:00
Jack Xiao
7149599be4
drm/amdgpu/mes10.1: add delay after mes engine enable
...
Add delay after mes engine enable, for it needs more time
to complete engine initialising.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:51 -04:00
Jack Xiao
4df8092737
drm/amdgpu/mes10.1: call general mes initialization
...
Call general mes initialization/finalization.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:51 -04:00
Jack Xiao
0bf478f01a
drm/amdgpu/mes: relocate status_fence slot allocation
...
Move the status_fence slot allocation from ip specific function
to general mes function.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:51 -04:00
Jack Xiao
b04c1d6468
drm/amdgpu/mes: initialize/finalize common mes structure v2
...
Initialize/finalize common mes structure.
v2: add mutex_init for adev->mes.mutex
Cc: Le Ma <le.ma@amd.com >
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:51 -04:00
Jack Xiao
534000c080
drm/amdgpu: add mes queue id mask v2
...
Add MES queue id mask.
v2: move queue id mask to amdgpu_mes_ctx.h
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:51 -04:00
Jack Xiao
32de57e9ef
drm/amdgpu/mes: manage mes doorbell allocation
...
It is used to manage the doorbell allocation of mes processes and queues.
Driver calls into process doorbell allocation to get the slice doorbell
for the process, then the doorbell for a queue is allocated from the
process doorbell slice.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:51 -04:00
Jack Xiao
f10e80e3a4
drm/amdgpu: enable mes kiq N-1 test on sienna cichlid
...
Enable kiq support on gfx10.3, enable mes kiq (n-1)
test on sienna cichlid, so that mes kiq can be tested on
sienna cichlid. The patch can be dropped once mes kiq
is functional.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:50 -04:00
Jack Xiao
b0f340288b
drm/amdgpu: add mes kiq frontdoor loading support
...
Add mes kiq frontdoor loading support.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:50 -04:00
Jack Xiao
cf064b4589
drm/amdgpu/mes: add mes kiq callback
...
Needed to properly initialize mes kiq.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:50 -04:00
Likun Gao
c1248e1124
drm/amdgpu: add mes kiq PSP GFX FW type
...
Add MES KIQ PSP GFX FW type and the convert type.
Signed-off-by: Likun Gao <Likun.Gao@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:50 -04:00
Jack Xiao
8183d7436a
drm/amdgpu/sdma5: add mes support for sdma ib test
...
Add MES support for sdma ib test.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:50 -04:00
Jack Xiao
ea93ac2f4e
drm/amdgpu/sdma5: add mes support for sdma ring test
...
Add MES support for sdma ring test.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:50 -04:00
Jack Xiao
76411afd5b
drm/amdgpu/sdma5: add mes queue fence handling
...
From IH ring buffer look up the coresponding kernel queue and process.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:50 -04:00
Jack Xiao
217d29f138
drm/amdgpu/sdma5: associate mes queue id with fence
...
Associate mes queue id with fence, so that EOP trap handler can look up
which queue issues the fence.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:50 -04:00
Jack Xiao
810479bad3
drm/amdgpu/sdma5: initialize sdma mqd
...
Initialize sdma mqd according to ring settings.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:50 -04:00
Jack Xiao
c097aac7d9
drm/amdgpu/sdma5.2: add mes support for sdma ib test
...
Add MES support for sdma ib test.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-05-04 10:43:50 -04:00