2 Commits

Author	SHA1	Message	Date
Hai Li	e01b1bfd88	drm/msm/dsi: Updata LNn_CFG4 register settings for 28nm PHY ... The current settings for 28nm PHY data lane CFG4 registers do not work with certain panels. This change is to modify them to hw recommended values. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>	2015-10-22 15:39:54 -04:00
Hai Li	5c82902844	drm/msm/dsi: Split PHY drivers to separate files ... This change moves each PHY type specific code into separate files. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>	2015-08-15 18:27:28 -04:00