Commit Graph

30150 Commits

Author SHA1 Message Date
Chris Wilson
02c53d99b6 drm/i915: debugfs/i915_gem_seqno_info does not need rpm nor struct_mutex
i915_gem_seqno_info() supplies its own spinlocks to access the waiters,
and doesn't need any GGTT or mmio access.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/20160903065343.25151-1-chris@chris-wilson.co.uk
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
2016-09-03 13:10:26 +01:00
Tom St Denis
832c6ef765 drm/amd/amdgpu: Merge get_wptr functions in gfx6
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 11:33:24 -04:00
Tom St Denis
e7706b422c drm/amd/amdgpu: Merge get_rptr functions in gfx8
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 11:33:15 -04:00
Tom St Denis
f1c0efc537 drm/amd/amdgpu: Merge get_rptr functions in gfx7
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 11:33:05 -04:00
Tom St Denis
6f924e2026 drm/amd/amdgpu: Merge get_rptr functions in gfx6
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 11:32:55 -04:00
Tom St Denis
4aeacf0f9a drm/amd/amdgpu: Various tidy ups for gfx6
Various whitespace and logical simplifications for gfx6.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 11:32:45 -04:00
Tom St Denis
142333dbb9 drm/amd/amdgpu: Simplify mask creation in gfx6
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 11:32:35 -04:00
Tom St Denis
deca1d1f16 drm/amd/amdgpu: Add GRBM lock to various SI functions
Add missing lock around SE/SH/INSTANCE selections.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 11:32:26 -04:00
Rex Zhu
48fad3aff6 drm/amd/powerplay: original power state table should not be changed.
power state table was set based on vbios and should not be changed.
when client need to change power state, just make a copy and send to
smu.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 11:32:09 -04:00
Rex Zhu
cfcc283cee drm/amd/powerplay: refine struct name for coding style reason.
delete useless member.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 11:31:43 -04:00
Rex Zhu
48d7b759a8 drm/amd/powerplay: add vce state tables initialize for ppt v1.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 11:31:39 -04:00
Rex Zhu
791a57db3e drm/amd/powerplay: refine struct name for code style reason.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 11:31:34 -04:00
Christian König
662bfa61ff drm/amdgpu: prevent command submission failures under memory pressure v2
As last resort try to evict BOs from the current working set into other
memory domains. This effectively prevents command submission failures when
VM page tables have been swapped out.

v2: fix typos

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 11:30:41 -04:00
Christian König
1abdc3d73d drm/amdgpu: only try again if we actually run into -ENOMEM
All other errors can't be fixed by using a different memory domain.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 11:30:33 -04:00
Imre Deak
795b38b392 drm/i915/bdw: sseu: Fix sseu status parsing
Currently when checking for fused off EUs we may ignore the EU count in
an enabled slice if there is any disabled slice preceding the enabled
one (with a lower slice ID). Perhaps this can't happen in reality, but
there is no reason to have this assumption built-in, the code is clearer
without it.

Reviewed-by: Robert Bragg <robert@sixbynine.org>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
Tested-by: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1472659987-10417-8-git-send-email-imre.deak@intel.com
2016-09-02 18:17:55 +03:00
Imre Deak
c67ba53875 drm/i915: sseu: Add debug printf for slice/subslice masks
Reviewed-by: Robert Bragg <robert@sixbynine.org>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
Tested-by: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1472659987-10417-7-git-send-email-imre.deak@intel.com
2016-09-02 18:17:52 +03:00
Imre Deak
57ec171eae drm/i915: sseu: Convert subslice count fields to subslice mask
In an upcoming patch we'll need the actual mask of subslices in addition
to their count, so convert the subslice_per_slice field to a mask.
Also we can easily calculate subslice_total from the other fields, so
instead of storing a cached version of this, add a helper to calculate
it.

v2:
- Use hweight8() on u8 typed vars instead of hweight32(). (Ben)

Reviewed-by: Robert Bragg <robert@sixbynine.org> (v1)
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
Tested-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
2016-09-02 18:17:47 +03:00
Imre Deak
f08a0c9234 drm/i915: sseu: Convert slice count field to mask
In an upcoming patch we'll need the actual mask of slices in addition to
their count, so replace the count field with a mask.

v2:
- Use hweight8() on u8 typed vars instead of hweight32(). (Ben)

Reviewed-by: Robert Bragg <robert@sixbynine.org> (v1)
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
Tested-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1472659987-10417-5-git-send-email-imre.deak@intel.com
2016-09-02 18:17:14 +03:00
Imre Deak
615d8908ac drm/i915: sseu: Simplify debugfs status/info printing
Reviewed-by: Robert Bragg <robert@sixbynine.org>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
Tested-by: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1472659987-10417-4-git-send-email-imre.deak@intel.com
2016-09-02 18:17:10 +03:00
Imre Deak
43b6799814 drm/i915: sseu: Use sseu_dev_info in device info
Move all slice/subslice/eu related properties to the sseu_dev_info
struct.

No functional change.

v2:
- s/info/sseu/ based on the new struct name. (Ben)

Reviewed-by: Robert Bragg <robert@sixbynine.org> (v1)
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
Tested-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
2016-09-02 18:16:31 +03:00
Imre Deak
915490d5f1 drm/i915: sseu: Move sseu_dev_status to i915_drv.h
The data in this struct is provided both by getting the
slice/subslice/eu features available on a given platform and the actual
runtime state of these same features which depends on the HW's current
power saving state.

Atm members of this struct are duplicated in sseu_dev_status and
intel_device_info. For clarity and code reuse we can share one struct
for both of the above purposes. This patch only moves the struct to the
header file, the next patch will convert users of intel_device_info to
use this struct too.

Instead of unsigned int u8 is used now, which is big enough and is used
anyway in intel_device_info.

No functional change.

v2:
- s/stat/sseu/ based on the new struct name (Ben)

Reviewed-by: Robert Bragg <robert@sixbynine.org> (v1)
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
Tested-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1472659987-10417-2-git-send-email-imre.deak@intel.com
2016-09-02 18:12:30 +03:00
Alex Deucher
a801abe477 drm/radeon: wire up a pci shutdown callback
Normally on shutdown or reboot we don't care about necessarily
making sure the hw is in a good state because the system is about
to be powered down or reset.  However, after a shutdown or reboot
in a VM, it's best to tear down the hw properly otherwise there
can be problems with the next VM use.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 10:35:57 -04:00
Alex Deucher
61e113067b drm/amdgpu: wire up a pci shutdown callback
Normally on shutdown or reboot we don't care about necessarily
making sure the hw is in a good state because the system is about
to be powered down or reset.  However, after a shutdown or reboot
in a VM, it's best to tear down the hw properly otherwise there
can be problems with the next VM use.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 10:35:47 -04:00
Alex Deucher
9b96b63fed drm/radeon: handle runtime pm in drm pre/post close
Close was not handled correctly.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 10:34:49 -04:00
Alex Deucher
d6bda7b4b4 drm/amdgpu: handle runtime pm in drm pre/post close
Close was not handled correctly.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 10:34:48 -04:00
Alex Deucher
32c59dc14b drm/radeon: handle runtime pm correctly in amdgpu_driver_open_kms
Need to fix the error paths.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 10:34:48 -04:00
Alex Deucher
dc08267ac4 drm/amdgpu: handle runtime pm correctly in amdgpu_driver_open_kms
Need to fix the error paths.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 10:34:47 -04:00
Alex Deucher
5e0b1617fc drm/radeon: skip suspend/resume on DRM_SWITCH_POWER_DYNAMIC_OFF
Missed this case previously. No need to do anything if the
device is already off.  runtime pm will handle it.

Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 10:34:47 -04:00
Alex Deucher
103917b387 drm/radeon: set runtime pm state to active on resume
The sbios always powers up the dGPU on resume.

Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 10:34:46 -04:00
Alex Deucher
f46cf3735f drm/amdgpu: skip suspend/resume on DRM_SWITCH_POWER_DYNAMIC_OFF
Missed this case previously. No need to do anything if the
device is already off.  runtime pm will handle it.

Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 10:34:45 -04:00
Alex Deucher
85e154c22e drm/amdgpu: set runtime pm state to active on resume
The sbios always powers up the dGPU on resume.

Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 10:34:45 -04:00
Alex Deucher
e6c71b48c9 drm/amdgpu/gfx6: drop some dead code
The mqd is only used on CI and newer.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 10:34:30 -04:00
David Weinehall
1616247002 drm/i915: Cleanup i915_param()
Rather than having a separate case for each value where we just return
a hardcoded value = 1, we lump them all together and rely on the awesome
case-fallthrough feature of C.

Fix all feature macros to pass dev_priv instead of dev while at it,
and use INTEL_GEN() instead of INTEL_INFO()->gen.

Signed-off-by: David Weinehall <david.weinehall@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20160902104617.29089-1-david.weinehall@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-09-02 12:28:33 +01:00
Chris Wilson
662d19e78b drm/i915: Drop mutex around clearing error state
The error state itself is guarded by a spinlock (admittedly even that is
overkill for a single pointer!) and doesn't require us to take the
struct_mutex in the debugfs/sysfs interface. Removing the struct_mutex
removes one more potential blockage when trying to debug a deadlock.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/20160901205510.31307-1-chris@chris-wilson.co.uk
Reviewed-by: David Weinehall <david.weinehall@linux.intel.com
2016-09-02 08:32:55 +01:00
Daniel Vetter
c4a8a7c718 drm/i915: Update DRIVER_DATE to 20160902
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-09-02 08:34:08 +02:00
Dave Airlie
eb97027f07 Merge tag 'tilcdc-4.9-fixes' of https://github.com/jsarha/linux into drm-next
tilcdc fixes for v4.9

* tag 'tilcdc-4.9-fixes' of https://github.com/jsarha/linux:
  drm/tilcdc: Choose console BPP that supports RGB
  drm/tilcdc: Add blue-and-red-crossed devicetree property
  drm/tilcdc: Write DMA base and ceiling address with single instruction
  drm/tilcdc: Remove drm_helper_disable_unused_functions() call
  drm/tilcdc: Enable EOF interrupts for v1 LCDC
  drm/tilcdc: Adjust the FB_CEILING address
  drm/tilcdc: Fix check for remote port parent
2016-09-02 15:50:51 +10:00
Dave Airlie
2c07d5a8b8 Merge tag 'drm-vc4-next-2016-08-29' of https://github.com/anholt/linux into drm-next
This pull request brings in interlaced vblank timing and a 3D
rendering memory/CPU overhead reduction.

* tag 'drm-vc4-next-2016-08-29' of https://github.com/anholt/linux:
  drm/vc4: Don't force new binner overflow allocation per draw.
  drm/vc4: Enable/Disable vblanks properly in crtc en/disable.
  drm/vc4: Enable precise vblank timestamping for interlaced modes.
  drm/vc4: Reject doublescan modes.
  drm/vc4: Fix handling of interlaced video modes.
  drm/vc4: Disallow interlaced modes on DPI.
2016-09-02 15:50:19 +10:00
Jyri Sarha
c566538552 drm/tilcdc: Choose console BPP that supports RGB
Choose console BPP that supports RGB and remove the old fbdev bpp
selection code. LCDC on AM335x has red and blue wires switched between
24 bit and 16 bit colors. If 24 format is wired for RGB colors, the 16
bit format is wired for BGR. drm_fbdev_cma_init() does not currently
like anything else but RGB formats, so we must choose such bytes per
pixel value that supports RGB.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-09-01 22:32:23 +03:00
Jyri Sarha
bcc5a6f5fc drm/tilcdc: Add blue-and-red-crossed devicetree property
Add "blue-and-red-wiring"-device tree property and update devicetree
binding document.

The red and blue components are reversed between 24 and 16 bit modes
on am335x LCDC output pins. To get 24 RGB format the red and blue
wires has to be crossed and this in turn causes 16 colors output to be
in BGR format. With straight wiring the 16 color is RGB and 24 bit is
BGR.

The new property describes whether the red and blue wires are crossed
or not. If the property is not present or its value is not recognized
the legacy mode is assumed. The legacy configuration supports RGB565,
RGB888 and XRGB8888 formats. However, depending on wiring, the red and
blue colors are swapped in either 16 or 24-bit color modes.

For more details see section 3.1.1 in AM335x Silicon Errata:
http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=sprz360

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-09-01 22:32:11 +03:00
Jyri Sarha
7eb9f069ff drm/tilcdc: Write DMA base and ceiling address with single instruction
Write DMA base and ceiling address with a single instruction, if
available. This should make it more unlikely that LCDC would fetch the
DMA addresses in the middle of an update. Having bad combination of
addresses in dma base and ceiling (e.g base > ceiling) can cause
unpredictaple behavior in LCDC.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-09-01 22:31:59 +03:00
Jyri Sarha
63b07a8d81 drm/tilcdc: Remove drm_helper_disable_unused_functions() call
drm_helper_disable_unused_functions() should not be called by atomic
drivers.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-09-01 22:31:41 +03:00
Karl Beldan
8d6c3f7d8f drm/tilcdc: Enable EOF interrupts for v1 LCDC
This got accidentally dropped in the fixed commit and is required for
the driver to properly work on the rev1 IP, such as found on the LCDK.

Fixes: 2b2080d7e9 ("drm/tilcdc: Get rid of complex ping-pong mechanism")
Signed-off-by: Karl Beldan <kbeldan@baylibre.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
2016-09-01 22:30:12 +03:00
Karl Beldan
ee8c42baeb drm/tilcdc: Adjust the FB_CEILING address
The LCDC seems to expect its framebuffer ceiling address pointer to be
an inclusive bound.  The IP rev2 seems to cope with that but rev1 (as
found on the LCDK) don't.
Also note that this is what the framebuffer code does in da8xx-fb.c.

Since, as the TRM puts it, "The 2 LSBs are hardwired to 00b", the
dma_addr_t can be decremented without cast.
I tested it with a v2 (AM335x, rev  0x4F201000) and an LCDK (v1).

Signed-off-by: Karl Beldan <kbeldan@baylibre.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
2016-09-01 22:29:12 +03:00
Teresa Remmet
a3479c4fa0 drm/tilcdc: Fix check for remote port parent
In function tilcdc_get_external_components the check for
the remote port parent is not correct. We need a '||' instead of
an '&&'.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
2016-09-01 22:28:57 +03:00
Chen-Yu Tsai
b5644a5e72 drm/sun4i: Clear encoder->bridge if a bridge is not found
The KMS helpers (drm_atomic_helper_check_modeset/mode_fixup) pass
encoder->bridge directly to drm_bridge_mode_fixup, which expects a
valid pointer, or NULL (in which case it just returns).

Clear encoder->bridge if a bridge is not found, instead of keeping
the ERR_PTR value.

Since other drm_bridge functions also follow this pattern of checking
for a non-NULL pointer, we can drop the ifs around the calls and just
pass the pointer directly.

Fixes: 894f5a9f4b ("drm/sun4i: Add bridge support")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-09-01 18:46:06 +02:00
Joonas Lahtinen
6f63340284 drm/i915: Use atomic for dev_priv->mm.bsd_engine_dispatch_index
Use atomic type and operands for dev_priv->mm.bsd_engine_dispatch_index
to avoid one struct_mutex locking scenario.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Zhao Yakui <yakui.zhao@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1472731101-21982-1-git-send-email-joonas.lahtinen@linux.intel.com
2016-09-01 15:39:25 +03:00
Dave Airlie
2b2fd56d7e Revert "drm: make DRI1 drivers depend on BROKEN"
This reverts commit d10571fc4f.

This isn't how we get to do this unfortunately.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-09-01 06:16:12 +10:00
Dave Airlie
5e7a1d0170 Merge tag 'topic/drm-misc-2016-08-31' of git://anongit.freedesktop.org/drm-intel into drm-next
More -misc stuff
- moar drm_crtc.c split up&documentation
- some fixes for the simple kms helpers (Andrea)
- I included all the dri1 patches from David - we're not removing any code
  or drivers, and it seems to have worked as a wake-up call to motivate a
  few more people to upstream kms conversions for these. Feel free to
  revert if you disagree strongly.
- a few other single patches

* tag 'topic/drm-misc-2016-08-31' of git://anongit.freedesktop.org/drm-intel: (24 commits)
  drm: drm_probe_helper: Fix output_poll_work scheduling
  drm: bridge/dw-hdmi: Fix colorspace and scan information registers values
  drm/doc: Polish docs for drm_property&drm_property_blob
  drm: Unify handling of blob and object properties
  drm: Extract drm_property.[hc]
  drm: move drm_mode_legacy_fb_format to drm_fourcc.c
  drm/doc: Polish docs for drm_mode_object
  drm: Remove drm_mode_object->atomic_count
  drm: Extract drm_mode_object.[hc]
  drm/doc: Polish kerneldoc for encoders
  drm: Extract drm_encoder.[hc]
  drm/fb-helper: don't call remove_conflicting_framebuffers for FB=m && DRM=y
  drm/atomic-helper: Add NO_DISABLE_AFTER_MODESET flag support for plane commit
  drm/atomic-helper: Disable appropriate planes in disable_planes_on_crtc()
  drm/atomic-helper: Add atomic_disable CRTC helper callback
  drm: simple_kms_helper: add support for bridges
  drm: simple_kms_helper: make connector optional at init time
  drm/bridge: introduce bridge detaching mechanism
  drm/simple-helpers: Always add planes to the state update
  drm: reduce GETCLIENT to a minimum
  ...
2016-09-01 06:15:38 +10:00
Chunming Zhou
2c0d7318c8 drm/amdgpu: add gart recovery by gtt list V2
V2:
a. gart recovery should be ahead of ring test.
b. rename to amdgpu_ttm_recover_gart

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 15:21:13 -04:00
Chunming Zhou
5c1354bd30 drm/amdgpu: link all gtt when binding them V2
V2:
spin lock instead of mutex for gtt list

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 15:21:12 -04:00