Commit Graph

62014 Commits

Author SHA1 Message Date
Masahiro Yamada
596b0474d3 kbuild: preprocess module linker script
There was a request to preprocess the module linker script like we
do for the vmlinux one. (https://lkml.org/lkml/2020/8/21/512)

The difference between vmlinux.lds and module.lds is that the latter
is needed for external module builds, thus must be cleaned up by
'make mrproper' instead of 'make clean'. Also, it must be created
by 'make modules_prepare'.

You cannot put it in arch/$(SRCARCH)/kernel/, which is cleaned up by
'make clean'. I moved arch/$(SRCARCH)/kernel/module.lds to
arch/$(SRCARCH)/include/asm/module.lds.h, which is included from
scripts/module.lds.S.

scripts/module.lds is fine because 'make clean' keeps all the
build artifacts under scripts/.

You can add arch-specific sections in <asm/module.lds.h>.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Tested-by: Jessica Yu <jeyu@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Acked-by: Jessica Yu <jeyu@kernel.org>
2020-09-25 00:36:41 +09:00
Andreas Kemnade
fb2c599f05 ARM: omap3: enable off mode automatically
Enabling off mode was only reachable deeply hidden
in the debugfs. As powersaving is an important feature,
move the option out of its shady place.
The debugfs file can still be used to override the default.

Use the presence of a device compatible to ti,twl4030-idle or
ti,twl4030-idle-osc-off as an indicator that the board is wired correctly
for off mode.

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
[tony@atomide.com: updated to fix a checkpatch warning]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-24 14:26:20 +03:00
Cristian Birsan
84b522e605 ARM: dts: at91: sam9x60ek: enable usb device
Enable usb device for sam9x60ek board.

Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-09-24 11:56:17 +03:00
Ard Biesheuvel
0b58725fb9 ARM: mvebu: drop pointless check for coherency_base
The MMU off code path in ll_get_coherency_base() attempts to decide
whether the coherency fabric is mapped by testing the value of
coherency_base, which carries its virtual address if its mapped, and
0x0 otherwise.

However, what the code actually does is take the virtual address of
the coherency_base symbol, and compare it with 0x0, which are never
equal, and so the branch is never taken. In fact, with the MMU off,
dereferencing the VA of coherency_base is not possible to begin with,
nor can its value be relied upon with the MMU off since it is not
cleaned to the Dcache as is done with coherency_phys_base in
armada_370_coherency_init().

Instead, the value of coherency_phys_base is returned, which results
in the correct behavior since it will be 0x0 as well if the coherency
fabric is not mapped, and it is accessible with the MMU off. So just
drop the comparison and the branch.

Fixes: 30cdef9710 ("ARM: mvebu: make the coherency_ll.S functions work with no coherency fabric")
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-09-24 10:19:06 +02:00
Alexandre Torgue
71593c519f ARM: dts: stm32: add arm-pmu node on stm32mp15
Add arm-pmu node on stm32mp15.

Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Marek Vasut <marex@denx.de> # update to linux-next
Tested-by: Marek Vasut <marex@denx.de> # on DH PDK2 and Avenger96
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Christophe Kerello
fdcf9ea31c ARM: dts: stm32: add FMC2 EBI support for stm32mp157c
This patch adds FMC2 External Bus Interface support on stm32mp157c.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Ahmad Fatoum
bae2b7f677 ARM: dts: stm32: lxa-mc1: enable DDR50 mode on eMMC
The "eMMC high-speed DDR mode (3.3V I/O)" at 50MHz is supported on
the eMMC-interface of the lxa-mc1. Set it in the device tree to
benefit from the speed improvement.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Holger Assmann <h.assmann@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
57592d2a98 ARM: dts: stm32: Fix DH PDK2 display PWM channel
The display PWM channel is number 3 (PWM2 CH4), make it so.

Fixes: 34e0c7847d ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
3c5c0eee95 ARM: dts: stm32: Enable RTS/CTS for DH AV96 UART7
The DH AV96 has RTS/CTS lines available on UART7, describe them in DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
9ad98319e9 ARM: dts: stm32: Swap PHY reset GPIO and TSC2004 IRQ on DHCOM SOM
On the production revision of the SoM, 587-200, the PHY reset GPIO and
touchscreen IRQs are swapped to prevent collision between EXTi IRQs,
reflect that in DT.

Fixes: 34e0c7847d ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Tobias Schramm
862f5c7ebc ARM: dts: stm32: use stm32h7 usart compatible string for stm32h743
Previously the FIFO on the stm32h743 usart was not utilized, because
the stm32f7 compatible configures it without FIFO support.

Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Tobias Schramm
33aa488086 ARM: dts: stm32: add resets property to spi device nodes on stm32h743
The stm32 spi driver tries to determine the fifo size of spi devices
dynamically. However, if the spi was already configured by the bootloader
the fifo size check can become an endless loop, because the driver
expects the spi to be in its initial "after device reset" state. The
driver does already support resetting the spi device at probe, thus this
patch adds only the required device tree properties

Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Tobias Schramm
9fc3729183 ARM: dts: stm32: add display controller node to stm32h743
Declare LTDC (display controller) on stm32h743.

Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
d0ce6f1be3 ARM: dts: stm32: Enable RTS/CTS for DH PDK2 UART8
The DH PDK2 has RTS/CTS lines available on UART8, describe them in DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
30e9af4ba3 ARM: dts: stm32: Drop QSPI CS2 pinmux on DHCOM
The QSPI CS2 is not used on DHCOM, remove the pinmux settings.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
9e8f500af7 ARM: dts: stm32: Add STM32MP1 UART8 RTS/CTS pinmux
Add extra RTS/CTS line pinmux for STM32MP1 UART8.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Acked-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marcin Sloniewski
be78ab4f63 ARM: dts: stm32: add initial support for stm32mp157-odyssey board
Add support for Seeed Studio's stm32mp157c odyssey board.
Board consists of SoM with stm32mp157c with 4GB eMMC and 512 MB DDR3 RAM
and carrier board with USB and ETH interfaces, SD card connector,
wifi and BT chip AP6236.

In this patch only basic kernel boot is supported and interfacing
SD card and on-board eMMC.

Signed-off-by: Marcin Sloniewski <marcin.sloniewski@gmail.com>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Holger Assmann
42a31ac669 ARM: dts: stm32: lxa-mc1: Fix kernel warning about PHY delays
The KSZ9031 PHY skew timings for rxc/txc, originally set to achieve
the desired phase shift between clock- and data-signal, now trigger a
kernel warning when used in rgmii-id mode:

 *-skew-ps values should be used only with phy-mode = "rgmii"

This is because commit bcf3440c6d ("net: phy: micrel: add phy-mode
support for the KSZ9031 PHY") now configures own timings when
phy-mode = "rgmii-id". Device trees wanting to set their own delays
should use phy-mode "rgmii" instead as the warning prescribes.

The "standard" timings now used with "rgmii-id" work fine on this
board, so drop the explicit timings in the device tree and thereby
silence the warning.

Fixes: 666b5ca85c ("ARM: dts: stm32: add STM32MP1-based Linux Automation MC-1 board")
Signed-off-by: Holger Assmann <h.assmann@pengutronix.de>
Acked-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
4e0ec51f8b ARM: dts: stm32: Add USB OTG support to DH PDK2
The DH PDK2 board is capable of USB OTG on the X14 USB Mini-AB connector,
fill in the missing bits to make USB OTG possible instead of peripheral.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
1ad6e36ec2 ARM: dts: stm32: Fix sdmmc2 pins on AV96
The AV96 uses sdmmc2_d47_pins_c and sdmmc2_d47_sleep_pins_c, which
differ from sdmmc2_d47_pins_b and sdmmc2_d47_sleep_pins_b in one
pin, SDMMC2_D5, which is PA15 in the former and PA9 in the later.
The PA15 is correct on AV96, so fix this. This error is likely a
result of rebasing across the stm32mp1 DT pinctrl rework.

Fixes: 611325f681 ("ARM: dts: stm32: Add eMMC attached to SDMMC2 on AV96")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
fde180f06d ARM: dts: stm32: Add DHSOM based DRC02 board
Add DT for DH DRC02 unit, which is a universal controller device.
The system has two ethernet ports, two CANs, RS485 and RS232, USB,
capacitive buttons and an OLED display.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Marek Vasut
b0a07f6096 ARM: dts: stm32: Move ethernet PHY into DH SoM DT
The PHY and the VIO regulator is populated on the SoM, move it
into the SoM DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Tony Lindgren
8f04aea048 ARM: OMAP2+: Restore MPU power domain if cpu_cluster_pm_enter() fails
If cpu_cluster_pm_enter() fails, we need to set MPU power domain back
to enabled to prevent the next WFI from potentially triggering an
undesired MPU power domain state change.

We already do this for omap_enter_idle_smp() but are missing it for
omap_enter_idle_coupled().

Fixes: 55be2f5033 ("ARM: OMAP2+: Handle errors for cpu_pm")
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-23 10:39:33 +03:00
Linus Torvalds
d3017135c4 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Pull networking fixes from Jakub Kicinski:

 - fix failure to add bond interfaces to a bridge, the offload-handling
   code was too defensive there and recent refactoring unearthed that.
   Users complained (Ido)

 - fix unnecessarily reflecting ECN bits within TOS values / QoS marking
   in TCP ACK and reset packets (Wei)

 - fix a deadlock with bpf iterator. Hopefully we're in the clear on
   this front now... (Yonghong)

 - BPF fix for clobbering r2 in bpf_gen_ld_abs (Daniel)

 - fix AQL on mt76 devices with FW rate control and add a couple of AQL
   issues in mac80211 code (Felix)

 - fix authentication issue with mwifiex (Maximilian)

 - WiFi connectivity fix: revert IGTK support in ti/wlcore (Mauro)

 - fix exception handling for multipath routes via same device (David
   Ahern)

 - revert back to a BH spin lock flavor for nsid_lock: there are paths
   which do require the BH context protection (Taehee)

 - fix interrupt / queue / NAPI handling in the lantiq driver (Hauke)

 - fix ife module load deadlock (Cong)

 - make an adjustment to netlink reply message type for code added in
   this release (the sole change touching uAPI here) (Michal)

 - a number of fixes for small NXP and Microchip switches (Vladimir)

[ Pull request acked by David: "you can expect more of this in the
  future as I try to delegate more things to Jakub" ]

* git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (167 commits)
  net: mscc: ocelot: fix some key offsets for IP4_TCP_UDP VCAP IS2 entries
  net: dsa: seville: fix some key offsets for IP4_TCP_UDP VCAP IS2 entries
  net: dsa: felix: fix some key offsets for IP4_TCP_UDP VCAP IS2 entries
  inet_diag: validate INET_DIAG_REQ_PROTOCOL attribute
  net: bridge: br_vlan_get_pvid_rcu() should dereference the VLAN group under RCU
  net: Update MAINTAINERS for MediaTek switch driver
  net/mlx5e: mlx5e_fec_in_caps() returns a boolean
  net/mlx5e: kTLS, Avoid kzalloc(GFP_KERNEL) under spinlock
  net/mlx5e: kTLS, Fix leak on resync error flow
  net/mlx5e: kTLS, Add missing dma_unmap in RX resync
  net/mlx5e: kTLS, Fix napi sync and possible use-after-free
  net/mlx5e: TLS, Do not expose FPGA TLS counter if not supported
  net/mlx5e: Fix using wrong stats_grps in mlx5e_update_ndo_stats()
  net/mlx5e: Fix multicast counter not up-to-date in "ip -s"
  net/mlx5e: Fix endianness when calculating pedit mask first bit
  net/mlx5e: Enable adding peer miss rules only if merged eswitch is supported
  net/mlx5e: CT: Fix freeing ct_label mapping
  net/mlx5e: Fix memory leak of tunnel info when rule under multipath not ready
  net/mlx5e: Use synchronize_rcu to sync with NAPI
  net/mlx5e: Use RCU to protect rq->xdp_prog
  ...
2020-09-22 14:43:50 -07:00
Cristian Ciocaltea
47be1cdee7 ARM: dts: owl-s500: Add RoseapplePi
Add a Device Tree for the RoseapplePi SBC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Peter Korsgaard <peter@korsgaard.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2020-09-22 12:45:59 +05:30
Cristian Ciocaltea
55f6c9931f ARM: dts: owl-s500: Fix incorrect PPI interrupt specifiers
The PPI interrupts for cortex-a9 were incorrectly specified, fix them.

Fixes: fdfe7f4f9d ("ARM: dts: Add Actions Semi S500 and LeMaker Guitar")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Peter Korsgaard <peter@korsgaard.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2020-09-22 12:45:52 +05:30
Matheus Castello
874a36f057 ARM: dts: Add Caninos Loucos Labrador v2
Add Device Trees for Caninos Loucos Labrador CoM Core v2 and base board
M v1. Based on the work of Andreas Färber on Lemaker Guitar device tree.

Signed-off-by: Matheus Castello <matheus@castello.eng.br>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2020-09-22 12:45:35 +05:30
Krzysztof Kozlowski
05b0852ec9 ARM: dts: imx6qdl-gw5xxx: correct interrupt flags
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags.
These are simple defines so they could be used in DTS but they will not
have the same meaning:
1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE
2. GPIO_ACTIVE_LOW  = 1 = IRQ_TYPE_EDGE_RISING

Correct the interrupt flags, assuming the author of the code wanted same
logical behavior behind the name "ACTIVE_xxx", this is:
  ACTIVE_LOW  => IRQ_TYPE_LEVEL_LOW

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 14:36:28 +08:00
Fabio Estevam
b70c9cacbf ARM: imx: Remove unused definitions
Most of the definitions for peripheral base addresses, interrupt and
DMA information is no longer used, so get rid of them.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 14:08:13 +08:00
Fabio Estevam
f68ea682d1 ARM: imx35: Retrieve the IIM base address from devicetree
Now that imx35 has been converted to a devicetree-only platform,
retrieve the IIM base address from devicetree.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 14:08:11 +08:00
Fabio Estevam
445cf02cad ARM: imx3: Retrieve the AVIC base address from devicetree
Now that imx31 and imx35 has been converted to a devicetree-only platform,
retrieve the AVIC base address from devicetree.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 14:08:08 +08:00
Fabio Estevam
2cf98d1295 ARM: imx3: Retrieve the CCM base address from devicetree
Now that imx31 and imx35 has been converted to a devicetree-only platform,
retrieve the CCM base address from devicetree.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 14:08:06 +08:00
Fabio Estevam
3172225d45 ARM: imx31: Retrieve the IIM base address from devicetree
Now that imx31 has been converted to a devicetree-only platform,
retrieve the IIM base address from devicetree.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 14:08:03 +08:00
Fabio Estevam
d54debc72f ARM: imx27: Retrieve the CCM base address from devicetree
Now that imx27 has been converted to a devicetree-only platform,
retrieve the CCM base address from devicetree.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 14:08:00 +08:00
Fabio Estevam
94b2bec1b0 ARM: imx27: Retrieve the SYSCTRL base address from devicetree
Now that imx27 has been converted to a devicetree-only platform,
retrieve the SYSCTRL base address from devicetree.

To keep devicetree compatibilty the SYSCTRL base address will be
retrieved from the CCM base address plus an 0x800 offset.

This is not a problem as the imx27.dtsi describes the CCM register
range as 0x1000.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 14:07:46 +08:00
Fabio Estevam
55df2079eb ARM: dts: imx6q-logicpd: Use GPIO chipselect
Using the native SPI chipselect on i.MX6 is known to be problematic.

Doing it on a imx6q-sabresd causes the SPI NOR probe to fail:

[    5.388704] spi-nor spi0.0: unrecognized JEDEC id bytes: 00 00 00 00 00 00

Use the GPIO chipselect to avoid such problem.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 10:13:41 +08:00
Fabio Estevam
dd1d4def68 ARM: dts: imx: Add an entry for imx6q-logicpd.dtb
Add an entry for imx6q-logicpd.dtb so that it can be built by default.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 10:13:30 +08:00
Fabio Estevam
9249d28698 ARM: dts: imx6q-logicpd: Add a specific board compatible string
It is standard practice to have a specific board compatible string, so
pass "logicpd,imx6q-logicpd".

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 10:13:16 +08:00
Krzysztof Kozlowski
dcdd4f2e82 ARM: dts: imx6q: align GPIO hog names with dtschema
dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix.  While
touching the hogs, fix indentation (spaces -> tabs).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22 09:59:55 +08:00
Frank Wunderlich
36f0a5fc52 arm: dts: mt7623: add missing pause for switchport
port6 of mt7530 switch (= cpu port 0) on bananapi-r2 misses pause option
which causes rx drops on running iperf.

Fixes: f4ff257cd1 ("arm: dts: mt7623: add support for Bananapi R2 (BPI-R2) board")
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200907070517.51715-1-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-21 12:03:52 +02:00
Lorenzo Pieralisi
fc177304d1 ARM/PCI: Remove unused fields from struct hw_pci
The msi_ctrl, io_optional and align_resource fields in struct hw_pci are
currently unused by arm/mach PCI host controller drivers and we won't
be adding any new users.

Remove them and related code.

Link: https://lore.kernel.org/r/20200904141607.4066-1-lorenzo.pieralisi@arm.com
Link: https://lore.kernel.org/r/20200916103045.28651-1-lorenzo.pieralisi@arm.com
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Russell King <linux@armlinux.org.uk>
2020-09-18 22:39:09 +01:00
Valentin Schneider
15e5d5b45b arch_topology, arm, arm64: define arch_scale_freq_invariant()
arch_scale_freq_invariant() is used by schedutil to determine whether
the scheduler's load-tracking signals are frequency invariant. Its
definition is overridable, though by default it is hardcoded to 'true'
if arch_scale_freq_capacity() is defined ('false' otherwise).

This behaviour is not overridden on arm, arm64 and other users of the
generic arch topology driver, which is somewhat precarious:
arch_scale_freq_capacity() will always be defined, yet not all cpufreq
drivers are guaranteed to drive the frequency invariance scale factor
setting. In other words, the load-tracking signals may very well *not*
be frequency invariant.

Now that cpufreq can be queried on whether the current driver is driving
the Frequency Invariance (FI) scale setting, the current situation can
be improved. This combines the query of whether cpufreq supports the
setting of the frequency scale factor, with whether all online CPUs are
counter-based FI enabled.

While cpufreq FI enablement applies at system level, for all CPUs,
counter-based FI support could also be used for only a subset of CPUs to
set the invariance scale factor. Therefore, if cpufreq-based FI support
is present, we consider the system to be invariant. If missing, we
require all online CPUs to be counter-based FI enabled in order for the
full system to be considered invariant.

If the system ends up not being invariant, a new condition is needed in
the counter initialization code that disables all scale factor setting
based on counters.

Precedence of counters over cpufreq use is not important here. The
invariant status is only given to the system if all CPUs have at least
one method of setting the frequency scale factor.

Signed-off-by: Valentin Schneider <valentin.schneider@arm.com>
Signed-off-by: Ionela Voinescu <ionela.voinescu@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2020-09-18 19:11:20 +02:00
Marc Zyngier
ac15a54e03 arm: Move ipi_teardown() to a CONFIG_HOTPLUG_CPU section
ipi_teardown() is only used when CONFIG_HOTPLUG_CPU is enabled.
Move the function to a location guarded by this config option.

Signed-off-by: Marc Zyngier <maz@kernel.org>
2020-09-18 17:40:48 +01:00
Jim Quinlan
e0d072782c dma-mapping: introduce DMA range map, supplanting dma_pfn_offset
The new field 'dma_range_map' in struct device is used to facilitate the
use of single or multiple offsets between mapping regions of cpu addrs and
dma addrs.  It subsumes the role of "dev->dma_pfn_offset" which was only
capable of holding a single uniform offset and had no region bounds
checking.

The function of_dma_get_range() has been modified so that it takes a single
argument -- the device node -- and returns a map, NULL, or an error code.
The map is an array that holds the information regarding the DMA regions.
Each range entry contains the address offset, the cpu_start address, the
dma_start address, and the size of the region.

of_dma_configure() is the typical manner to set range offsets but there are
a number of ad hoc assignments to "dev->dma_pfn_offset" in the kernel
driver code.  These cases now invoke the function
dma_direct_set_offset(dev, cpu_addr, dma_addr, size).

Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
[hch: various interface cleanups]
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Nathan Chancellor <natechancellor@gmail.com>
2020-09-17 18:43:56 +02:00
Christoph Hellwig
cf141ae989 ARM/keystone: move the DMA offset handling under ifdef CONFIG_ARM_LPAE
The DMA offset notifier can only be used if PHYS_OFFSET is at least
KEYSTONE_HIGH_PHYS_START, which can't be represented by a 32-bit
phys_addr_t.  Currently the code compiles fine despite that, a pending
change to the DMA offset handling would create a compiler warning for
this case.  Add an ifdef to not compile the code except for LPAE
configs.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
2020-09-17 18:43:24 +02:00
Christoph Hellwig
3799e402a4 ARM/dma-mapping: move various helpers from dma-mapping.h to dma-direct.h
Move the helpers to translate to and from direct mapping DMA addresses
to dma-direct.h.  This not only is the most logical place, but the new
placement also avoids dependency loops with pending commits.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
2020-09-17 18:43:24 +02:00
Christoph Hellwig
002a26fb55 ARM/dma-mapping: remove dma_to_virt
dma_to_virt is entirely unused, remove it.

Signed-off-by: Christoph Hellwig <hch@lst.de>
2020-09-17 18:43:24 +02:00
Christoph Hellwig
f982438e82 ARM/dma-mapping: remove a __arch_page_to_dma #error
The __arch_page_to_dma hook is long gone.

Signed-off-by: Christoph Hellwig <hch@lst.de>
2020-09-17 18:43:24 +02:00
Martin Cerveny
96820e359e
ARM: dts: sun8i: v3s: Enable crypto engine
V3s contains crypto engine that is compatible with A33.
Add device tree node.

Signed-off-by: Martin Cerveny <m.cerveny@computer.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200907162458.23730-3-m.cerveny@computer.org
2020-09-17 18:37:32 +02:00
Samuel Holland
44967e8182
ARM: dts: sun8i: a33: Update codec widget names
The sun8i-codec driver introduced a new set of DAPM widgets that more
accurately describe the hardware topology. Update the various device
trees to use the new widget names.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200726012557.38282-6-samuel@sholland.org
2020-09-17 18:37:31 +02:00
Jernej Skrabec
a770df83d8
ARM: dts: sun8i: r40: Add video engine node
Allwinner R40 SoC has a video engine.

Add a node for it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200825173523.1289379-6-jernej.skrabec@siol.net
2020-09-17 18:37:31 +02:00
David Heidelberg
c2ef3aa464 ARM: tegra: nexus7: Add SMB347 battery charger
SMB347 is a battery charger controller which is found on the Nexus 7
device.

Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:40 +02:00
Dmitry Osipenko
c82ef94b3a ARM: tegra: nexus7: Add touchscreen
Nexus 7 2012 has Elantech EKTF3624 touchscreen, this patch adds TS node to
the device-tree.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:40 +02:00
Dmitry Osipenko
17110cbbef ARM: tegra: nexus7: Use PLLC for WiFi MMC clock parent
The default parent for all MMCs is PLLP, which is running at 408 MHz on
Tegra30 and 50 MHz clock can't be derived from PLLP. The maximum SDIO
clock rate is 50 MHz, but this rate isn't achievable using PLLP.

Let's switch the WiFi MMC clock parent to PLLC in order to get true 50
MHz. This patch doesn't fix any problems, it's just a minor improvement.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:40 +02:00
Dmitry Osipenko
98e710a017 ARM: tegra: acer-a500: Use PLLC for WiFi MMC clock parent
The default parent for all MMCs is PLLP, which is running at 216 MHz on
Tegra20 and 50 MHz clock can't be derived from PLLP. The maximum SDIO
clock rate is 50 MHz, but this rate isn't achievable using PLLP.

Let's switch the WiFi MMC clock parent to PLLC in order to get true 50
MHz. This patch doesn't fix any problems, it's just a minor improvement.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:39 +02:00
Dmitry Osipenko
a252efadf3 ARM: tegra: acer-a500: Set WiFi MMC clock rate to 50 MHz
Previously 50MHz clock rate didn't work because of the wrong PINCTRL
configuration used for SDIO pins. Now the PINCTRL config is corrected
and the MMC clock rate could be bumped safely to 50MHz, increasing WiFi
TX throughput by 20 Mbit/s and allowing to hit the maximum 40 Mbit/s.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:38 +02:00
Dmitry Osipenko
eb885f5ef7 ARM: tegra: acer-a500: Correct PINCTRL configuration
The low-power-mode drive was set to DIV_4 for some of PINCTRL groups,
while these groups should use DIV_1. This patch fixes the wrong PINCTRL
configurations and adds a full drive-setup for the changed configs, just
for completeness since the added values match the default configuration.

Now WiFi SDIO communication works properly using legacy signaling mode if
SDIO BUS clocked at 50MHz, which is a maximum SDIO clock rate on Tegra20.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:38 +02:00
Dmitry Osipenko
878fd50925 ARM: tegra: acer-a500: Remove atmel,cfg_name property
This property was supposed to be upstreamed, but it was NAKed recently
in a favor to a better approach of firmware loading. It also turned
out that the firmware loading isn't really necessary because it's stored
in a non-volatile memory inside of the touchscreen controller and
previously the FW loading was needed in order to get touchscreen working,
but it actually was a TS driver problem which is resolved now. Hence
remove the unsupported property.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:38 +02:00
Dmitry Osipenko
21806bb0a1 ARM: tegra: acer-a500: Add aliases for MMC
MMC core now supports binding to a specific ID, which is very handy for
embedded devices, like Acer A500, because MMC ID may change depending on
kernel version or configuration which affects MMC driver probe order.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:38 +02:00
Dmitry Osipenko
110a580342 ARM: tegra: nexus7: Add aliases for MMC
MMC core now supports binding to a specific ID, which is very handy for
embedded devices, like Nexus 7, because MMC ID may change depending on
kernel version or configuration which affects MMC driver probe order.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 18:09:37 +02:00
Marc Zyngier
5ebf353af2 ARM: Remove custom IRQ stat accounting
Let's switch the arm code to the core accounting, which already
does everything we need.

Reviewed-by: Valentin Schneider <valentin.schneider@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
2020-09-17 16:37:28 +01:00
Marc Zyngier
8aa837cb7a ARM: Kill __smp_cross_call and co
The old IPI registration interface is now unused on arm, so let's
get rid of it.

Reviewed-by: Valentin Schneider <valentin.schneider@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
2020-09-17 16:37:28 +01:00
Krzysztof Kozlowski
0df3c29f68 ARM: s3c64xx: bring back notes from removed debug-macro.S
Documentation references notes from a removed debug-macro.S file so
bring the contents here.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200911143343.498-3-krzk@kernel.org
2020-09-16 19:48:23 +02:00
Krzysztof Kozlowski
6995a4c463 ARM: dts: s5pv210: replace deprecated "gpios" i2c-gpio property in Goni
"gpios" property is deprecated.  Update the Goni DTS to fix
dtbs_checks warnings like:

  i2c-pmic: 'sda-gpios' is a required property
  i2c-pmic: 'scl-gpios' is a required property

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-24-krzk@kernel.org
2020-09-16 19:17:25 +02:00
Krzysztof Kozlowski
ddeb5e7d3d ARM: dts: s5pv210: replace deprecated "gpios" i2c-gpio property in Aquila
"gpios" property is deprecated.  Update the Aquila DTS to fix
dtbs_checks warnings like:

  i2c-pmic: 'sda-gpios' is a required property
  i2c-pmic: 'scl-gpios' is a required property

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-23-krzk@kernel.org
2020-09-16 19:16:55 +02:00
Krzysztof Kozlowski
8fbc73dc57 ARM: dts: s5pv210: move fixed regulators under root node in Goni
The fixed regulators are kept under dedicated "regulators" node but this
causes multiple dtschema warnings:

  regulators: $nodename:0: 'regulators' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
  regulators: #size-cells:0:0: 0 is not one of [1, 2]
  regulators: fixed-regulator@0:reg:0: [0] is too short
  regulators: fixed-regulator@1:reg:0: [1] is too short
  regulators: fixed-regulator@2:reg:0: [2] is too short
  regulators: fixed-regulator@3:reg:0: [3] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-22-krzk@kernel.org
2020-09-16 19:16:24 +02:00
Krzysztof Kozlowski
bb4e986068 ARM: dts: s5pv210: move fixed regulators under root node in Aquila
The fixed regulators are kept under dedicated "regulators" node but this
causes multiple dtschema warnings:

  regulators: $nodename:0: 'regulators' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
  regulators: #size-cells:0:0: 0 is not one of [1, 2]
  regulators: fixed-regulator@0:reg:0: [0] is too short
  regulators: fixed-regulator@1:reg:0: [1] is too short
  regulators: fixed-regulator@2:reg:0: [2] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-21-krzk@kernel.org
2020-09-16 19:16:17 +02:00
Krzysztof Kozlowski
3a3a5a59ee ARM: dts: exynos: Align OPP table name with dt-schema
Device tree nodes should have hyphens instead of underscores.  This is
also expected by the bindings.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200903191438.12781-5-krzk@kernel.org
2020-09-16 19:12:06 +02:00
Krzysztof Kozlowski
a0663189ac ARM: s3c24xx: fix Wunused-variable warning on !MMU
If S3C24xx machine code is build without CONFIG_MMU, the iotable()
macros do nothing so annotate structures to get rid of warnings:

  arch/arm/mach-s3c24xx/common.c:140:24: warning: ‘s3c_iodesc’ defined but not used [-Wunused-variable]
  arch/arm/mach-s3c24xx/s3c2410.c:49:24: warning: ‘s3c2410_iodesc’ defined but not used [-Wunused-variable]
  arch/arm/mach-s3c24xx/s3c2412.c:60:24: warning: ‘s3c2412_iodesc’ defined but not used [-Wunused-variable]
  arch/arm/mach-s3c24xx/s3c2416.c:54:24: warning: ‘s3c2416_iodesc’ defined but not used [-Wunused-variable]
  arch/arm/mach-s3c24xx/s3c2443.c:45:24: warning: ‘s3c2443_iodesc’ defined but not used [-Wunused-variable]
  arch/arm/mach-s3c24xx/s3c244x.c:44:24: warning: ‘s3c244x_iodesc’ defined but not used [-Wunused-variable]

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200910154150.3318-2-krzk@kernel.org
2020-09-16 19:09:52 +02:00
Krzysztof Kozlowski
7be0d19c75 ARM: samsung: fix PM debug build with DEBUG_LL but !MMU
Selecting CONFIG_SAMSUNG_PM_DEBUG (depending on CONFIG_DEBUG_LL) but
without CONFIG_MMU leads to build errors:

  arch/arm/plat-samsung/pm-debug.c: In function ‘s3c_pm_uart_base’:
  arch/arm/plat-samsung/pm-debug.c:57:2: error:
    implicit declaration of function ‘debug_ll_addr’ [-Werror=implicit-function-declaration]

Fixes: 99b2fc2b8b ("ARM: SAMSUNG: Use debug_ll_addr() to get UART base address")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200910154150.3318-1-krzk@kernel.org
2020-09-16 18:58:53 +02:00
Ard Biesheuvel
6208857b8f efi/libstub: arm32: Base FDT and initrd placement on image address
The way we use the base of DRAM in the EFI stub is problematic as it
is ill defined what the base of DRAM actually means. There are some
restrictions on the placement of FDT and initrd which are defined in
terms of dram_base, but given that the placement of the kernel in
memory is what defines these boundaries (as on ARM, this is where the
linear region starts), it is better to use the image address in these
cases, and disregard dram_base altogether.

Reviewed-by: Maxim Uvarov <maxim.uvarov@linaro.org>
Tested-by: Maxim Uvarov <maxim.uvarov@linaro.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2020-09-16 18:53:42 +03:00
Alexandre Belloni
860b6d803f ARM: dts: at91: sama5d2: add missing flexcom spi node properties
SPI nodes require #address-cells and #size-cells add those properties in
the flexcom spi nodes.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20200831171129.3886857-8-alexandre.belloni@bootlin.com
2020-09-16 10:45:32 +02:00
Alexandre Belloni
996710a895 ARM: dts: at91: add unit-address to memory node
The memory node requires a unit-address, add it.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20200831171129.3886857-7-alexandre.belloni@bootlin.com
2020-09-16 10:45:32 +02:00
Alexandre Belloni
b0d0c3bba9 ARM: dts: at91: move mmc pinctrl-names property to board dts
Having the pinctrl-names property in the dtsi leads to dtbs_check warnings
when the board dts doesn't define pinctrl-0. Instead, move the property to
the board dts actually using the mmc node.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20200831171129.3886857-5-alexandre.belloni@bootlin.com
2020-09-16 10:45:21 +02:00
Viresh Kumar
7162fc2e4e ARM: tegra: Pass multiple versions in opp-supported-hw property
We can now pass multiple versions in "opp-supported-hw" property, lets
do that and simplify the tables a bit.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-09-16 14:02:33 +05:30
Russell King
adc5f70293 ARM: add malloc size to decompressor kexec size structure
Add the required malloc size to the decompressor kexec size structure.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:36:26 +01:00
Russell King
83dfeedb66 ARM: add TEXT_OFFSET to decompressor kexec image structure
Add the TEXT_OFFSET to the decompressor's kexec image structure to
kexec knows what offset to use.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:36:25 +01:00
Guillaume Tucker
8e007b367a ARM: 9007/1: l2c: fix prefetch bits init in L2X0_AUX_CTRL using DT values
The L310_PREFETCH_CTRL register bits 28 and 29 to enable data and
instruction prefetch respectively can also be accessed via the
L2X0_AUX_CTRL register.  They appear to be actually wired together in
hardware between the registers.  Changing them in the prefetch
register only will get undone when restoring the aux control register
later on.  For this reason, set these bits in both registers during
initialisation according to the devicetree property values.

Link: https://lore.kernel.org/lkml/76f2f3ad5e77e356e0a5b99ceee1e774a2842c25.1597061474.git.guillaume.tucker@collabora.com/

Fixes: ec3bd0e68a ("ARM: 8391/1: l2c: add options to overwrite prefetching behavior")
Signed-off-by: Guillaume Tucker <guillaume.tucker@collabora.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:35:53 +01:00
Linus Walleij
c03e41470e ARM: 9010/1: uncompress: Print the location of appended DTB
When using the kernel with an appended DTB it is useful to
know where this will end up in the physical memory at the
time the kernel boots.

We add a debug print macro that will help out with this.
Here is a sample debug print after passing -DDEBUG to head.S
during compilation:

DTB:0x40CEBA70 (0x000051B5)
C:0x402080C0-0x40CF0CE0->0x41801D00-0x422EA920
DTB:0x422E56B0 (0x00005262)

This means that the appended DTB is first found after the
compressed kernel at 0x40CEBA70 of size 0x51B5 and then
after the compressed kernel is moved to 0x41801D00
it is found again at 0x422E56B0 and is there size 0x5262.

The growth in size of the FDT is due to the call to
atags_to_fdt() that augments the DTB with ATAG information.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:35:32 +01:00
Linus Walleij
2596a72d33 ARM: 9009/1: uncompress: Enable debug in head.S
The assembly file head.S includes some debug code that does
not get enabled when we select CONFIG_DEBUG_UNCOMPRESS.
The debug in head.S relies on the user tagging on -DDEBUG
on the compilation command line.

To simplify debugging, tag on -DDEBUG so that we also get
these debug messages when selecting CONFIG_DEBUG_UNCOMPRESS.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:35:31 +01:00
Linus Walleij
30d9a34dd3 ARM: 9008/1: uncompress: Drop excess whitespace print
This drops some whitespace from the debug message about
where we move the compressed kernel: r after the message
is completely surplus since the putc routine will anyway
add r after n, and the initial linefeed just assumes
that this will always be the first message on the console,
which is not certain to be true.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:35:30 +01:00
Linus Walleij
0b0c1dbd50 ARM: 9006/1: uncompress: Wait for ready and busy in debug prints
For some platforms such as Qualcomm we need to wait for the
UART to be ready before writing characters to the UART
in the same manner as the macro in debug.S used with the
main "Uncompressing Linux ..." text. Pass an extra temporary
variable to writeb and make it call waituarttxrdy and
busyuart just like the other decomression messages.

Optionally it will also call waituartcts if and only if
CONFIG_DEBUG_UART_FLOW_CONTROL is selected.

After this the decompression debug messages work fine on
Qualcomm platforms if you compile head.S with -DDEBUG.

Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:35:29 +01:00
Linus Walleij
4df24fef09 ARM: 9005/1: debug: Select flow control for all debug UARTs
Instead of a flow control selection mechanism specifically for
8250, make this available for all debug UARTs. If the debug
UART supports waiting for CTS to be asserted, then this code
can be activated for terminals that need it.

We keep the defaults for EBSA110, Footbridge, Gemini and RPC
so that this still works as expected for these older platforms:
they assume that flow control shall be enabled for debug
prints.

I switch the location of the check for
ifdef CONFIG_DEBUG_UART_FLOW_CONTROL from the actual debug
UART drivers: the code would get compiled-out for 8250 and
Tegra unless their custom config (or passing -DFLOW_CONTROL
in the Tegra case) was not set. Instead this is conditional
at the three places where we print debug messages. The idea
is that debug UARTs can be implemented without this ifdef
boilerplate so they look cleaner, alas the ifdef has to be
somewhere.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:35:28 +01:00
Linus Walleij
2c50a570e9 ARM: 9004/1: debug: Split waituart to CTS and TXRDY
This patch was triggered by a remark from Russell that
introducing a call to the waituart (needed to fix debug prints
on the Qualcomm platforms) was dangerous because in some cases
this will involve waiting for a modem CTS (clear to send)
signal, and debug messages would maybe not work on platforms
with no modem connected to the UART port: they will just
hang waiting for the modem to assert CTS and this might never
happen.

Looking through all UART debug drivers implementing the waituart
macro I discovered that all users except two actually use this
macro to check if the UART is ready for TX, let's call this
TXRDY.

Only two debug UART drivers actually check for CTS:
- arch/arm/include/debug/8250.S
- arch/arm/include/debug/tegra.S

The former is very significant since the 8250 is possibly
the most common UART on the planet.

We have the following problem: the semantics of waituart are
ambiguous making it dangerous to introduce the macro to debug
code fixing debug prints for Qualcomm. To start to pry this
problem apart, this patch does the following:

- Convert all debug UART drivers to define two macros:

  - waituartcts with the clear semantic to wait for CTS
    to be asserted

  - waituarttxrdy with the clear semantic to wait for the TX
    capability of the UART to be ready

- When doing this take care to assign the right function to
  each drivers macro, so they now do exactly the above.

- Update the three sites in the kernel invoking the waituart
  macro to call waituartcts/waituarttxrdy in sequence, so that
  the functional impact on the kernel should be zero.

After this we can start to change the code sites using this
code to do the right thing.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:35:27 +01:00
Linus Walleij
6428ea2788 ARM: 9003/1: uncompress: Delete unused debug macros
The debug macros debug_reloc_start and debug_reloc_end were
rendered unused in commit 6d7d0ae515
"ARM: 6750/1: improvements to compressed/head.S".

Later on a different debug macro named dbgkc was introduced
in commit f3c899927e
"ARM: 8786/1: Debug kernel copy by printing".

Delete the dead debug code.

Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:35:25 +01:00
Douglas Anderson
22c9e58299 ARM: 8997/2: hw_breakpoint: Handle inexact watchpoint addresses
This is commit fdfeff0f9e ("arm64: hw_breakpoint: Handle inexact
watchpoint addresses") but ported to arm32, which has the same
problem.

This problem was found by Android CTS tests, notably the
"watchpoint_imprecise" test [1].  I tested locally against a copycat
(simplified) version of the test though.

[1] https://android.googlesource.com/platform/bionic/+/master/tests/sys_ptrace_test.cpp

Link: https://lkml.kernel.org/r/20191019111216.1.I82eae759ca6dc28a245b043f485ca490e3015321@changeid

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15 14:35:24 +01:00
Lad Prabhakar
9d8827b27b ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add can0 support to camera DB
This patch enables CAN0 interface exposed through connector J4 on the
camera DB.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200911083615.17377-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-15 09:46:13 +02:00
Lad Prabhakar
a937909702 ARM: dts: r8a7742: Add VSP support
Add VSP support to R8A7742 (RZ/G1H) SoC dtsi.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200911080929.15058-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-15 09:46:13 +02:00
Andre Przywara
3328c65666 ARM: dts: hisilicon: Fix SP805 clocks
The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.

Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-09-14 16:31:06 +08:00
Andre Przywara
c26979a7ac ARM: dts: hisilicon: Fix SP804 users
The SP804 binding only specifies one or three clocks, but does not allow
just two clocks.
The HiSi 3620 .dtsi specified two clocks for the two timers, plus gave
one "apb_pclk" clock-name to appease the primecell bus driver.

Extend the clocks by duplicating the first clock to the end of the clock
list, and add two dummy clock-names to make the primecell driver happy.

I don't know what the real APB clock for the IP is, but with the current
DT the first timer clock was used for that, so this change keeps the
current status.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-09-14 16:15:22 +08:00
Greg Kroah-Hartman
fccee0bace Merge 5.9-rc5 into usb-next
We need the USB fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-09-14 10:10:55 +02:00
Linus Torvalds
5712c3ed54 ARM: SoC fixes
A collection of fixes I've been accruing over the last few weeks, none
 of them have been severe enough to warrant flushing the queue but it's
 been long enough now that it's a good idea to send them in.
 
 A handful of them are fixups for QSPI DT/bindings/compatibles, some
 smaller fixes for system DMA clock control and TMU interrupts on i.MX,
 a handful of fixes for OMAP, including a fix for DSI (display) on omap5.
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Olof Johansson:
 "A collection of fixes I've been accruing over the last few weeks, none
  of them have been severe enough to warrant flushing the queue but it's
  been long enough now that it's a good idea to send them in.

  A handful of them are fixups for QSPI DT/bindings/compatibles, some
  smaller fixes for system DMA clock control and TMU interrupts on i.MX,
  a handful of fixes for OMAP, including a fix for DSI (display) on
  omap5"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (27 commits)
  arm64: dts: ns2: Fixed QSPI compatible string
  ARM: dts: BCM5301X: Fixed QSPI compatible string
  ARM: dts: NSP: Fixed QSPI compatible string
  ARM: dts: bcm: HR2: Fixed QSPI compatible string
  dt-bindings: spi: Fix spi-bcm-qspi compatible ordering
  ARM: dts: imx6sx: fix the pad QSPI1B_SCLK mux mode for uart3
  arm64: dts: imx8mp: correct sdma1 clk setting
  arm64: dts: imx8mq: Fix TMU interrupt property
  ARM: dts: imx7d-zii-rmu2: fix rgmii phy-mode for ksz9031 phy
  ARM: dts: vfxxx: Add syscon compatible with OCOTP
  ARM: dts: imx6q-logicpd: Fix broken PWM
  arm64: dts: imx: Add missing imx8mm-beacon-kit.dtb to build
  ARM: dts: imx6q-prtwd2: Remove unneeded i2c unit name
  ARM: dts: imx6qdl-gw51xx: Remove unneeded #address-cells/#size-cells
  ARM: dts: imx7ulp: Correct gpio ranges
  ARM: dts: ls1021a: fix QuadSPI-memory reg range
  arm64: defconfig: Enable ptn5150 extcon driver
  arm64: defconfig: Enable USB gadget with configfs
  ARM: configs: Update Integrator defconfig
  ARM: dts: omap5: Fix DSI base address and clocks
  ...
2020-09-13 14:54:40 -07:00
Olof Johansson
632db90624 This pull request contains Broadcom ARM-based SoCs changes for 5.10,
please pull the following:
 
 - Florian adds debug UART entries for the 72164 and 72165 SoCs and
   updates ARCH_BRCMSTB to select CONFIG_BCM7038_L1_IRQ which is an
   interrupt controller used with the 7211 chip family
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Merge tag 'arm-soc/for-5.10/soc' of https://github.com/Broadcom/stblinux into arm/soc

This pull request contains Broadcom ARM-based SoCs changes for 5.10,
please pull the following:

- Florian adds debug UART entries for the 72164 and 72165 SoCs and
  updates ARCH_BRCMSTB to select CONFIG_BCM7038_L1_IRQ which is an
  interrupt controller used with the 7211 chip family

* tag 'arm-soc/for-5.10/soc' of https://github.com/Broadcom/stblinux:
  ARM: brcmstb: Add debug UART entry for 72615
  ARM: bcm: Enable BCM7038_L1_IRQ for ARCH_BRCMSTB
  ARM: brcmstb: Add debug UART entry for 72614

Link: https://lore.kernel.org/r/20200912032153.1216354-5-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:38:17 -07:00
Olof Johansson
ba601120cf This pull request contains Broadcom ARM-based SoCs changes for 5.10,
please pull the following:
 
 - Christian adds support for the Cisco Meraki MR32 which is based on the
   BCM53016 SoC, this requires specifying the PWM, second UART and third
   PCIe controller in Device Tree before finally adding support for the
   board.
 
 - Adrian updates the status properties from "ok" to "okay".
 
 - Andre fixes the SP805 watchdog nodes to have the correct clock names
   and binding for both the Cygnus and Northstar Plus (NSP). He does the
   same thing with the SP804 timer node which was missing an
   "arm,primecell" compatible string.
 
 - Maxime enables the BCM2711 (Raspberry Pi 4) display pipeline since all
   DRM changes are ready.
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Merge tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM-based SoCs changes for 5.10,
please pull the following:

- Christian adds support for the Cisco Meraki MR32 which is based on the
  BCM53016 SoC, this requires specifying the PWM, second UART and third
  PCIe controller in Device Tree before finally adding support for the
  board.

- Adrian updates the status properties from "ok" to "okay".

- Andre fixes the SP805 watchdog nodes to have the correct clock names
  and binding for both the Cygnus and Northstar Plus (NSP). He does the
  same thing with the SP804 timer node which was missing an
  "arm,primecell" compatible string.

- Maxime enables the BCM2711 (Raspberry Pi 4) display pipeline since all
  DRM changes are ready.

* tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux:
  ARM: dts: broadcom: Fix SP804 node
  ARM: dts: NSP: Fix SP805 clock-names
  ARM: dts: Cygnus: Fix SP805 clocks
  ARM: dts: NSP: replace status value "ok" by "okay"
  ARM: BCM5301X: Add DT for Meraki MR32
  ARM: dts: bcm2711: Enable the display pipeline
  ARM: dts: BCM5301X: Specify pcie2 in the DT
  ARM: dts: BCM5301X: Specify uart2 in the DT
  ARM: dts: BCM5301X: Specify PWM in the DT
  dt-bindings: ARM: add bindings for the Meraki MR32

Link: https://lore.kernel.org/r/20200912032153.1216354-1-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:34:25 -07:00
Olof Johansson
439a95a044 Various minor cleanups for ARM DTS
Cleanup ARM DTS to remove dtschema validation errors.
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Merge tag 'dt-schema-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Various minor cleanups for ARM DTS

Cleanup ARM DTS to remove dtschema validation errors.

* tag 'dt-schema-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: alpine: Align GIC nodename with dtschema
  ARM: dts: zx: Align L2 cache-controller nodename with dtschema
  ARM: dts: tango: Align L2 cache-controller nodename with dtschema
  ARM: dts: spear: Align L2 cache-controller nodename with dtschema
  ARM: dts: qcom: Align L2 cache-controller nodename with dtschema
  ARM: dts: prima: Align L2 cache-controller nodename with dtschema

Link: https://lore.kernel.org/r/20200911155509.1495-2-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:33:43 -07:00
Olof Johansson
ce726b672b ASPEED defconfig updates for 5.10
- Fix an issue with unwanted media drivers being enabled
 
  - New driver: IBM OP Panel, used on ast2600 systems. This requires
    enabling I2C slave mode
 
  - Enable I2C MUX GPIO driver
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Merge tag 'aspeed-5.10-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/defconfig

ASPEED defconfig updates for 5.10

 - Fix an issue with unwanted media drivers being enabled

 - New driver: IBM OP Panel, used on ast2600 systems. This requires
   enabling I2C slave mode

 - Enable I2C MUX GPIO driver

* tag 'aspeed-5.10-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
  ARM: config: aspeed_g5: Enable IBM OP Panel driver
  ARM: config: aspeed-g5: Enable I2C GPIO mux driver
  ARM: config: aspeed: Fix selection of media drivers

Link: https://lore.kernel.org/r/CACPK8XdFE2K1_cyrg=uaD6CaOm_p0RCRmjAsu6uyFKD4rnDggQ@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:31:54 -07:00
Olof Johansson
679bc80117 ASPEED device tree updates for 5.10
- New machines
 
   * Wistron Mowgli, an AST2500 BMC for a Power9 OpenPower server
 
   * Facebook Wedge400, an AST2500 BMC system which we can assume is 4
     times better than the existing Wedge100 top of rack network switch
 
  - Add a new device, the IBM Operation Panel
 
  - Fixes for Facebook's collection of BMCs
 
  - eMMC and vuart fixes
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Merge tag 'aspeed-5.10-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt

ASPEED device tree updates for 5.10

 - New machines

  * Wistron Mowgli, an AST2500 BMC for a Power9 OpenPower server

  * Facebook Wedge400, an AST2500 BMC system which we can assume is 4
    times better than the existing Wedge100 top of rack network switch

 - Add a new device, the IBM Operation Panel

 - Fixes for Facebook's collection of BMCs

 - eMMC and vuart fixes

* tag 'aspeed-5.10-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
  ARM: dts: aspeed: Add Mowgli BMC platform
  ARM: dts: rainier: Disable internal pull-downs on eMMC pins
  ARM: aspeed: g5: Do not set sirq polarity
  ARM: dts: aspeed: rainier: Add IBM Operation Panel I2C device
  ARM: dts: aspeed: tacoma: Add IBM Operation Panel I2C device
  ARM: dts: aspeed: rainier: Enable XDMA engine
  ARM: dts: aspeed: wedge40: Update UART4 pin settings
  ARM: dts: aspeed: wedge40: Update FMC flash0 label
  ARM: dts: aspeed: Add Facebook Wedge400 BMC
  ARM: dts: aspeed: minipack: Update 64MB FMC flash layout
  ARM: dts: aspeed: yamp: Set 32MB FMC flash layout
  ARM: dts: aspeed: cmm: Set 32MB FMC flash layout
  ARM: dts: aspeed: Remove flash layout from Facebook AST2500 Common dtsi

Link: https://lore.kernel.org/r/CACPK8XcDNBYAHzW6NYB4LFm3YbN63AprgW75ZqS+6uXn2b3kug@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:31:26 -07:00
Olof Johansson
34cfebc0d8 ARMv8 Juno/Vexpress/Fast Models updates for v5.10
A few device tree source fixes to make them fully SP804 timer and
 SP805 watchdog binding compliant.
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Merge tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt

ARMv8 Juno/Vexpress/Fast Models updates for v5.10

A few device tree source fixes to make them fully SP804 timer and
SP805 watchdog binding compliant.

* tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: arm: Fix SP805 clock-names
  ARM: dts: arm: Fix SP805 clocks
  ARM: dts: arm: Fix SP804 users

Link: https://lore.kernel.org/r/20200908135028.GA10106@bogus
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:27:05 -07:00
Olof Johansson
8bc946b1a1 Samsung DTS ARM changes for v5.10
1. Add sound support to Galaxy S3/Midas family (Exynos4412).
 2. Add sound support to Galaxy S/Aries family (S5Pv210).
 3. Configure L2C-310 cache controller via DTS on Exynos4.
 4. Big cleanup of Exynos DTS to fix as many dtschema warnings as
    possible.  This includes adding missing properties (thus e.g.
    enabling S3C RTC clock), correcting existing nodes, renaming of
    nodes and using non-deprecated properties or compatibles.  Except
    mentioned bring up of S3C RTC, this should not have visible
    effect.
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Merge tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM changes for v5.10

1. Add sound support to Galaxy S3/Midas family (Exynos4412).
2. Add sound support to Galaxy S/Aries family (S5Pv210).
3. Configure L2C-310 cache controller via DTS on Exynos4.
4. Big cleanup of Exynos DTS to fix as many dtschema warnings as
   possible.  This includes adding missing properties (thus e.g.
   enabling S3C RTC clock), correcting existing nodes, renaming of
   nodes and using non-deprecated properties or compatibles.  Except
   mentioned bring up of S3C RTC, this should not have visible
   effect.

* tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (49 commits)
  ARM: dts: exynos: Silence SATA PHY warning in Exynos5250
  ARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boards
  ARM: dts: samsung: odroid-xu3: Move assigned-clock* properties to i2s0 node
  ARM: dts: exynos: Use S2MPS11 clock in S3C RTC in SMDK5420
  ARM: dts: exynos: Silence DP HPD pinctrl dtschema warning in Exynos5250 Spring
  ARM: dts: exynos: Use S5M8767 clock in S3C RTC in Exynos5250 Spring
  ARM: dts: exynos: Add max77686 clocks for S3C RTC in SMDK5250
  ARM: dts: exynos: Override thermal by label in Exynos5250
  ARM: dts: exynos: Correct whitespace and indentation issues in Exynos5
  ARM: dts: exynos: Silence i2c-gpio dtschema warning in Exynos5250 Arndale
  ARM: dts: exynos: Correct S3C RTC bindings in SMDK5410
  ARM: dts: exynos: Remove unneeded address/size cells in Exynos5260 GIC
  ARM: dts: exynos: Correct compatible for Exynos5260 GIC
  ARM: dts: exynos: Correct compatible for Exynos5 GIC
  ARM: dts: s5pv210: Enable audio on Aries boards
  ARM: dts: exynos: Correct whitespace and indentation issues
  ARM: dts: exynos: Correct S3C RTC bindings in Tiny4412
  ARM: dts: exynos: Correct S3C RTC bindings in SMDK4412
  ARM: dts: exynos: Add CPU cooling in Tiny4412
  ARM: dts: exynos: Add CPU cooling in SMDK4412
  ...

Link: https://lore.kernel.org/r/20200907150425.11077-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:22:38 -07:00
Olof Johansson
8e299e6193 Renesas ARM DT updates for v5.10
- Increase support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
     board, and its display panel expansion board,
   - Increase support for the RZ/G1H SoC on the iWave RainboW SoM (G21M)
     and Qseven board (G21D),
   - SATA support for the HopeRun HiHope RZ/G2N board,
   - PCIe endpoint support for the RZ/G2M, RZ/G2E, and RZ/G2H SoCs,
   - Audio support for the R-Car M3-W+ SoC.
   - Minor fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.10

  - Increase support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
    board, and its display panel expansion board,
  - Increase support for the RZ/G1H SoC on the iWave RainboW SoM (G21M)
    and Qseven board (G21D),
  - SATA support for the HopeRun HiHope RZ/G2N board,
  - PCIe endpoint support for the RZ/G2M, RZ/G2E, and RZ/G2H SoCs,
  - Audio support for the R-Car M3-W+ SoC.
  - Minor fixes and improvements.

* tag 'renesas-arm-dt-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (39 commits)
  arm64: dts: renesas: Add HiHope RZ/G2H board with idk-1110wr display
  arm64: dts: renesas: r8a774e1: Add cpuidle support for CA5x cores
  arm64: dts: renesas: r8a774e1: Add FDP1 device nodes
  ARM: dts: r8a7742-iwg21d-q7: Enable PCIe Controller
  ARM: dts: r8a7742: Add IPMMU DT nodes
  arm64: dts: renesas: r8a77961: Enable Sound / Audio-DMAC
  arm64: dts: renesas: r8a774e1: Add PWM device nodes
  ARM: dts: r8a7742-iwg21m: Add SPI NOR support
  arm64: dts: renesas: r8a774e1-hihope-rzg2h: Enable HS400 mode
  ARM: dts: r8a7742-iwg21m: Add RTC support
  ARM: dts: r8a7742-iwg21m: Sort the nodes alphabetically
  ARM: dts: r8a7742: Add CAN support
  arm64: dts: renesas: r8a774c0: Add PCIe EP node
  arm64: dts: renesas: r8a774b1: Add PCIe EP nodes
  arm64: dts: renesas: r8a774a1: Add PCIe EP nodes
  ARM: dts: r8a7742: Add QSPI support
  arm64: dts: renesas: r8a774e1-hihope-rzg2h: Setup DU clocks
  arm64: dts: renesas: r8a774e1: Add LVDS device node
  arm64: dts: renesas: r8a774e1: Populate HDMI encoder node
  arm64: dts: renesas: r8a774e1: Populate DU device node
  ...

Link: https://lore.kernel.org/r/20200904114819.30254-3-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:21:23 -07:00
Olof Johansson
714b348cdc Renesas ARM defconfig updates for v5.10
- Enable touchscreen support on the iWave RZ/G1E platform,
   - Update for PCIE_RCAR => CONFIG_PCIE_RCAR_{HOST,EP} split, including
     enabling the latter,
   - Enable FLASH support on various R-Car Gen3 boards,
   - Refresh shmobile_defconfig for v5.9-rc1.
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Merge tag 'renesas-arm-defconfig-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/defconfig

Renesas ARM defconfig updates for v5.10

  - Enable touchscreen support on the iWave RZ/G1E platform,
  - Update for PCIE_RCAR => CONFIG_PCIE_RCAR_{HOST,EP} split, including
    enabling the latter,
  - Enable FLASH support on various R-Car Gen3 boards,
  - Refresh shmobile_defconfig for v5.9-rc1.

* tag 'renesas-arm-defconfig-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: shmobile: defconfig: Enable CONFIG_PCIE_RCAR_HOST
  ARM: multi_v7_defconfig: Enable CONFIG_PCIE_RCAR_HOST
  arm64: defconfig: Enable RPC-IF support
  ARM: shmobile: defconfig: Refresh for v5.9-rc1
  arm64: defconfig: Enable R-Car PCIe endpoint driver
  ARM: shmobile: defconfig: Enable TOUCHSCREEN_STMPE

Link: https://lore.kernel.org/r/20200904114819.30254-2-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:20:59 -07:00
Olof Johansson
20789171a9 Devicetree changes for omaps for v5.10
- Use a known good SGX clockrate for 4430, this is not needed as a fix
   as the closed source SGX driver is out of tree
 
 - Prepare DSI panels for upcoming changes to use generic driver code
 
 - Add common support for MOXA UC-8100 series
 
 - Add ocp label for l3 interconnect for board specific dts files to
   reference
 
 - Configure CPU thermal properties for omap3
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Merge tag 'omap-for-v5.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

Devicetree changes for omaps for v5.10

- Use a known good SGX clockrate for 4430, this is not needed as a fix
  as the closed source SGX driver is out of tree

- Prepare DSI panels for upcoming changes to use generic driver code

- Add common support for MOXA UC-8100 series

- Add ocp label for l3 interconnect for board specific dts files to
  reference

- Configure CPU thermal properties for omap3

* tag 'omap-for-v5.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: omap3: Add cpu trips and cooling map for omap34/36 families
  ARM: dts: am33xx: add ocp label
  ARM: dts: am335x: add common dtsi for MOXA UC-8100 series
  ARM: dts: omap4-droid4: add panel orientation
  ARM: dts: omap4-droid4: add panel compatible
  ARM: dts: omap: add channel to DSI panels
  ARM: dts: omap4: Fix sgx clock rate for 4430
  ARM: dts: omap5: Fix DSI base address and clocks
  ARM: dts: logicpd-som-lv-baseboard: Fix missing video
  ARM: dts: logicpd-som-lv-baseboard: Fix broken audio
  ARM: dts: logicpd-torpedo-baseboard: Fix broken audio
  ARM: OMAP2+: Fix an IS_ERR() vs NULL check in _get_pwrdm()

Link: https://lore.kernel.org/r/pull-1599132307-761202@atomide.com-3
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:18:39 -07:00
Olof Johansson
989286ffe8 Add initial genpd support for omaps to drop more platform data
We now drop legacy platform data for RTC on am3, am4 and dra7.
 And we add initial genpd support for PRM (Power and Reset Manager)
 and use it to drop legacy platform data for am3 sgx and omap4/5
 l4_abe interconnect instance.
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Merge tag 'omap-for-v5.10/ti-sysc-drop-pdata-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc

Add initial genpd support for omaps to drop more platform data

We now drop legacy platform data for RTC on am3, am4 and dra7.
And we add initial genpd support for PRM (Power and Reset Manager)
and use it to drop legacy platform data for am3 sgx and omap4/5
l4_abe interconnect instance.

* tag 'omap-for-v5.10/ti-sysc-drop-pdata-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Drop legacy platform data for dra7 rtcss
  ARM: OMAP2+: Drop legacy platform data for am3 and am4 rtc
  soc: ti: pm33xx: Simplify RTC usage to prepare to drop platform data
  ARM: dts: Configure omap4 and 5 l4_abe for genpd and drop platform data
  ARM: dts: Configure am3 and am4 sgx for genpd and drop platform data
  soc: ti: omap-prm: Configure omap4 and 5 l4_abe power domain
  soc: ti: omap-prm: Configure sgx power domain for am3 and am4
  soc: ti: omap-prm: Add basic power domain support
  dt-bindings: omap: Update PRM binding for genpd

Link: https://lore.kernel.org/r/pull-1599132307-761202@atomide.com-2
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:17:42 -07:00
Olof Johansson
63e850f1cd SoC changes for omaps for v5.10
Few changes to replace HTTP links with HTTPS, and a change to
 delete a duplicate word for omap1 mux.h comments.
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Merge tag 'omap-for-v5.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc

SoC changes for omaps for v5.10

Few changes to replace HTTP links with HTTPS, and a change to
delete a duplicate word for omap1 mux.h comments.

* tag 'omap-for-v5.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  arm: mach-omap1: mux.h: delete duplicate word
  ARM: OMAP2+: Replace HTTP links with HTTPS ones
  ARM: OMAP2+: pm33xx-core: Replace HTTP links with HTTPS ones
  ARM: OMAP2+: hwmod: Replace HTTP links with HTTPS ones
  ARM: OMAP2+: Replace HTTP links with HTTPS ones
  ARM: OMAP2+: PRM: Replace HTTP links with HTTPS ones

Link: https://lore.kernel.org/r/pull-1599132307-761202@atomide.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:17:01 -07:00
Olof Johansson
c9c7ddd0d7 Versatile SoC updates for the v5.10 kernel cycle:
- Drop a static qualifier in integrator_soc_init()
 - Remove Integrator and Versatile from PHYS_OFFSET
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Merge tag 'versatile-soc-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/soc

Versatile SoC updates for the v5.10 kernel cycle:

- Drop a static qualifier in integrator_soc_init()
- Remove Integrator and Versatile from PHYS_OFFSET

* tag 'versatile-soc-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: versatile: Remove Integrator and Realview from PHYS_OFFSET
  soc: integrator: Drop pointless static qualifier in integrator_soc_init()

Link: https://lore.kernel.org/r/CACRpkdYYDSg8FAjJAqew5yEu7H1Y3E1rPN9TL25K31T=QWATuA@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:16:09 -07:00
Linus Walleij
41bcfa4cd4 ARM: configs: Update Realview defconfig
Update the Integrator defconfig to the changes from the recent
kernel cycles and especially the v5.9-rc1 changes.

- Move options around as a result of Kconfig changes.
- Drop the ZBOOT_ROM* stuff that doesn't exist anymore.
- Add the syscon LEDs as used on the board for heartbeat
  and MMC traffic indication.
- Add fixed voltage regulator support, this is used by the
  MMC controller for card voltage.
- Select CONFIG_DRM_DISPLAY_CONNECTOR=y, the
  CONFIG_DRM_SIMPLE_BRIDGE was renamed when renaming the
  driver, but the simple bridge requires another bridge,
  the display connector bridge, in order to work, so this
  is required to have graphics working properly in kernel
  v5.9-rc1+

Link: https://lore.kernel.org/r/20200901082558.80388-1-linus.walleij@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:15:24 -07:00
Linus Walleij
e42fd7681b ARM: configs: Update Versatile defconfig
Update the Integrator defconfig to the changes from the recent
kernel cycles and especially the v5.9-rc1 changes.

- Move options around as a result of Kconfig changes.
- Drop the ZBOOT_ROM* stuff that doesn't exist anymore.
- Select CONFIG_DRM_DISPLAY_CONNECTOR=y, the
  CONFIG_DRM_SIMPLE_BRIDGE was renamed when renaming the
  driver, but the simple bridge requires another bridge,
  the display connector bridge, in order to work, so this
  is required to have graphics working properly in kernel
  v5.9-rc1+

Link: https://lore.kernel.org/r/20200901073930.31548-1-linus.walleij@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:15:17 -07:00
Olof Johansson
465c335bb5 Samsung S3C24xx and S3C64xx machine code cleanup for v5.10
Big cleanup for the Samsung S3C24xx and S3C64xx platforms, although it
 also touches files shared with S5Pv210 and Exynos.  This is mostly Arnd
 Bergmann work which Krzysztof Kozlowski took over, rebased and polished.
 
 The goal is to cleanup, merge and finally make the Samsung S3C24xx and
 S3C64xx architectures multiplatform.  The multiplatform did not happen
 yet here - just cleaning up and merging into one arch/arm/mach-s3c
 directory.  However this is step forward for multiplatform or at least
 to keep this code still maintainable.
 
 This pulls also branch with changes for Samsung SoC sound drivers from
 broonie/sound because the cleanups there were part of this series and
 all further patches depend on them.
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Merge tag 'samsung-soc-s3c-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc

Samsung S3C24xx and S3C64xx machine code cleanup for v5.10

Big cleanup for the Samsung S3C24xx and S3C64xx platforms, although it
also touches files shared with S5Pv210 and Exynos.  This is mostly Arnd
Bergmann work which Krzysztof Kozlowski took over, rebased and polished.

The goal is to cleanup, merge and finally make the Samsung S3C24xx and
S3C64xx architectures multiplatform.  The multiplatform did not happen
yet here - just cleaning up and merging into one arch/arm/mach-s3c
directory.  However this is step forward for multiplatform or at least
to keep this code still maintainable.

This pulls also branch with changes for Samsung SoC sound drivers from
broonie/sound because the cleanups there were part of this series and
all further patches depend on them.

* tag 'samsung-soc-s3c-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (62 commits)
  ARM: s3c: Avoid naming clash of S3C24xx and S3C64xx timer setup
  ARM: s3c: Cleanup from old plat-samsung include
  ARM: s3c: make headers local if possible
  ARM: s3c: move into a common directory
  ARM: s3c24xx: stop including mach/hardware.h from mach/io.h
  cpufreq: s3c24xx: move low-level clk reg access into platform code
  cpufreq: s3c2412: use global s3c2412_cpufreq_setrefresh
  ARM: s3c: remove cpufreq header dependencies
  cpufreq: s3c24xx: split out registers
  fbdev: s3c2410fb: remove mach header dependency
  ARM: s3c24xx: bast: avoid irq_desc array usage
  ARM: s3c24xx: spi: avoid hardcoding fiq number in driver
  ARM: s3c24xx: include mach/irqs.h where needed
  ARM: s3c24xx: move s3cmci pinctrl handling into board files
  ARM: s3c24xx: move iis pinctrl config into boards
  ARM: s3c24xx: move spi fiq handler into platform
  ARM: s3c: adc: move header to linux/soc/samsung
  ARM: s3c24xx: move irqchip driver back into platform
  ARM: s3c24xx: move regs-spi.h into spi driver
  ARM: s3c64xx: remove mach/hardware.h
  ...

Link: https://lore.kernel.org/r/20200831154751.7551-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:15:01 -07:00
Marc Zyngier
56afcd3dbd ARM: Allow IPIs to be handled as normal interrupts
In order to deal with IPIs as normal interrupts, let's add
a new way to register them with the architecture code.

set_smp_ipi_range() takes a range of interrupts, and allows
the arch code to request them as if the were normal interrupts.
A standard handler is then called by the core IRQ code to deal
with the IPI.

This means that we don't need to call irq_enter/irq_exit, and
that we don't need to deal with set_irq_regs either. So let's
move the dispatcher into its own function, and leave handle_IPI()
as a compatibility function.

On the sending side, let's make use of ipi_send_mask, which
already exists for this purpose.

One of the major difference is that we end up, in some cases
(such as when performing IRQ time accounting on the scheduler
IPI), end up with nested irq_enter()/irq_exit() pairs.
Other than the (relatively small) overhead, there should be
no consequences to it (these pairs are designed to nest
correctly, and the accounting shouldn't be off).

Reviewed-by: Valentin Schneider <valentin.schneider@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
2020-09-13 17:05:39 +01:00
Olof Johansson
a4da411e41 This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.9, please pull the following:
 
 - Florian fixes the Broadcom QSPI controller binding such that the most
   specific compatible string is the left most one, and all existing
   in-tree users are updated as well.
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Merge tag 'arm-soc/for-5.9/devicetree-fixes' of https://github.com/Broadcom/stblinux into arm/fixes

This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.9, please pull the following:

- Florian fixes the Broadcom QSPI controller binding such that the most
  specific compatible string is the left most one, and all existing
  in-tree users are updated as well.

* tag 'arm-soc/for-5.9/devicetree-fixes' of https://github.com/Broadcom/stblinux:
  arm64: dts: ns2: Fixed QSPI compatible string
  ARM: dts: BCM5301X: Fixed QSPI compatible string
  ARM: dts: NSP: Fixed QSPI compatible string
  ARM: dts: bcm: HR2: Fixed QSPI compatible string
  dt-bindings: spi: Fix spi-bcm-qspi compatible ordering

Link: https://lore.kernel.org/r/20200909211857.4144718-1-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 08:57:38 -07:00
Olof Johansson
2aedcb042f i.MX fixes for 5.9, round 2:
- Fix the misspelling of 'interrupts' property in i.MX8MQ TMU DT node.
 - Correct 'ahb' clock for i.MX8MP SDMA1 in device tree.
 - Fix pad QSPI1B_SCLK mux mode for UART3 on i.MX6SX.
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Merge tag 'imx-fixes-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.9, round 2:

- Fix the misspelling of 'interrupts' property in i.MX8MQ TMU DT node.
- Correct 'ahb' clock for i.MX8MP SDMA1 in device tree.
- Fix pad QSPI1B_SCLK mux mode for UART3 on i.MX6SX.

* tag 'imx-fixes-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx6sx: fix the pad QSPI1B_SCLK mux mode for uart3
  arm64: dts: imx8mp: correct sdma1 clk setting
  arm64: dts: imx8mq: Fix TMU interrupt property

Link: https://lore.kernel.org/r/20200909143844.GA25109@dragon
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 08:56:04 -07:00
Olof Johansson
0e384029e1 Fixes for omaps for v5.9-rc cycle
Few fixes for omap based devices:
 
 - Fix of_clk_get() error handling for omap-iommu
 
 - Fix missing audio pinctrl entries for logicpd boards
 
 - Fix video for logicpd-som-lv after switch to generic panels
 
 - Fix omap5 DSI clocks base
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Merge tag 'omap-for-v5.9/fixes-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps for v5.9-rc cycle

Few fixes for omap based devices:

- Fix of_clk_get() error handling for omap-iommu

- Fix missing audio pinctrl entries for logicpd boards

- Fix video for logicpd-som-lv after switch to generic panels

- Fix omap5 DSI clocks base

* tag 'omap-for-v5.9/fixes-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: omap5: Fix DSI base address and clocks
  ARM: dts: logicpd-som-lv-baseboard: Fix missing video
  ARM: dts: logicpd-som-lv-baseboard: Fix broken audio
  ARM: dts: logicpd-torpedo-baseboard: Fix broken audio
  ARM: OMAP2+: Fix an IS_ERR() vs NULL check in _get_pwrdm()

Link: https://lore.kernel.org/r/pull-1599132064-54898@atomide.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 08:54:02 -07:00
Fabio Estevam
f92c710f46 ARM: imx: Remove remnant board file support pieces
Since i.MX board files are gone, remove some remnant pieces of
board file support.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13 11:16:03 +08:00
Fabio Estevam
8485adf17a ARM: imx: Remove imx device directory
arch/arm/mach-imx/devices/ contains utilities for registering devices
in board file. Now that board files are gone, get rid of the devices
directory.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13 11:16:00 +08:00
Fabio Estevam
e8d992fb52 ARM: imx: Remove iomux-v3 board code
IMX_HAVE_IOMUX_V3 was only used by i.MX25/35 board files. Since the
board files users are gone, it is safe to remove iomux-v3 related
code.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13 11:15:58 +08:00
Fabio Estevam
6c5f05a6cd ARM: imx3: Remove imx3 soc_init()
imx31_soc_init() and imx35_soc_init() were only used by i.MX31/35 board
files. Since the board files users are gone, it is safe to remove
imx3 soc_init() functions.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13 11:15:54 +08:00
Fabio Estevam
a542fc1816 ARM: imx31: Remove remaining i.MX31 board code
i.MX31 is a devicetree only platform.

Remove remaining i.MX31 board code.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13 11:15:50 +08:00
Fabio Estevam
fc673fbf8c ARM: imx27: Retrieve AVIC base address from devicetree
Now that imx27 has been converted to a devicetree-only platform,
retrieve the AVIC base address from devicetree.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13 11:15:48 +08:00
Fabio Estevam
86fa07075c ARM: imx27: Get rid of mm-imx27.c
Get rid of mm-imx27.c and move its code to the mach-imx27.c file.

This aligns with other i.MX SoC code.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13 11:15:45 +08:00
Fabio Estevam
eeae56887b ARM: imx27: Remove iomux-v1 board code
IMX_HAVE_IOMUX_V1 was only used by i.MX27 board files. Since the
board files users are gone, it is safe to remove iomux-v1 related
code.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13 11:15:43 +08:00
Fabio Estevam
24e0729703 ARM: imx27: Remove imx27_soc_init()
imx27_soc_init() was only used by i.MX27 board files. Since the
board files users are gone, it is safe to remove imx27_soc_init() too.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13 11:15:26 +08:00
Peng Fan
cf4ff9618d ARM: imx7ulp: enable cpufreq
Enable cpufreq for i.MX7ULP when imx cpufreq dt driver enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13 11:06:04 +08:00
Matthias Schiffer
888bb3d2cc ARM: dts: imx6qdl-tqma6: fix LM75 compatible string
Specify the National LM75 sensor including its vendor name, as mandated
by the binding docs.

Fixes: cac849e9bb ("ARM: dts: imx6qdl: add TQMa6{S,Q,QP} SoM")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13 09:31:25 +08:00
Matthias Schiffer
1b61fa9317 ARM: dts: imx6qdl-tqma6: remove obsolete fsl,spi-num-chipselects
This property is unneeded and not supported by the spi-imx driver.

Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13 09:31:13 +08:00
Matthias Schiffer
afe617cb5f ARM: dts: imx6qdl-tqma6: fix indentation
The PMIC configuration is indented one level too deep.

Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13 09:30:38 +08:00
Krzysztof Kozlowski
48d5732cdf ARM: dts: alpine: Align GIC nodename with dtschema
Fix dtschema validator warnings like:
    gic@fb001000: $nodename:0:
        'gic@fb001000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-09-11 17:44:11 +02:00
Krzysztof Kozlowski
14ed3139e1 ARM: dts: zx: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache-controller@c00000: $nodename:0:
        'l2-cache-controller@c00000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
2020-09-11 17:44:04 +02:00
Krzysztof Kozlowski
55d3db1103 ARM: dts: tango: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache-controller@20100000: $nodename:0:
        'l2-cache-controller@20100000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Mans Rullgard <mans@mansr.com>
2020-09-11 17:43:53 +02:00
Krzysztof Kozlowski
1fbd0475a5 ARM: dts: spear: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-09-11 17:43:46 +02:00
Krzysztof Kozlowski
dcc339affb ARM: dts: qcom: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache@2040000: $nodename:0:
        'l2-cache@2040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-09-11 17:43:37 +02:00
Krzysztof Kozlowski
53486d937c ARM: dts: prima: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache-controller@80040000: $nodename:0:
        'l2-cache-controller@80040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Barry Song <baohua@kernel.org>
2020-09-11 17:43:29 +02:00
Krzysztof Kozlowski
4afb06afd7 ARM: dts: exynos: move assigned-clock* properties to i2s0 node in Odroid XU4
The purpose of those assigned-clock-* properties is to configure clock for
the I2S device so move them to respective node.  This silences the
dtschema warnings like:

  'clocks' is a dependency of 'assigned-clocks'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200906142146.21266-3-krzk@kernel.org
2020-09-11 16:53:11 +02:00
Krzysztof Kozlowski
eaf2d2f689 ARM: dts: exynos: add input clock to CMU in Exynos4412 Odroid
Commit 6860510146 ("ARM: dts: exynos: Add support for audio over HDMI
for Odroid X/X2/U3") added assigned clocks under Clock Management Unit.

However the dtschema expects "clocks" property if "assigned-clocks" are
used.  Add reference to input clock to silence the dtschema warnings:

  arch/arm/boot/dts/exynos4412-odroidu3.dt.yaml: clock-controller@10030000: 'clocks' is a dependency of 'assigned-clocks'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200906142146.21266-2-krzk@kernel.org
2020-09-11 16:52:27 +02:00
Krzysztof Kozlowski
f9e8785da5 ARM: dts: exynos: add input clock to CMU in Exynos3250
Commit 52005dece5 ("ARM: dts: Add assigned clock parents to CMU node
for exynos3250") added assigned clocks under Clock Management Unit to
fix hangs when accessing ISP registers.

However the dtschema expects "clocks" property if "assigned-clocks" are
used.  Add reference to input clock to silence the dtschema warnings:

  arch/arm/boot/dts/exynos3250-artik5-eval.dt.yaml: clock-controller@10030000: 'clocks' is a dependency of 'assigned-clocks'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200906142146.21266-1-krzk@kernel.org
2020-09-11 16:52:24 +02:00
Krzysztof Kozlowski
30b904632e ARM: dts: s3c24xx: move fixed clocks under root node in SMDK2416
The fixed clocks are kept under dedicated 'clocks' node but this causes
multiple dtschema warnings:

  clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
  clocks: #size-cells:0:0: 0 is not one of [1, 2]
  clocks: xti@0:reg:0: [0] is too short
  clocks: 'ranges' is a required property
  xti@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-12-krzk@kernel.org
2020-09-11 16:38:16 +02:00
Krzysztof Kozlowski
2436a7e38f ARM: dts: s3c24xx: add address to CPU node
The CPU nodes should be described as children of "cpus" bus node with
appropriate "reg" properties:

  cpus: '#address-cells' is a required property
  cpus: '#size-cells' is a required property
  cpu: 'device_type' is a required property
  cpu: 'reg' is a required property

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-11-krzk@kernel.org
2020-09-11 16:38:06 +02:00
Krzysztof Kozlowski
17281a3c7f ARM: dts: s3c24xx: align PWM/timer node name with dtschema
Although PWM is used on S3C24xx as clocksource/timer, the dtschema
expects the node to be named in certain format:

  timer@51000000: $nodename:0: 'timer@51000000' does not match '^pwm(@.*|-[0-9a-f])*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-10-krzk@kernel.org
2020-09-11 16:37:59 +02:00
Krzysztof Kozlowski
9166c9f8aa ARM: dts: s3c24xx: override nodes by label
Using full paths to extend or override a device tree node is error
prone.  If there was a typo error, a new node will be created instead of
extending the existing node.  This will lead to run-time errors that
could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-9-krzk@kernel.org
2020-09-11 16:37:42 +02:00
Krzysztof Kozlowski
83c968058d ARM: dts: s3c24xx: fix number of PWM cells
The PWM has only three cells, not four, as pointed out by dtschema:

  timer@51000000: #pwm-cells:0:0: 3 was expected

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-8-krzk@kernel.org
2020-09-11 16:37:34 +02:00
Krzysztof Kozlowski
a904023f7a ARM: dts: s3c6410: remove additional CPU compatible
Only the specific compatible (arm,arm1176jzf-s) is allowed by dtschema:

  cpu@0: compatible: ['arm,arm1176jzf-s', 'arm,arm1176'] is too long
  cpu@0: compatible: Additional items are not allowed ('arm,arm1176' was unexpected)

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-7-krzk@kernel.org
2020-09-11 16:37:27 +02:00
Krzysztof Kozlowski
e9da51094a ARM: dts: s3c6410: align node SROM bus node name with dtschema in SMDK6410
The SROM controller is modeled with a bus so align the device node name
with dtschema to fix warning:

  srom-cs1@18000000: $nodename:0: 'srom-cs1@18000000'
    does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-6-krzk@kernel.org
2020-09-11 16:37:24 +02:00
Krzysztof Kozlowski
5911622eff ARM: dts: s3c6410: align node SROM bus node name with dtschema in Mini6410
The SROM controller is modeled with a bus so align the device node name
with dtschema to fix warning:

  srom-cs1@18000000: $nodename:0: 'srom-cs1@18000000'
    does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-5-krzk@kernel.org
2020-09-11 16:37:19 +02:00
Krzysztof Kozlowski
c298c89ace ARM: dts: s3c6410: move fixed clocks under root node in SMDK6410
The fixed clocks are kept under dedicated 'clocks' node but this causes
multiple dtschema warnings:

  clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
  clocks: #size-cells:0:0: 0 is not one of [1, 2]
  clocks: oscillator@0:reg:0: [0] is too short
  clocks: oscillator@1:reg:0: [1] is too short
  clocks: 'ranges' is a required property
  oscillator@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-4-krzk@kernel.org
2020-09-11 16:37:06 +02:00
Krzysztof Kozlowski
8b81a8dece ARM: dts: s3c6410: move fixed clocks under root node in Mini6410
The fixed clocks are kept under dedicated 'clocks' node but this causes
multiple dtschema warnings:

  clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
  clocks: #size-cells:0:0: 0 is not one of [1, 2]
  clocks: oscillator@0:reg:0: [0] is too short
  clocks: oscillator@1:reg:0: [1] is too short
  clocks: 'ranges' is a required property
  oscillator@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-3-krzk@kernel.org
2020-09-11 16:36:55 +02:00
Krzysztof Kozlowski
28ab4caccd ARM: dts: s5pv210: correct ethernet unit address in SMDKV210
The SROM bank 5 is at address 0xa8000000, just like the one put in "reg"
property of ethernet node.  Fix the unit address of ethernet node.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907183313.29234-2-krzk@kernel.org
2020-09-11 16:36:55 +02:00
Geert Uytterhoeven
d9fd7ff595 ARM: dts: renesas: Fix pin controller node names
According to Devicetree Specification v0.2 and later, Section "Generic
Names Recommendation", the node name for a pin controller device node
should be "pinctrl".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200821112351.5518-1-geert+renesas@glider.be
2020-09-11 09:41:20 +02:00
Christoph Hellwig
5ceda74093 dma-direct: rename and cleanup __phys_to_dma
The __phys_to_dma vs phys_to_dma distinction isn't exactly obvious.  Try
to improve the situation by renaming __phys_to_dma to
phys_to_dma_unencryped, and not forcing architectures that want to
override phys_to_dma to actually provide __phys_to_dma.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
2020-09-11 09:14:43 +02:00
Christoph Hellwig
7bc5c428a6 dma-direct: remove __dma_to_phys
There is no harm in just always clearing the SME encryption bit, while
significantly simplifying the interface.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
2020-09-11 09:14:25 +02:00
Joel Stanley
74976e8613 ARM: config: aspeed_g5: Enable IBM OP Panel driver
The IBM op-panel driver requires i2c slave mode.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-11 15:25:24 +09:30
Joel Stanley
00355d82ef ARM: config: aspeed-g5: Enable I2C GPIO mux driver
Used by rainier and q71l.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-11 15:25:24 +09:30
Joel Stanley
98c3f0a1b3 ARM: config: aspeed: Fix selection of media drivers
In the 5.7 merge window the media kconfig was restructued. For most
platforms these changes set CONFIG_MEDIA_SUPPORT_FILTER=y which keeps
unwanted drivers disabled.

The exception is if a config sets EMBEDDED or EXPERT (see b0cd4fb276).
In that case the filter is set to =n, causing a bunch of DVB tuner drivers
(MEDIA_TUNER_*) to be accidentally enabled. This was noticed as it blew
out the build time for the Aspeed defconfigs.

Enabling the filter means the Aspeed config also needs to set
CONFIG_MEDIA_PLATFORM_SUPPORT=y in order to have the CONFIG_VIDEO_ASPEED
driver enabled.

Fixes: 06b93644f4 ("media: Kconfig: add an option to filter in/out platform drivers")
Fixes: b0cd4fb276 ("media: Kconfig: on !EMBEDDED && !EXPERT, enable driver filtering")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Cc: stable@vger.kernel.org
CC: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2020-09-11 15:25:24 +09:30
Ben Pai
e89570584d ARM: dts: aspeed: Add Mowgli BMC platform
The Mowgli BMC is an ASPEED ast2500 based BMC that is part of an
OpenPower Power9 server.

Signed-off-by: Ben Pai <Ben_Pai@wistron.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20200909090818.24021-1-ben_pai@wistron.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-11 15:08:16 +09:30
Herbert Xu
00b99ad2ba crypto: arm/aes-neonbs - Use generic cbc encryption path
Since commit b56f5cbc7e ("crypto:
arm/aes-neonbs - resolve fallback cipher at runtime") the CBC
encryption path in aes-neonbs is now identical to that obtained
through the cbc template.  This means that it can simply call
the generic cbc template instead of doing its own thing.

This patch removes the custom encryption path and simply invokes
the generic cbc template.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-09-11 14:39:16 +10:00
Florian Fainelli
1a4a752ee8 Maxime Ripard enables vc4 on BCM2711 (RPi4), which among other things
adds HDMI functionality (no 4K yet).
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Merge tag 'tags/bcm2835-dt-next-2020-09-08' into devicetree/next

Maxime Ripard enables vc4 on BCM2711 (RPi4), which among other things
adds HDMI functionality (no 4K yet).

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10 13:35:55 -07:00
Andre Przywara
be7e6bd01c ARM: dts: broadcom: Fix SP804 node
The DT binding for SP804 requires to have an "arm,primecell" compatible
string.
Add this string so that the Linux primecell bus driver picks the device
up and activates the clock.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
[florian: added compatible to ccbtimer1]
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10 13:35:20 -07:00
Andre Przywara
f5146e5da4 ARM: dts: NSP: Fix SP805 clock-names
The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).

Change the name in the DTs for the Broadcom NSP platform to match that.
The Linux and U-Boot driver use the *first* clock for this purpose
anyway, so it does not break anything.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10 13:35:19 -07:00
Andre Przywara
9d6693369f ARM: dts: Cygnus: Fix SP805 clocks
The SP805 DT binding requires two clocks to be specified, but the
Broadcom Cygnus DT currently only specifies one clock.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.

Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10 13:35:19 -07:00
Adrian Schmutzler
5d00306e3a ARM: dts: NSP: replace status value "ok" by "okay"
While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10 13:35:18 -07:00
Christian Lamparter
ec88a9c344 ARM: BCM5301X: Add DT for Meraki MR32
add support for the Cisco Meraki MR32.
This is a dual-band enterprise class 802.11ac access point.
The unit was donated by Chris Blake. Thank you!

SoC:    Broadcom BCM53016A1 (1 GHz, 2 cores)
RAM:    128 MiB
NAND:   128 MiB Spansion S34ML01G2 (~114 MiB useable)
ETH:    1GBit Ethernet Port - PoE
WIFI1:  Broadcom BCM43520 an+ac (2x2:2 - id: 0x4352)
WIFI2:  Broadcom BCM43520 bgn (2x2:2 - id: 0x4352)
WIFI3:  Broadcom BCM43428 abgn (1x1:1 - id: 43428)

BLE:    Broadcom BCM20732 (ttyS1)
LEDS:   1 x Programmable RGB Status LED (driven by a PWM)
        1 x White LED (GPIO)
        1 x Orange LED Fault Indicator (GPIO)
        2 x LAN Activity / Speed LEDs (On the RJ45 Port)
BUTTON: one Reset button
MISC:   AT24C64 8KiB EEPROM (i2c - stores Ethernet MAC)
        ina219 hardware monitor (i2c)
        Kensington Lock

SERIAL:
	WARNING: The serial port needs a TTL/RS-232 3V3 level converter!
        The Serial setting is 115200-8-N-1. The board has a populated
        right angle 1x4 0.1" pinheader.
        The pinout is: VCC, RX, TX, GND.

Odd stuff:
	- uart0 clock frequency is 62.5 MHz.
	- The LEDs are labeled as SYS-LED1 through SYS-LED3
	  because of the silkscreen on the PCB.
	- the original u-boot has been compiled with most functions
	  and commands disabled. The u-boot env isn't setup properly
	  either and as a result, the bcm47xxpart probing is not
	  working. Hence, the nand partitions are specified through a
	  "fixed-partition" binding.
	- The "WICED SMART(TM)" Bluetooth LE 4.0 BCM20732 chip is
	  connected to uart2 of the SoC. The BCM20732 does not
	  provide a HCI. So the linux' bluetooth stack is useless.
	  The mock-up node with the compatible binding and
	  enable-gpios property is provided solely as documentation.

Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10 13:35:15 -07:00
Helmut Grohne
edecfa98f6 net: dsa: microchip: look for phy-mode in port nodes
Documentation/devicetree/bindings/net/dsa/dsa.txt says that the phy-mode
property should be specified on port nodes. However, the microchip
drivers read it from the switch node.

Let the driver use the per-port property and fall back to the old
location with a warning.

Fix in-tree users.

Signed-off-by: Helmut Grohne <helmut.grohne@intenta.de>
Link: https://lore.kernel.org/netdev/20200617082235.GA1523@laureti-dev/
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-09-10 12:32:37 -07:00
Geert Uytterhoeven
919c385dde ARM: shmobile: rcar-gen2: Make rcar_gen2_{timer_init, reserve}() static
As of commit 1e90fea35b ("ARM: shmobile: r8a7791: Use common R-Car
Gen2 machine definition"), there are no more users of
rcar_gen2_timer_init() and rcar_gen2_reserve() outside
arch/arm/mach-shmobile/setup-rcar-gen2.c.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200908074403.4379-1-geert+renesas@glider.be
2020-09-10 19:01:26 +02:00
Lad Prabhakar
8feb348406 ARM: dts: r8a7742-iwg21d-q7: Enable SD2 LED indication
Add support for LED trigger on SD2 interface.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200907155541.2011-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-10 18:59:42 +02:00
Lad Prabhakar
68ee7720a0 ARM: dts: r8a7742-iwg21d-q7: Add can1 support to carrier board
This patch enables CAN1 interface exposed through connector J20 on the
carrier board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200907155541.2011-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-10 18:59:42 +02:00
Lad Prabhakar
8368ca1540 ARM: dts: r8a7742-iwg21d-q7: Add SPI NOR support
Add support for the SPI NOR device which is connected to MSIOF0 interface
on the iWave RainboW-G21d-q7 board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200907155541.2011-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-10 18:59:42 +02:00
Lad Prabhakar
4c32a2b34e ARM: dts: r8a7742: Add VIN DT nodes
Add VIN[0123] instances found in the r8a7742 SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20200907144509.8861-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-10 18:59:42 +02:00
Grygorii Strashko
74623757b9 ARM: omap2plus_defconfig: enable generic net options
Enable set of generic, widely used, networking  options:
- basic QoS, filter and actions
- VLAN support
- Bridge support
Use "M" build option where possible.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 13:14:50 +03:00
Andreas Kemnade
8aa6361f72 ARM: omap2plus_defconfig: enable twl4030_madc as a loadable module
The ADC is used by twl4030_charger to read voltages. If a dtb contains
the ADC but the module is not build, probing twl4030_charger will be
endlessly deferred, so just enable CONFIG_TWL4030_MADC in the config.

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 13:14:07 +03:00
Grygorii Strashko
ec9bc5bedb ARM: dts: dra7: drop legacy cpsw dt node
All dra7/am57 boards converted to use new driver, so drop legacy
cpsw dt node.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:51:36 +03:00
Grygorii Strashko
fa46e7e7dc ARM: dts: am57xx-cl-som-am57x: switch to new cpsw switch drv
Switch CompuLab CL-SOM-AM57x board to use new cpsw switch driver. Those
board configured in dual_mac mode by default. Hence, dual_mac mode has been
preserved the same way between legacy and new driver it's safe to switch
drivers.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:51:32 +03:00
Grygorii Strashko
56d6c721f2 ARM: dts: dra7x-evm: switch to new cpsw switch drv
Switch all TI DRA7x boards to use new cpsw switch driver. Those boards
configured in dual_mac mode by default. Hence, dual_mac mode has been
preserved the same way between legacy and new driver it's safe to switch
drivers.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:51:22 +03:00
Grygorii Strashko
ea952beb29 ARM: dts: beagle-x15: switch to new cpsw switch drv
Switch all TI AM5728 BeagleBoard-X15 boards to use new cpsw switch driver.
Those boards have 2 Ext. port wired and configured in dual_mac mode by
default. Hence, dual_mac mode has been preserved the same way between
legacy and new driver it's safe to switch drivers.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:50:42 +03:00
Grygorii Strashko
d56fe359e6 ARM: dts: am57xx-idk: switch to new cpsw switch drv
Switch all am571/2/4-idk boards to use new cpsw switch driver.
Those boards have 2 Ext. port wired and configured in dual_mac mode by
default. Hence, dual_mac mode has been preserved the same way between
legacy and new driver it's safe to switch drivers.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:50:38 +03:00
Grygorii Strashko
67e97cc60d ARM: dts: am5729: beagleboneai: switch to new cpsw switch drv
Switch BeagleBone AI to use new cpsw switch driver.
It has one Ext. port only and fits dual_mac mode with no issues.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:50:35 +03:00
Adrian Schmutzler
ca6bfe9721 ARM: dts: am43xx: replace status value "ok" by "okay"
While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:47:01 +03:00
Adrian Schmutzler
0893a701a2 ARM: dts: dra7xx: replace status value "ok" by "okay"
While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:46:57 +03:00
Adrian Schmutzler
fe93b72551 ARM: dts: omap: replace status value "ok" by "okay"
While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:46:51 +03:00
Sakari Ailus
3b4a056455 ARM: dts: n9, n950: Remove nokia,nvm-size property
Remove nokia,nvm-size property as it is no longer needed. The driver can
nowadays figure out the size so do not specify it in DT.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-09-10 12:43:26 +03:00
Andrew Jeffery
adfe14797e ARM: dts: rainier: Disable internal pull-downs on eMMC pins
There's a veritable tug-of-war going on in the design, so disable one of
the warring parties.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20200910031143.2997298-1-andrew@aj.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-10 12:43:16 +09:30
Florian Fainelli
b793dab8d8 ARM: dts: BCM5301X: Fixed QSPI compatible string
The string was incorrectly defined before from least to most
specific, swap the compatible strings accordingly.

Fixes: 1c8f406507 ("ARM: dts: BCM5301X: convert to iProc QSPI")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-09 14:14:06 -07:00
Florian Fainelli
d1ecc40a95 ARM: dts: NSP: Fixed QSPI compatible string
The string was incorrectly defined before from least to most
specific, swap the compatible strings accordingly.

Fixes: 329f98c197 ("ARM: dts: NSP: Add QSPI nodes to NSPI and bcm958625k DTSes")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-09 14:14:06 -07:00
Florian Fainelli
d663186293 ARM: dts: bcm: HR2: Fixed QSPI compatible string
The string was incorrectly defined before from least to most specific,
swap the compatible strings accordingly.

Fixes: b9099ec754 ("ARM: dts: Add Broadcom Hurricane 2 DTS include file")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-09 14:14:06 -07:00
Krzysztof Kozlowski
1ed7f6d0ba ARM: dts: s5pv210: align SPI GPIO node name with dtschema in Aries
The device tree schema expects SPI controller to be named "spi",
otherwise dtbs_check complain with a warning like:

  spi-gpio-0: $nodename:0: 'spi-gpio-0' does not match '^spi(@.*|-[0-9a-f])*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/20200907161141.31034-25-krzk@kernel.org
2020-09-09 21:43:58 +02:00
Krzysztof Kozlowski
b5c528ba97 ARM: dts: s5pv210: use defines for IRQ flags in Goni
Replace hard-coded flags with defines for readability.  No functional
change.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-20-krzk@kernel.org
2020-09-09 21:43:12 +02:00
Krzysztof Kozlowski
c272f1cc94 ARM: dts: s5pv210: use defines for IRQ flags in SMDKV210
Replace hard-coded flags with defines for readability.  No functional
change.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-19-krzk@kernel.org
2020-09-09 21:43:00 +02:00
Krzysztof Kozlowski
0f2e43cf3d ARM: dts: s5pv210: use defines for GPIO flags in Goni
Replace hard-coded flags with defines for readability.  No functional
change.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-18-krzk@kernel.org
2020-09-09 21:42:32 +02:00
Krzysztof Kozlowski
0e2774e180 ARM: dts: s5pv210: use defines for GPIO flags in Aquila
Replace hard-coded flags with defines for readability.  No functional
change.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-17-krzk@kernel.org
2020-09-09 21:42:24 +02:00
Krzysztof Kozlowski
fd595722c1 ARM: dts: s5pv210: add RTC 32 KHz clock in Torbreck
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add
a workaround to model its clock with a fixed-clock.

This fixes dtbs_check warnings:

  rtc@e2800000: clocks: [[2, 145]] is too short
  rtc@e2800000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-16-krzk@kernel.org
2020-09-09 21:42:13 +02:00
Krzysztof Kozlowski
7260b36345 ARM: dts: s5pv210: add RTC 32 KHz clock in SMDKV210
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add
a workaround to model its clock with a fixed-clock.

This fixes dtbs_check warnings:

  rtc@e2800000: clocks: [[2, 145]] is too short
  rtc@e2800000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-15-krzk@kernel.org
2020-09-09 21:42:07 +02:00
Krzysztof Kozlowski
37dea4fa98 ARM: dts: s5pv210: add RTC 32 KHz clock in SMDKC110
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add
a workaround to model its clock with a fixed-clock.

This fixes dtbs_check warnings:

  rtc@e2800000: clocks: [[2, 145]] is too short
  rtc@e2800000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-14-krzk@kernel.org
2020-09-09 21:42:01 +02:00
Krzysztof Kozlowski
ebb105b59c ARM: dts: s5pv210: add RTC 32 KHz clock in Goni
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However there is no such clock provider but rather a regulator driver
which registers the clock as a regulator.  This is an old driver which
will not be updated so add a workaround - a fixed-clock to fill missing
clock phandle reference in S3C RTC.

This fixes dtbs_check warnings:

  rtc@e2800000: clocks: [[2, 145]] is too short
  rtc@e2800000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-13-krzk@kernel.org
2020-09-09 21:41:53 +02:00
Krzysztof Kozlowski
086c4498b0 ARM: dts: s5pv210: add RTC 32 KHz clock in Aries family
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However there is no such clock provider but rather a regulator driver
which registers the clock as a regulator.  This is an old driver which
will not be updated so add a workaround - a fixed-clock to fill missing
clock phandle reference in S3C RTC.

This fixes dtbs_check warnings:

  rtc@e2800000: clocks: [[2, 145]] is too short
  rtc@e2800000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/20200907161141.31034-12-krzk@kernel.org
2020-09-09 21:40:29 +02:00
Krzysztof Kozlowski
e59cb2fb3b ARM: dts: s5pv210: add RTC 32 KHz clock in Aquilla
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However there is no such clock provider but rather a regulator driver
which registers the clock as a regulator.  This is an old driver which
will not be updated so add a workaround - a fixed-clock to fill missing
clock phandle reference in S3C RTC.

This fixes dtbs_check warnings:

  rtc@e2800000: clocks: [[2, 145]] is too short
  rtc@e2800000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-11-krzk@kernel.org
2020-09-09 21:39:50 +02:00
Krzysztof Kozlowski
6c17a2974a ARM: dts: s5pv210: remove dedicated 'audio-subsystem' node
The 'audio-subsystem' node is an artificial creation, not representing
real hardware.  The hardware is described by its nodes - AUDSS clock
controller and I2S0.

Remove the 'audio-subsystem' node along with its undocumented compatible
to fix dtbs_check warnings like:

  audio-subsystem: $nodename:0: 'audio-subsystem' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/20200907161141.31034-9-krzk@kernel.org
2020-09-09 21:38:31 +02:00
Krzysztof Kozlowski
bb98fff84a ARM: dts: s5pv210: move PMU node out of clock controller
The Power Management Unit (PMU) is a separate device which has little
common with clock controller.  Moving it to one level up (from clock
controller child to SoC) allows to remove fake simple-bus compatible and
dtbs_check warnings like:

  clock-controller@e0100000: $nodename:0:
    'clock-controller@e0100000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/20200907161141.31034-8-krzk@kernel.org
2020-09-09 21:38:18 +02:00
Krzysztof Kozlowski
d38cae370e ARM: dts: s5pv210: move fixed clocks under root node
The fixed clocks are kept under dedicated 'external-clocks' node, thus a
fake 'reg' was added.  This is not correct with dtschema as fixed-clock
binding does not have a 'reg' property.  Moving fixed clocks out of
'soc' to root node fixes multiple dtbs_check warnings:

  external-clocks: $nodename:0: 'external-clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
  external-clocks: #size-cells:0:0: 0 is not one of [1, 2]
  external-clocks: oscillator@0:reg:0: [0] is too short
  external-clocks: oscillator@1:reg:0: [1] is too short
  external-clocks: 'ranges' is a required property
  oscillator@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/20200907161141.31034-7-krzk@kernel.org
2020-09-09 21:38:07 +02:00
Krzysztof Kozlowski
ea4e792f3c ARM: dts: s5pv210: remove DMA controller bus node name to fix dtschema warnings
There is no need to keep DMA controller nodes under AMBA bus node.
Remove the "amba" node to fix dtschema warnings like:

  amba: $nodename:0: 'amba' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/20200907161141.31034-6-krzk@kernel.org
2020-09-09 21:37:50 +02:00
Krzysztof Kozlowski
2c6658c607 ARM: dts: s5pv210: fix pinctrl property of "vibrator-en" regulator in Aries
Fix typo in pinctrl property of "vibrator-en" fixed regulator in Aries
family of boards.  The error caused lack of pin configuration for the
GPIO used in vibrator.

Fixes: 04568cb58a ("ARM: dts: s5pv210: Disable pull for vibrator enable GPIO on Aries boards")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200907161141.31034-5-krzk@kernel.org
2020-09-09 21:37:04 +02:00
Alex Ryabchenko
8cf333f836 arm: dts: mt7623: add lima related regulator
GPU needs additional regulator, add it to devicetree of bpi-r2

Signed-off-by: Alex Ryabchenko <d3adme4t@gmail.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20200904110002.88966-5-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-09 15:54:16 +02:00
Ryder Lee
2c78f4bd2b arm: dts: mt7623: add display subsystem related device nodes
Add display subsystem related device nodes for MT7623.

Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20200904110002.88966-4-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-09 15:54:16 +02:00
Frank Wunderlich
c0d66c560e arm: dts: mt7623: move display nodes to separate mt7623n.dtsi
mt7623a has no graphics support so move nodes from generic mt7623.dtsi
to mt7623n.dtsi

Fixes: 1f6ed22459 ("arm: dts: mt7623: add Mali-450 device node")
Suggested-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20200904110002.88966-3-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-09 15:53:56 +02:00
Joel Stanley
c82bf6e133 ARM: aspeed: g5: Do not set sirq polarity
A feature was added to the aspeed vuart driver to configure the vuart
interrupt (sirq) polarity according to the LPC/eSPI strapping register.

Systems that depend on a active low behaviour (sirq_polarity set to 0)
such as OpenPower boxes also use LPC, so this relationship does not
hold. Jeremy confirms that the s2600st which is strapped for eSPI also
does not have this relationship.

The property was added for a Tyan S7106 system which is not supported
in the kernel tree. Should this or other systems wish to use this
feature of the driver they should add it to the machine specific device
tree.

Fixes: c791fc76bc ("arm: dts: aspeed: Add vuart aspeed,sirq-polarity-sense...")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Tested-by: Jeremy Kerr <jk@ozlabs.org>
Reviewed-by: Jeremy Kerr <jk@ozlabs.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200812112400.2406734-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-09 16:38:55 +09:30
Eddie James
d270bb09f4 ARM: dts: aspeed: rainier: Add IBM Operation Panel I2C device
Set I2C bus 7 to multi-master mode and add the panel device that will
register as a slave.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20200908200101.64974-6-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-09 16:29:33 +09:30
Eddie James
7505340245 ARM: dts: aspeed: tacoma: Add IBM Operation Panel I2C device
Set I2C bus 0 to multi-master mode and add the panel device that will
register as a slave.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20200908200101.64974-5-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-09 16:28:37 +09:30
Christoph Hellwig
5e6e9852d6 uaccess: add infrastructure for kernel builds with set_fs()
Add a CONFIG_SET_FS option that is selected by architecturess that
implement set_fs, which is all of them initially.  If the option is not
set stubs for routines related to overriding the address space are
provided so that architectures can start to opt out of providing set_fs.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-09-08 22:21:32 -04:00
Maxime Ripard
4564363351 ARM: dts: bcm2711: Enable the display pipeline
Now that all the drivers have been adjusted for it, let's bring in the
necessary device tree changes.

The VEC and PV3 are left out for now, since it will require a more specific
clock setup.

Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/cfce2276d172d3d9c4d34d966b58fd47f77c4e46.1599120059.git-series.maxime@cerno.tech
2020-09-08 18:28:23 +02:00
Masami Hiramatsu
94509582d1 arm: kprobes: Use generic kretprobe trampoline handler
Use the generic kretprobe trampoline handler. Use regs->ARM_fp
for framepointer verification.

Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/159870602406.1229682.10496730247473708592.stgit@devnote2
2020-09-08 11:52:32 +02:00
Dan Murphy
78efa6a766 ARM: dts: ste-href: Add reg property to the LP5521 channel nodes
Add the reg property to each channel node.  This update is
to accommodate the multicolor framework.  In addition to the
accommodation this allows the LEDs to be placed on any channel
and allow designs to skip channels as opposed to requiring
sequential order.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
CC: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20200812195020.13568-7-dmurphy@ti.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-09-07 13:48:06 +02:00
Andre Przywara
a894c6dd56 ARM: dts: arm: Fix SP805 clocks
The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).

Change the name in the DTs for ARM Ltd. platforms to match that. The
Linux and U-Boot driver use the *first* clock for this purpose anyway,
so it does not break anything.

For MPS2 we only specify one clock so far, but the binding requires
two clocks to be named.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency. So since currently both
are the very same clock, we can just double the clock reference, and add
the correct clock-names, to match the binding.

Link: https://lore.kernel.org/r/20200828130602.42203-8-andre.przywara@arm.com
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-09-07 10:54:08 +01:00
Andre Przywara
34a4591871 ARM: dts: arm: Fix SP804 users
The SP804 DT nodes for Realview, MPS2 and VExpress were not complying
with the binding: it requires either one or three clocks, but does not
allow exactly two clocks.

Simply duplicate the first clock to satisfy the binding requirement.
For MPS2, we triple the clock, and add the clock-names property, as this
is required by the Linux primecell driver.
Try to make the clock-names more consistent on the way.

Link: https://lore.kernel.org/r/20200828142018.43298-3-andre.przywara@arm.com
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-09-07 10:49:35 +01:00
Krzysztof Kozlowski
d3604c9156 ARM: dts: exynos: Silence SATA PHY warning in Exynos5250
The SATA PHY in Exynos5250 SoCs has two interfaces and two device nodes:
1. sata-phy@12170000
2. i2c-9/i2c@38

The first node represents the actual SATA PHY device with phy-cells.

The second represents an additional I2C interface, needed by the driver
to communicate with the SATA PHY device.  It is not a PHY-provider in
the terms of dtschema so rename it to silence dtbs_check warning:

  arch/arm/boot/dts/exynos5250-arndale.dt.yaml: sata-phy@38: '#phy-cells' is a required property
    From schema: lib/python3.6/site-packages/dtschema/schemas/phy/phy-provider.yaml

This second device node is also a property of SoC, not a board so move
it there.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200902155733.20271-2-krzk@kernel.org
2020-09-06 18:56:39 +02:00
Krzysztof Kozlowski
975bcbce5b ARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boards
The property samsung,i2c-slave-addr in I2C9 controller on Exynos5250
Arndale and SMDK5250 boards, is not actually needed.  There is only one
master on this bus.  It's not clear why this property was added at first
place.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20200902155733.20271-1-krzk@kernel.org
2020-09-06 18:56:39 +02:00
Sylwester Nawrocki
75a4a04e78 ARM: dts: samsung: odroid-xu3: Move assigned-clock* properties to i2s0 node
The purpose of those assigned-clock-* properties is to configure clock for
for the I2S device so move them to respective node.

This suppresses the dtbs_check warning:
  arch/arm/boot/dts/exynos5422-odroidxu3.dt.yaml: sound: 'clocks' is a dependency of 'assigned-clocks'

Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-09-06 18:56:25 +02:00
Krzysztof Kozlowski
e8a3d7064c ARM: dts: imx28-m28: Align GPMI NAND node name with schema
Device tree schema expects NAND controller to be named
"nand-controller", otherwise dtbs_check complain with a warning like:

    arch/arm/boot/dts/imx28-eukrea-mbmx283lc.dt.yaml: gpmi-nand@8000c000:
        $nodename:0: 'gpmi-nand@8000c000' does not match '^nand-controller(@.*)?'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-05 16:05:18 +08:00
Marco Felsch
f3e7dae323 ARM: dts: imx6qdl: add enet_out clk support
Like the other i-MX devices the i.MX6 family can output the enet tx
clock on the pad to feed the connected device. Add the missing clk here
to avoid local fixups like: arch/arm/boot/dts/imx6qdl-tx6.dtsi.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-05 16:05:07 +08:00
Marco Felsch
d77a99a8a8 ARM: dts: imx6qdl: move iomuxc compatible assignment out of root node
The common imx6qdl.dtsi already defines the iomuxc phandle. Make use of
it in the imx6dl.dtsi and imx6q.dtsi.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-05 16:05:07 +08:00
Krzysztof Kozlowski
ed13ffc597 ARM: dts: vf: Fix PCA95xx GPIO expander properties on ZII CFU1
The PCA95xx GPIO expander requires GPIO controller properties to operate
properly.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-05 16:05:07 +08:00
Fugang Duan
3ee99f6a23 ARM: dts: imx6sx: fix the pad QSPI1B_SCLK mux mode for uart3
The pad QSPI1B_SCLK mux mode 0x1 is for function UART3_DTE_TX,
correct the mux mode.

Fixes: 743636f25f ("ARM: dts: imx: add pin function header for imx6sx")
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-05 15:56:22 +08:00
Fabio Estevam
b154d8d8ba ARM: imx: Remove ehci board files
Now that the i.MX board files have been removed, there
is no need for keeping the ehci related files, so just
remove them.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-05 15:34:31 +08:00
Fabio Estevam
e1324ece2a ARM: imx: Remove i.MX35 board files
i.MX35 has basic device tree support.

To achieve the goal of converting all i.MX SoCs to a
devicetree-only platform, remove imx35 board files.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-05 15:34:29 +08:00
Fabio Estevam
c93197b004 ARM: imx: Remove i.MX31 board files
i.MX31 has basic device tree support.

To achieve the goal of converting all i.MX SoCs to a
devicetree-only platform, remove imx31 board files.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-05 15:34:26 +08:00
Fabio Estevam
879c0e5e0a ARM: imx: Remove i.MX27 board files
i.MX27 has basic device tree support.

To achieve the goal of converting all i.MX SoCs to a
devicetree-only platform, remove imx27 board files.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-05 15:34:23 +08:00
Fabio Estevam
4b563a0666 ARM: imx: Remove imx21 support
mx21 has not been converted to device tree yet and there is only
one single board that is supported (imx21ads).

To achieve the goal of converting all i.MX SoCs to
devicetree-only platforms, remove imx21 support.

If someone is interested in supporting imx21, patches to add
imx21 devicetree support will be welcome.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-05 15:34:11 +08:00
Andreas Kemnade
9c7016f1ca ARM: dts: imx: add devicetree for Tolino Shine 2 HD
This adds a devicetree for the Tolino Shine 2 HD Ebook reader. It is based
on boards marked with "37NB-E60QF0+4A2". It is equipped with an i.MX6SL
SoC.

Expected to work:
- Buttons
- Wifi
- Touchscreen
- LED
- uSD
- USB
- RTC

Not working due to missing drivers:
- Backlight (requires NTXEC driver)
- EPD

Not working due to unknown reasons:
- deep sleep (echo standby >/sys/power/state works),
  wakeup fails when imx_gpc_pre_suspend(true) was called.

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-05 09:39:08 +08:00
Fabio Estevam
0c11bbcf02 ARM: imx: Place "Cortex-A/Cortex-M" comment in the correct location
The menu comment "Cortex-A/Cortex-M asymmetric multiprocessing platforms"
appears when running:

make imx_v4_v5_defconfig
make menuconfig

System Type --->
[*] Freescale i.MX family  --->

This is not correct as imx_v4_v5_defconfig does not select any Cortex-A
or Cortex-M platforms.

Move the comment under the correct symbol ifdefery to fix this problem.

Fixes: 8064887e02 ("ARM: vf610: enable Cortex-M4 configuration on Vybrid SoC")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-05 09:34:31 +08:00
Florian Fainelli
4e5cafa8b3 ARM: brcmstb: Add debug UART entry for 72615
72165 has the same memory map as 7278 and the same physical address for
the UART, alias the definition accordingly.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-04 13:42:16 -07:00
Lad Prabhakar
78aa219022 ARM: dts: r8a7742: Add IPMMU DT nodes
Add the five IPMMU instances found in the r8a7742 to DT with a disabled
status.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200825141805.27105-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2020-09-04 11:25:40 +02:00
Krzysztof Kozlowski
cd5b0321ed ARM: dts: exynos: Use S2MPS11 clock in S3C RTC in SMDK5420
Use the 32 kHz clock from S2MPS11 PMIC in the S3C RTC node. Except
making the S3C RTC working, this also fixes dtbs_check warnings:

  arch/arm/boot/dts/exynos5420-smdk5420.dt.yaml: rtc@101e0000: clocks: [[2, 317]] is too short
  arch/arm/boot/dts/exynos5420-smdk5420.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-14-krzk@kernel.org
2020-09-04 10:58:30 +02:00
Herbert Xu
51982ea02a crypto: arm/poly1305 - Add prototype for poly1305_blocks_neon
This patch adds a prototype for poly1305_blocks_neon to slience
a compiler warning:

  CC [M]  arch/arm/crypto/poly1305-glue.o
../arch/arm/crypto/poly1305-glue.c:25:13: warning: no previous prototype for `poly1305_blocks_neon' [-Wmissing-prototypes]
 void __weak poly1305_blocks_neon(void *state, const u8 *src, u32 len, u32 hibit)
             ^~~~~~~~~~~~~~~~~~~~

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Acked-by: Jason A. Donenfeld <Jason@zx2c4.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-09-04 17:57:14 +10:00
Lad Prabhakar
a0be3c32b1 ARM: dts: r8a7742-iwg21d-q7: Enable PCIe Controller
Enable PCIe Controller and set PCIe bus clock frequency.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200825162718.5838-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-04 09:48:41 +02:00
Lad Prabhakar
18f99f24a9 ARM: dts: r8a7742: Add IPMMU DT nodes
Add the five IPMMU instances found in the r8a7742 to DT with a disabled
status.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200825141805.27105-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-04 09:48:19 +02:00
Krzysztof Kozlowski
d872e4e987 ARM: dts: exynos: Silence DP HPD pinctrl dtschema warning in Exynos5250 Spring
The pin configuration of Display Port HPD GPIO emds with '-gpio' which
confuses dtschema:

  arch/arm/boot/dts/exynos5250-spring.dt.yaml: pinctrl@11400000: dp-hpd-gpio:
    {'samsung,pins': ['gpc3-0'], ... 'samsung,pin-drv': [[0]], 'phandle': [[23]]} is not of type 'array'
    From schema: lib/python3.6/site-packages/dtschema/schemas/gpio/gpio-consumer.yaml

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-11-krzk@kernel.org
2020-09-03 22:47:40 +02:00
Krzysztof Kozlowski
a2d86d420f ARM: dts: exynos: Use S5M8767 clock in S3C RTC in Exynos5250 Spring
Use the 32 kHz clock from S5M8767 PMIC in the S3C RTC node. Except
making the S3C RTC working, this also fixes dtbs_check warnings:

  arch/arm/boot/dts/exynos5250-spring.dt.yaml: rtc@101e0000: clocks: [[2, 337]] is too short
  arch/arm/boot/dts/exynos5250-spring.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-10-krzk@kernel.org
2020-09-03 22:47:33 +02:00
Krzysztof Kozlowski
ac88a60a27 ARM: dts: exynos: Add max77686 clocks for S3C RTC in SMDK5250
Add clock-cells to max77686 PMIC node so its 32 kHz clocks could be used
later in the S3C RTC node. Except making the S3C RTC working, this also
fixes dtbs_check warnings:

  arch/arm/boot/dts/exynos5250-smdk5250.dt.yaml: rtc@101e0000: clocks: [[2, 337]] is too short
  arch/arm/boot/dts/exynos5250-smdk5250.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-9-krzk@kernel.org
2020-09-03 22:47:28 +02:00
Krzysztof Kozlowski
7e86ef5cc8 ARM: dts: exynos: Override thermal by label in Exynos5250
Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired.  This will lead to run-time errors
that could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-8-krzk@kernel.org
2020-09-03 22:47:20 +02:00
Krzysztof Kozlowski
9e7fe41778 ARM: dts: exynos: Correct whitespace and indentation issues in Exynos5
Remove double space after '=' and fix indentation in Exynos5250,
Exynos5410 and Exynos5420 DTS files.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-7-krzk@kernel.org
2020-09-03 22:47:07 +02:00
Krzysztof Kozlowski
41af0d2ea1 ARM: dts: exynos: Silence i2c-gpio dtschema warning in Exynos5250 Arndale
The name of I2C controller over GPIO lines node ends with '-gpio' which
confuses dtschema:

  arch/arm/boot/dts/exynos5250-arndale.dt.yaml: soc: i2c-gpio:
    {'pinctrl-names': ['default'], ... 'phandle': [[65]]} is not of type 'array'
    From schema: lib/python3.6/site-packages/dtschema/schemas/gpio/gpio-consumer.yaml

Add a '-10' (there are already 0-9 I2C controllers on the SoC) suffix to
silence it.  This pattern on naming i2c-gpio is already present in many
other dts.  No functional change.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-6-krzk@kernel.org
2020-09-03 22:46:55 +02:00
Krzysztof Kozlowski
8dec8385be ARM: dts: exynos: Correct S3C RTC bindings in SMDK5410
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add
a workaround to model its clock with a fixed-clock.  This fixes S3C RTC
and silences dtbs_check warnings like:

  arch/arm/boot/dts/exynos5410-smdk5410.dt.yaml: rtc@101e0000: clocks: [[5, 317]] is too short
  arch/arm/boot/dts/exynos5410-smdk5410.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-5-krzk@kernel.org
2020-09-03 22:46:44 +02:00
Krzysztof Kozlowski
2495ddd2d1 ARM: dts: exynos: Remove unneeded address/size cells in Exynos5260 GIC
The Exynos5260 GIC node does not have any children so remove the address
and size cells as they are not needed by DT bindings.  The size-cells of
'0' were also incorrect.  This fixes dtbs_check warning:

  arch/arm/boot/dts/exynos5260-xyref5260.dt.yaml: interrupt-controller@10481000: #size-cells:0:0: 1 was expected

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-4-krzk@kernel.org
2020-09-03 22:45:58 +02:00
Krzysztof Kozlowski
1fa7c1ac23 ARM: dts: exynos: Correct compatible for Exynos5260 GIC
Exynos5260 SoCs have ARM GIC 400.  Correct the compatibles to match
dtschema and fix the dtbs_check warnings like:

  arch/arm/boot/dts/exynos5260-xyref5260.dt.yaml: interrupt-controller@10481000:
    compatible: ['arm,cortex-a15-gic', 'arm,cortex-a9-gic'] is not valid under any of the given schemas

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-3-krzk@kernel.org
2020-09-03 22:45:49 +02:00
Krzysztof Kozlowski
dfe3a98aac ARM: dts: exynos: Correct compatible for Exynos5 GIC
Exynos5250 and Exynso54xx SoCs have ARM GIC 400.  Correct the
compatibles to match dtschema and fix the dtbs_check warnings like:

  arch/arm/boot/dts/exynos5420-peach-pit.dt.yaml: interrupt-controller@10481000:
    compatible: ['arm,gic-400', 'arm,cortex-a15-gic', 'arm,cortex-a9-gic']
    is not valid under any of the given schemas

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-2-krzk@kernel.org
2020-09-03 22:45:37 +02:00
Tony Lindgren
0d7ce5c5c4 Merge branch 'omap-for-v5.10/prm-genpd' into omap-for-v5.10/ti-sysc-drop-pdata 2020-09-03 12:06:18 +03:00
Tony Lindgren
501e69b028 Merge branch 'omap-for-v5.10/omap1' into omap-for-v5.10/soc 2020-09-03 11:50:37 +03:00
Kees Cook
4409d2f8df arm/boot: Warn on orphan section placement
We don't want to depend on the linker's orphan section placement
heuristics as these can vary between linkers, and may change between
versions. All sections need to be explicitly handled in the linker script.

With all sections now handled, enable orphan section warning.

Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Link: https://lore.kernel.org/r/20200902025347.2504702-4-keescook@chromium.org
2020-09-03 10:28:35 +02:00
Kees Cook
5a17850e25 arm/build: Warn on orphan section placement
We don't want to depend on the linker's orphan section placement
heuristics as these can vary between linkers, and may change between
versions. All sections need to be explicitly handled in the linker
script.

Specifically, this would have made a recently fixed bug very obvious:

ld: warning: orphan section `.fixup' from `arch/arm/lib/copy_from_user.o' being placed in section `.fixup'

With all sections handled, enable orphan section warning.

Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Link: https://lore.kernel.org/r/20200902025347.2504702-3-keescook@chromium.org
2020-09-03 10:28:35 +02:00
Alexandre Belloni
cd6228b782 ARM: dts: at91: fix sram nodes
The ranges, #address-cells and #size-cells properties are mandatory, add
them to the sram nodes.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20200831171129.3886857-4-alexandre.belloni@bootlin.com
2020-09-03 10:09:34 +02:00
Alexandre Belloni
58f984941d ARM: dts: at91: fix cpu node
The reg property is mandatory for cpu nodes, also fix the #address-cells of
the cpus node that has to be at least 1.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20200831171129.3886857-2-alexandre.belloni@bootlin.com
2020-09-03 10:09:34 +02:00
Stephen Kitt
7de3f326dd ARM: davinci: use simple i2c probe function
The i2c probe functions here don't use the id information provided in
their second argument, so the single-parameter i2c probe function
("probe_new") can be used instead.

This avoids scanning the identifier tables during probes.

Acked-by: Wolfram Sang <wsa@kernel.org>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Stephen Kitt <steve@sk2.org>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2020-09-03 11:09:19 +05:30
Jonathan Bakker
cd972fe900 ARM: dts: s5pv210: Enable audio on Aries boards
Both the Galaxy S and the Fascinate4G have a WM8994 codec, but they
differ slightly in their jack detection and micbias configuration.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-09-02 22:11:43 +02:00
Krzysztof Kozlowski
a6b5a1977c ARM: dts: exynos: Correct whitespace and indentation issues
Remove double space after '=' and fix indentation in Exynos3250,
Exynos4210 and Exynos4412 boards.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-33-krzk@kernel.org
2020-09-02 17:48:20 +02:00
Krzysztof Kozlowski
6511f11a49 ARM: dts: exynos: Correct S3C RTC bindings in Tiny4412
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add a
workaround to model its clock with fixed-clock.  This fixes S3C RTC and
silences dtbs_check warnings like:

  arch/arm/boot/dts/exynos4412-tiny4412.dt.yaml: rtc@10070000: clocks: [[7, 346]] is too short
  arch/arm/boot/dts/exynos4412-tiny4412.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-32-krzk@kernel.org
2020-09-02 17:48:07 +02:00