The MTU0 is required for full booting of the system. The driver has
been previously DT:ed and is in use on the Nomadik platform, but we
also need to enable it on ux500 based systems.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The "mentor,musb" binding isn't documented so I was about
to document it.
The node is missing a few properties for configuration like
"multipoint", "dyn_fifo", "num_eps" or "ram_bits". However
I am not sure "missing" is the right word here because some
of those informations might be obtained from the chip itself
but it is not done (yet).
Further the ePARP 2.3.1 says the matching goes from left to
right taking the fist match. Right now there is jus a driver
for "stericsson,db8500-musb" and none for "mentor,musb".
I'm not 100% that it is simply possible to have a generic
since even for DMA we have ifdefs in the driver between
"generic mentor dma" and "ux500 dma" and I mean within musb
and not the dma code.
For that reason (that I am not sure a generic musb binding
is possible and how its binding / required properties will
look like) and the reason that we have here a minor binding
without a driver to look at I suggest to remove that binding.
If the majority of people prefer to keep this binding I'm
curious how the documentation of the binding should look like.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
These regulator rail names are already set in the
ste-href.dtsi file included by this file, this is just redoing
the naming for no benefit, so delete it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Ux500 boards are layered like this:
ste-snowball.dts includes ste-href.dtsi that includes
ste-dbx500.dtsi.
The dbx500.dtsi defines the PRCMU SoC regulators so the SoC will
probe and you can use ampersand references where need be.
However the HREF common dtsi and these two boards redefine the
same PRCMU SoC regulators with the very same names and properties
for no reason. This is like filling in the same line three
times instead of drawing it once. Just delete the surplus
references and have the PRCMU regulators defines in the SoC
files ste-dbx500.dtsi, this is enough.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Turns out that they're actually not required and the driver probes just
fine without them. The ID is incorrect at the moment anyway. They actually
currently specify the stn8815.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add initial PHYTEC VF610 Cosmic/Cosmic+ board support with
UART and FEC enabled.
Signed-off-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This pin definition had been added after the initial patch to use
symbolic pin names in DTS files.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Update the Ka-Ro TX28 DTS file.
- add Copyright header
- use label references for better readability
- sort the entries alphabetically
- add some aliases used by U-Boot to modify the DT data
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
For some reason, the select input of pin function USB_OTG_ID is not
implemented via a regular select input register but using the bit
USB_OTG_ID_ SEL (shift 13) of IOMUXC_GPR1 register (offset 0x4).
As per the workaround for such quirk implemented in pinctrl driver,
we need to compose the input_val cell as below.
31 23 15 7 0
| 0xff | shift | width | select |
Thus, we have 0xff0d0100 for MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID and
0xff0d0101 for MX6QDL_PAD_GPIO_1__USB_OTG_ID in input_val cell.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Peter Chen <peter.chen@freescale.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Convert mx23/mx28 dts files to use the padconfig defintions from
mxs-pinfunc.h.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Convert mx23/mx28 dts filed to use the pinctrl header files.
NOTE: During automatic conversion of these files to use the pinconfig
definitions an inconsistency has been found in:
arch/arm/boot/dts/imx28-apx4devkit.dts
According to the comment the function for pad SSP2_SS0 should have
been MX28_PAD_SSP2_SS0__GPIO_2_19, while the given value 0x2131
represents: MX28_PAD_SSP2_SS0__AUART3_TX
I used the later (though probably wrong) definition because that's
what is actually being used in the DTB.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Remove the list of possible pin configurations from the documentation
file and create header files containing those definitions.
This eliminates the need for error-prone manual lookup of those values
in the documentation and guarantees consistency between the human
readable representation of the pad function in the .dts file and the
actual binary value used in DT.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Provide 'lradc-touchscreen-wires' property to the LRADC driver, so that
touchscreen can be functional.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
On imx6qdl-sabresd the SDHC2 and SDHC3 are 8 bit-wide, so pass the bus-width
property to reflect that.
Otherwise the mmc driver will operate with the default bus-width value of 4.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This is needed for supporting ultra high speed cards like SD3.0 cards.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Enable USB function for OTG 1 and OTG 2 at mx6sololite evk.
Besides, fix the wrong interrupt number for OTG2 and host 1.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
imx6q-sabrelite board can be connected to a 1024x768 Hannstar LVDS panel.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Put the nodes in alphabetical order so that further node additions can be better
organized.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Trying to use the usb otg port on mx53qsb results in the following error:
$ modprobe g_ether
using random self ethernet address
using random host ethernet address
usb0: HOST MAC 52:0f:8a:1e:aa:09
usb0: MAC de:f3:70:d8:6c:62
using random self ethernet address
using random host ethernet address
g_ether gadget: Ethernet Gadget, version: Memorial Day 2008
g_ether gadget: g_ether ready
(Connect the USB cable)
$ ci_hdrc ci_hdrc.0: remove, state 4
usb usb1: USB disconnect, device number 1
ci_hdrc ci_hdrc.0: USB bus 1 deregistered
ci_hdrc ci_hdrc.0: timeout waiting for 00000800 in 11
USB otg port goes to connector J3 (mini USB) and also to the USB combo (J2).
As mx53qsb does not provide a USB ID pin, pass the dr_mode as 'peripheral' so
that we can have usb device working.
Tested via g_ether.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested via g_ether:
$ modprobe g_ether
using random self ethernet address
using random host ethernet address
usb0: HOST MAC 42:b5:26:a9:48:21
usb0: MAC 36:a6:85:9b:9e:13
using random self ethernet address
using random host ethernet address
g_ether gadget: Ethernet Gadget, version: Memorial Day 2008
g_ether gadget: g_ether ready
$ g_ether gadget: high-speed config #1: CDC Ethernet (ECM)
$ ifconfig usb0 10.0.0.2
Then on the PC host side:
~$ sudo ifconfig usb0 10.0.0.1
~$ ping 10.0.0.2
PING 10.0.0.2 (10.0.0.2) 56(84) bytes of data.
64 bytes from 10.0.0.2: icmp_req=1 ttl=64 time=1.26 ms
64 bytes from 10.0.0.2: icmp_req=2 ttl=64 time=0.280 ms
64 bytes from 10.0.0.2: icmp_req=3 ttl=64 time=0.297 ms
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
RTS/CTS pins can be used for different purposes, so create separate
definitions for these pins.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
From Linus Walleij:
These three patches tear out the remaining AUXDATA in the
Nomadik platform and replace it with device tree.
Corresponding driver changes are coming from respective
subsystem tree and there are no build dependencies.
- Update device tree for VMMC regulator data
- Supply SD/MMC voltage from the VMMC regulator
- Delete auxdata for SD/MMC card and rely on DT only
- Update device tree for FSMC NAND merged for v3.12-rc1
- Delete auxdata for FSMC NAND
* tag 'for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: nomadik: delete FSMC platform data
ARM: nomadik: delete MMCI platform data
ARM: nomadik: register VMMC regulator
Signed-off-by: Olof Johansson <olof@lixom.net>
From Kukjin Kim:
Add device tree support for S3C64XX
- add device tree infrastructure for s3c64xx
- add DT SoC file for s3c64xx
- add DT board file for FriendlyARM Mini6410 board
- add DT board file for SAMSUNG SMDK6410
Based on Common Clk Framework for S3C64XX
* tag 'samsung-dt-s3c64xx' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Add dts file for S3C6410-based SMDK6410 board
ARM: dts: Add dts file for S3C6410-based Mini6410 board
ARM: dts: Add basic dts include files for Samsung S3C64xx SoCs
ARM: S3C64XX: Add board file for boot using Device Tree
gpio: samsung: Skip initialization if device tree is present
ARM: S3C64XX: Bypass legacy initialization when booting with DT
irqchip: vic: Parse interrupt and resume masks from device tree
ARM: S3C64XX: Remove old clock management code
ARM: S3C64XX: Migrate clock handling to Common Clock Framework
usb: ohci-s3c2410.c: Use clk_prepare_enable/clk_disable_unprepare
ARM: S3C64XX: Use clk_prepare_enable/clk_disable_unprepare in dma.c
ARM: SAMSUNG: Add soc_is_s3c6400/s3c6410 macros
Signed-off-by: Olof Johansson <olof@lixom.net>
From Nicolas Ferre, first fixes series for 3.12:
- removal of void IRQF_DISABLED flag in timer drivers
- two little fixes in DT for at91sam9x5 family
* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
ARM: at91: remove IRQF_DISABLED
ARM: at91: at91sam9x5: set default mmc[01] pinctrl-names
ARM: at91: serial: fix wrong pinctrl_usart2_rts
Signed-off-by: Olof Johansson <olof@lixom.net>
Use a standard 'qcom' prefix to denotate device trees meant for Qualcomm
based processors.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
