Commit Graph

875 Commits

Author SHA1 Message Date
Patrice Chotard
42fed7ba44 pinctrl: move subsystem mutex to pinctrl_dev struct
This mutex avoids deadlock in case of use of multiple pin
controllers. Before this modification, by using a global
mutex, deadlock appeared when, for example, a call to
pinctrl_pins_show() locked the pinctrl_mutex, called the
ops->pin_dbg_show of a particular pin controller. If this
pin controller needs I2C access to retrieve configuration
information and I2C driver is using pinctrl to drive its
pins, a call to pinctrl_select_state() try to lock again
pinctrl_mutex which leads to a deadlock.

Notice that the mutex grab from the two direction functions
was moved into pinctrl_gpio_direction().

For several cases, we can't replace pinctrl_mutex by
pctldev->mutex, because at this stage, pctldev is
not accessible :
	- pinctrl_get()/pinctrl_put()
	- pinctrl_register_maps()

So add respectively pinctrl_list_mutex and
pinctrl_maps_mutex in order to protect
pinctrl_list and pinctrl_maps list instead.

Reintroduce pinctrldev_list_mutex in
find_pinctrl_by_of_node(),
pinctrl_find_and_add_gpio_range()
pinctrl_request_gpio(), pinctrl_free_gpio(),
pinctrl_gpio_direction(), pinctrl_devices_show(),
pinctrl_register() and pinctrl_unregister() to
protect pinctrldev_list.

Changes v2->v3:
- Fix a missing EXPORT_SYMBOL_GPL() for pinctrl_select_state().

Changes v1->v2:
- pinctrl_select_state_locked() is removed, all lock mechanism
  is located inside pinctrl_select_state(). When parsing
  the state->setting list, take the per-pin-controller driver
  lock. (Patrice).
- Introduce pinctrldev_list_mutex to protect pinctrldev_list
  in all functions which parse or modify pictrldev_list.
  (Patrice).
- move find_pinctrl_by_of_node() from pinctrl/devicetree.c to
  pinctrl/core.c in order to protect pinctrldev_list.
  (Patrice).
- Sink mutex:es into some functions and remove some _locked
  variants down to where the lists are actually accessed to
  make things simpler. (Linus)
- Drop *all* mutexes completely from pinctrl_lookup_state()
  and pinctrl_select_state() - no relevant mutex was taken
  and it was unclear what this was protecting against. (Linus)

Reported by : Seraphin Bonnaffe <seraphin.bonnaffe@stericsson.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-26 17:01:35 +02:00
Laurent Meunier
cb6d315dc3 pinctrl/pinconfig: fix misplaced goto
This update contains a basic fix that went unseen through
test and review.

Signed-off-by: Laurent Meunier <laurent.meunier@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-26 17:00:14 +02:00
Tomasz Figa
a0d4262a25 pinctrl: s3c64xx: Fix build error caused by undefined chained_irq_enter
Commit de88cbb7 moved definitions of chained_irq_enter and
chained_irq_exit to a generic header, which must be now included instead
of the legacy arch-specific one.

This patch fixes build error caused by including the legacy header
leading to undefined chained_irq_enter and chained_irq_exit symbols.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-23 13:59:45 +02:00
Axel Lin
1f1a73571c pinctrl: vt8500: wmt: Fix checking return value of pinctrl_register()
pinctrl_register() returns NULL on error.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Tony Prisk <linux@prisktech.co.nz>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-19 17:16:36 +02:00
Laurent Meunier
f07512e615 pinctrl/pinconfig: add debug interface
This update adds a debugfs interface to modify a pin configuration
for a given state in the pinctrl map. This allows to modify the
configuration for a non-active state, typically sleep state.
This configuration is not applied right away, but only when the state
will be entered.

This solution is mandated for us by HW validation: in order
to test and verify several pin configurations during sleep without
recompiling the software.

Change log in this patch set;
Take into account latest feedback from Stephen Warren:
- stale comments update
- improved code efficiency and readibility
- limit size of global variable pinconf_dbg_conf
- remove req_type as it can easily be added later when
add/delete requests support is implemented

Signed-off-by: Laurent Meunier <laurent.meunier@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-19 15:45:05 +02:00
Patrice CHOTARD
06b62d8214 pinctrl: abx500: fix issue when no pdata
Fix an issue when probing pinctrl-abx500 with no
platform data.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-18 10:28:04 +02:00
Alexandre Courbot
76ec9d18b8 Convert selectors of GENERIC_GPIO to GPIOLIB
GENERIC_GPIO is now equivalent to GPIOLIB and features that depended on
GENERIC_GPIO can now depend on GPIOLIB to allow removal of this option.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
2013-04-16 18:47:14 +09:00
Olof Johansson
432b473419 Renesas ARM and SH based SoC pinmux fixes for v3.10
Correct a typo in sh-pfc r8a7779
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Merge tag 'renesas-pinmux-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2

From Simon Horman:
Renesas ARM and SH based SoC pinmux fixes for v3.10

Correct a typo in sh-pfc r8a7779

* tag 'renesas-pinmux-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  sh-pfc: r8a7779: tidyup intc_irq3_b typo

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-11 10:30:28 -07:00
Shawn Guo
21e59123a8 pinctrl: add pinctrl driver for imx6sl
Add a pinctrl driver for i.MX6 SoloLite based on pinctrl-imx core
driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 22:53:38 +08:00
Shawn Guo
3f551d6aca pinctrl: add pinctrl driver for imx6dl
The imx6dl is a derivative of imx6q with very limited difference.  These
two SoCs are so compatible that they can be handled as one platform in
software.  That said, we will not have target SOC_IMX6DL but just
reusing SOC_IMX6Q.   That's why the pinctrl-imx6dl driver is added here
with symbol PINCTRL_IMX6Q controlling the build of it.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 22:53:38 +08:00
Shawn Guo
e16415313c pinctrl: imx: move hard-coding data into device tree
Currently, all imx pinctrl drivers maintain a big array of struct
imx_pin_reg which hard-codes data like register offset and mux mode
setting for each pin function.  Every time a new imx SoC support is
added, we need to add such a big mount of data.  With moving to single
kernel build, it's only matter of time to be blamed on memory consuming.

With DTC pre-processor support in place, the patch moves all these data
into device tree by redefining the PIN_FUNC_ID in imxXX-pinfunc.h and
changing the PIN_FUNC_ID parsing code a little bit.

The pin id gets re-numbered based on mux register offset, or config
register offset if the pin has no mux register, so that kernel can
identify the pin id from register offsets provided by device tree.

As a bonus point of the change, those arbitrary magic numbers standing
for particular PIN_FUNC_ID in device tree sources are now replaced by
macros to improve the readability of dts files.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 22:52:50 +08:00
Arnd Bergmann
71f6424023 Merge branch 'mxs/cleanup' into next/multiplatform
This is a dependency for mxs/multiplatform

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Conflicts:
	drivers/clocksource/Makefile
2013-04-09 16:02:14 +02:00
Arnd Bergmann
44c0d23775 Linux 3.9-rc5
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Merge tag 'v3.9-rc5' into next/cleanup

This is a dependency for the mxs/cleanup branch.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-09 15:29:43 +02:00
Kuninori Morimoto
407cd59798 sh-pfc: r8a7779: tidyup intc_irq3_b typo
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
2013-04-09 17:56:08 +09:00
Maxime Ripard
cb51f8e8e3 pinctrl: sunxi: Rename wemac functions to emac
The pin functions associated to the ethernet controller were introduced
with the label "wemac", which was the name of the ethernet driver in the
allwinner source tree, while the real name of the IP is actually "emac",
as advertised in several documents including the datasheet.

Since this is part of the device tree bindings, and that these part of
the bindings have not yet be released in a kernel version, it seems like
the good timing to change it and assure consistency.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 10:47:52 +02:00
Thomas Abraham
8dc3568d55 pinctrl: exynos5440: add gpio interrupt support
Exynos5440 supports gpio interrupts on gpios 16 to 23. The eight interrupt lines
originating from the pin-controller are connected to the gic. Add irq-chip support
for these interrupts.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 10:16:53 +02:00
Thomas Abraham
f981973942 pinctrl: exynos5440: fix probe failure due to missing pin-list in config nodes
The property 'samsung,exynos5440-pins' is optional in configuration nodes
which are included in the Exynos5440 pin-controller device node. Fix the
incorrect failure in driver probe if 'samsung,exynos5440-pins' property
is not found in the configuration nodes.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 10:13:59 +02:00
Sachin Kamat
2e8ff91a5b pinctrl: ab8505: Staticize some symbols
Silences the following warnings:
drivers/pinctrl/pinctrl-ab8505.c:274:28: warning:
symbol 'ab8505_alternate_functions' was not declared. Should it be static?
drivers/pinctrl/pinctrl-ab8505.c:351:32: warning:
symbol 'ab8505_gpio_irq_cluster' was not declared. Should it be static?

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:59:42 +02:00
Sachin Kamat
efdd69f124 pinctrl: ab8540: Staticize some symbols
Silences the following warnings:
drivers/pinctrl/pinctrl-ab8540.c:302:28: warning:
symbol 'ab8540_alternate_functions' was not declared. Should it be static?
drivers/pinctrl/pinctrl-ab8540.c:379:32: warning:
symbol 'ab8540_gpio_irq_cluster' was not declared. Should it be static?

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:58:02 +02:00
Sachin Kamat
49e6cbfbfe pinctrl: ab9540: Staticize some symbols
Fixes the following warnings:
drivers/pinctrl/pinctrl-ab9540.c:382:28: warning:
symbol 'ab9540alternate_functions' was not declared. Should it be static?
drivers/pinctrl/pinctrl-ab9540.c:457:32: warning:
symbol 'ab9540_gpio_irq_cluster' was not declared. Should it be static?

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:55:59 +02:00
Sachin Kamat
a0ce9f3ee3 pinctrl: ab8500: Staticize some symbols
These symbols are used only in this file. Silences the following
warnings:
drivers/pinctrl/pinctrl-ab8500.c:392:28: warning:
symbol 'ab8500_alternate_functions' was not declared. Should it be static?
drivers/pinctrl/pinctrl-ab8500.c:458:32: warning:
symbol 'ab8500_gpio_irq_cluster' was not declared. Should it be static?

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:54:00 +02:00
Sachin Kamat
9c4154ef76 pinctrl: abx500: Staticize some symbols
These symbols are used only in this file. Without this patch
we get the following warnings:
drivers/pinctrl/pinctrl-abx500.c:520:5: warning:
symbol 'abx500_gpio_request' was not declared. Should it be static?
drivers/pinctrl/pinctrl-abx500.c:527:6: warning:
symbol 'abx500_gpio_free' was not declared. Should it be static?
drivers/pinctrl/pinctrl-abx500.c:614:5: warning:
symbol 'abx500_gpio_request_enable' was not declared. Should it be static?
drivers/pinctrl/pinctrl-abx500.c:714:5: warning:
symbol 'abx500_pin_config_get' was not declared. Should it be static?
drivers/pinctrl/pinctrl-abx500.c:721:5: warning:
symbol 'abx500_pin_config_set' was not declared. Should it be static?

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:52:57 +02:00
Tomasz Figa
61dd726131 pinctrl: Add pinctrl-s3c64xx driver
This patch adds pinctrl-s3c64xx driver which implements pin control
interface for Samsung S3C64xx SoCs.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:45:10 +02:00
Tomasz Figa
c16150d846 pinctrl: samsung: Handle banks with two configuration registers
This patch adds support for banks that have more than one function
configuration registers, e.g. some of the banks of S3C64xx SoCs.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:43:39 +02:00
Tomasz Figa
43fc9e7fab pinctrl: samsung: Remove hardcoded register offsets
This patch replaces statically hardcoded register offsets of Exynos SoCs
with an array of register offsets in samsung_pin_bank_type struct.

Thanks to this change, support for SoCs with other set and order of
registers can be added (e.g. S3C24xx and S3C64xx).

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:42:25 +02:00
Tomasz Figa
499147c9db pinctrl: samsung: Split pin bank description into two structures
This patch splits pin bank description into two structures, one
describing bank type (currently only bitfield widths), which can be
shared across multiple banks and second containing bank-specific
parameters including a pointer to a bank type struct.

It is a prerequisite for further patch removing the statically hardcoded
register offsets, making it impossible to support SoCs with different
set and order of pin control registers.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:41:09 +02:00
Tomasz Figa
d5517bec27 pinctrl: samsung: Include pinctrl-exynos driver data conditionally
Since pinctrl-samsung is a common part of the pin control support for
several Samsung SoCs, it can be compiled without Exynos support enabled.

This patch surrounds Exynos-specific driver data with ifdefs to include
them only when support for Exynos is enabled.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
[Fixed up EXYNOS4->EXYNOS]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:39:32 +02:00
Tomasz Figa
198469504a pinctrl: samsung: Protect bank registers with a spinlock
Certain pin control registers can be accessed from different contexts,
i.e. pinctrl, gpio and irq functions. This makes the locking provided by
pin control core insufficient.

This patch adds necessary locking using a per bank spinlock as it was
done in the old Samsung GPIO driver.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-09 09:36:42 +02:00
Arnd Bergmann
dc2d3db813 Clean-up for omap2+ timers from Jon Hunter <jon-hunter@ti.com>:
This series consists mainly of clean-ups for clockevents and
 clocksource timers on OMAP2+ devices. The most significant change
 in functionality comes from the 5th patch which is changing the
 selection of the clocksource timer for OMAP3 and AM335x devices
 when gptimers are used for clocksource.
 
 Note that this series depends on 7185684 (ARM: OMAP: use
 consistent error checking) in RMK's tree and 960cba6 (ARM:
 OMAP5: timer: Update the clocksource name as per clock data)
 in omap-for-v3.10/fixes-non-critical. So this branch is based
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 to avoid non-trivial merge conflicts.
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Merge tag 'omap-for-v3.10/timer-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers

From Tony Lindgren <tony@atomide.com>:

Clean-up for omap2+ timers from Jon Hunter <jon-hunter@ti.com>:

This series consists mainly of clean-ups for clockevents and
clocksource timers on OMAP2+ devices. The most significant change
in functionality comes from the 5th patch which is changing the
selection of the clocksource timer for OMAP3 and AM335x devices
when gptimers are used for clocksource.

Note that this series depends on 7185684 (ARM: OMAP: use
consistent error checking) in RMK's tree and 960cba6 (ARM:
OMAP5: timer: Update the clocksource name as per clock data)
in omap-for-v3.10/fixes-non-critical. So this branch is based
on a merge of 7185684 and omap-for-v3.10/fixes-non-critical
to avoid non-trivial merge conflicts.

* tag 'omap-for-v3.10/timer-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP4+: Fix sparse warning in system timers
  ARM: OMAP2+: Store ID of system timers in timer structure
  ARM: OMAP3: Update clocksource timer selection
  ARM: OMAP2+: Simplify system timers definitions
  ARM: OMAP2+: Simplify system timer clock definitions
  ARM: OMAP2+: Remove hard-coded test on timer ID
  ARM: OMAP2+: Display correct system timer name
  ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS"
  ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD"
  ARM: OMAP: dpll: enable bypass clock only when attempting dpll bypass
  ARM: OMAP2+: powerdomain: avoid testing whether an unsigned char is less than 0
  ARM: OMAP2+: hwmod: Remove unused _HWMOD_WAKEUP_ENABLED flag
  ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clk
  ARM: OMAP2+: AM33xx: hwmod: Add missing sysc definition to wdt1 entry

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-08 19:30:48 +02:00
Arnd Bergmann
797b3a9ee7 Merge branch 'gic/cleanup' into next/soc2
Both zynq and shmobile have conflicts against the gic cleanup
series, resolved here.

Conflicts:
	arch/arm/mach-shmobile/smp-emev2.c
	arch/arm/mach-shmobile/smp-r8a7779.c
	arch/arm/mach-shmobile/smp-sh73a0.c
	arch/arm/mach-zynq/platsmp.c
	drivers/gpio/gpio-pl061.c

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-08 18:59:19 +02:00
Arnd Bergmann
e9069cf8b7 arm: vt8500: Add pinctrl driver for arch-vt8500
This series adds support for the pinctrl/gpio module on all arch-vt8500
 supported SoCs.
 
 As part of the review process, some tidy up is also done to
 drivers/of/base.c to remove some code that is being constantly duplicated.
 
 Also, a patch for the bcm2835 pinctrl driver is included to take advantage
 of the new of/base.c code.
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Merge tag 'vt8500/pinctrl' of git://server.prisktech.co.nz/git/linuxwmt into next/drivers

From Tony Prisk <linux@prisktech.co.nz>:

arm: vt8500: Add pinctrl driver for arch-vt8500

This series adds support for the pinctrl/gpio module on all arch-vt8500
supported SoCs.

As part of the review process, some tidy up is also done to
drivers/of/base.c to remove some code that is being constantly duplicated.

Also, a patch for the bcm2835 pinctrl driver is included to take advantage
of the new of/base.c code.

* tag 'vt8500/pinctrl' of git://server.prisktech.co.nz/git/linuxwmt: (606 commits)
  pinctrl: bcm2835: make use of of_property_read_u32_index()
  gpio: vt8500: Remove arch-vt8500 gpio driver
  arm: vt8500: Remove gpio devicetree nodes
  arm: dts: vt8500: Update Wondermedia SoC dtsi files for pinctrl driver
  pinctrl: gpio: vt8500: Add pincontrol driver for arch-vt8500
  arm: vt8500: Increase available GPIOs on arch-vt8500
  of: Remove duplicated code for validating property and value
  of: Add support for reading a u32 from a multi-value property.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-08 18:26:15 +02:00
Stephen Warren
ce63d6d4bb pinctrl: bcm2835: make use of of_property_read_u32_index()
Use the new standard API of_property_read_u32_index() instead of open-
coding it.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
2013-04-04 18:05:26 +13:00
Tony Prisk
170c6152ae pinctrl: gpio: vt8500: Add pincontrol driver for arch-vt8500
This patch adds support for the GPIO/pinmux controller found on the VIA
VT8500 and Wondermedia WM8xxx-series SoCs.

Each pin within the controller is capable of operating as a GPIO or as
an alternate function. The pins are numbered according to their control
bank/bit so that if new pins are added, the existing numbering is maintained.

All currently supported SoCs are included: VT8500, WM8505, WM8650, WM8750 and
WM8850.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-04 18:00:02 +13:00
Linus Walleij
6a7b3e9704 Linux 3.9-rc5
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Merge tag 'v3.9-rc5' into devel

Linux 3.9-rc5

Conflicts:
	drivers/pinctrl/pinconf.c
2013-04-03 22:18:36 +02:00
Patrice Chotard
661462f4c6 pinctrl/abx500: fix ab9540 alternate function
This fix allows to correctly select default and
alternate pin mode.

By default for all ABx500 family chip, pin default
mode is selected by clearing corresponding bit in
GPIOSELx register except for pins which support
alternate function, in this case, corresponding bit
must be set.

But, due to an unlogical hardware implementation,
for one particular pin (GPIO11) reverse setting
must be done. For that, update the alternate function
array by declaring that this pin supports alternate
function.
Same issue has been fixed in pinctrl-ab8505.c

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 22:15:14 +02:00
Linus Walleij
6282c02e2c pinctrl/pinconf: partial revert of pin config debugfs
I accidentally left this patch:

commit 6f9e41f4e6
"pinctrl/pinconfig: add debug interface"

in the tree though the patch was not yet finished.
Revert it partially (we need the infrastructural changes).

Cc: Laurent Meunier <laurent.meunier@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 21:59:45 +02:00
Gabriel Fernandez
356d3e4562 pinctrl/nomadik: add device tree bindings for db8540
This adds a simple device tree binding for db8540 boards.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@stericsson.com>
Reviewed-by: Philippe Langlais <philippe.langlais@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 19:21:05 +02:00
Richard Genoud
385d94246b pinctrl: simplify the re-enable old state code in pinctrl_select_state
Instead of just enabling the settings that were disabled in the 1st
loop, it's simpler to recall pinctrl_select_state with the old state.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 14:38:27 +02:00
Richard Genoud
af60617771 pinctrl: select_state: don't call pinctrl_free_setting on error
As Stephen Warren pointed out, pinctrl_free_setting() was called instead
of pinmux_disable_setting() on error.
In this error code, we want to call pinmux_disable_setting() where
pinmux_enable_setting() was called.
And when pinconf_apply_setting() was called, we can't do much to undo
the pin muxing (the closest thing I can think about for "unmuxing" a pin
is muxing it as GPIO input).

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 14:36:43 +02:00
Axel Lin
28d0c14b43 pinctrl: coh901: Fix error checking in u300_gpio_to_irq
The pointer "port" is always not NULL if gpio->port_list is not empty.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 14:31:19 +02:00
Richard Genoud
175ca83c0b pinctrl: pinctrl_select_state: set the old_state back on error
In unapply_new_state, the old state is re-applied, but p->state is not
set back as it should.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 14:27:31 +02:00
Richard Genoud
8009d5ff00 pinctrl: remove superfluous optimization in pinctrl_select_state_locked
As Stephen Warren suggested, checking first if the setting->node entry
is the first in the list or not is superfluous, as it is checked again
in the list_for_each_entry bellow.
So, remove it, the code will be simpler and lighter !

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 14:22:39 +02:00
Richard Genoud
da58751ca2 pinctrl: use dev_info instead of pr_info in pinctrl_select_state_locked
And remove superfluous brackets.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 14:20:37 +02:00
Emilio López
950707c0eb pinctrl: sunxi: add clock support
For the port controller to work, we need to enable the apb0_pio gate.
This commit adds the ability to enable one clock specified on the device
tree to the pinctrl driver.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 13:58:38 +02:00
Haojian Zhuang
2afe822968 pinctrl: core: add dependence of GPIOLIB
In file included from drivers/pinctrl/core.c:30:0:
include/asm-generic/gpio.h: In function 'gpio_get_value_cansleep':
include/asm-generic/gpio.h:270:2: error: implicit declaration of
function '__gpio_get_value' [-Werror=implicit-function-declaration]
include/asm-generic/gpio.h: In function 'gpio_set_value_cansleep':
include/asm-generic/gpio.h:276:2: error: implicit declaration of
function '__gpio_set_value' [-Werror=implicit-function-declaration]
drivers/pinctrl/core.c: In function 'pinctrl_ready_for_gpio_range':
drivers/pinctrl/core.c:297:9: error: implicit declaration of function
'gpio_to_chip' [-Werror=implicit-function-declaration]
drivers/pinctrl/core.c:297:27: warning: initialization makes pointer
from integer without a cast [enabled by default]
drivers/pinctrl/core.c:304:45: error: dereferencing pointer to
incomplete type
drivers/pinctrl/core.c:305:26: error: dereferencing pointer to
incomplete type
drivers/pinctrl/core.c:305:39: error: dereferencing pointer to
incomplete type
cc1: some warnings being treated as errors
make[2]: *** [drivers/pinctrl/core.o] Error 1
make[1]: *** [drivers/pinctrl] Error 2
make[1]: *** Waiting for unfinished jobs....

It's caused by CONFIG_GPIOLIB isn't enabled for some platform. So
add the dependence on pinctrl_ready_for_gpio_range().

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 13:48:33 +02:00
Patrice Chotard
a36571b59e pinctrl/abx500: fix ab8505 alternate function
This fix allows to correctly select default and
alternate pin mode.

By default for all ABx500 family chip, pin default
mode is selected by clearing corresponding bit in
GPIOSELx register except for pins which support
alternate function, in this case, corresponding bit
must be set.

But, due to an unlogical hardware implementation,
for one particular pin (GPIO11) reverse setting
must be done. For that, update the alternate function
array by declaring that this pin supports alternate
function.

Reported-by: Ramesh Chandrasekaran <ramesh.chandrasekaran@stericsson.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-03 11:23:13 +02:00
Olof Johansson
16eaaee4d8 Third round of Renesas ARM SoC board updates for v3.10
Highlights:
 
 * Add Lager board support
 * Add ape6evm board support
 * Add Bock-W board support
 * Mackerel MMCIF/SDHI clean ups
 * Add ethernet support to kzm9g-reference
 
 This pull request is based on a merge of:
 
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux2-for-v3.10
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-boards2-for-v3.10
 
 The merge with renesas-pinmux2-for-v3.10 was made to provide
 run-time dependencies for the following changes:
 
 ARM: shmobile: APE6EVM LAN9220 support
 ARM: shmobile: APE6EVM PFC support
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Merge tag 'renesas-boards3-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards2

Third round of  Renesas ARM SoC board updates for v3.10

Highlights:

* Add Lager board support
* Add ape6evm board support
* Add Bock-W board support
* Mackerel MMCIF/SDHI clean ups
* Add ethernet support to kzm9g-reference

This pull request is based on a merge of:

git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux2-for-v3.10
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-boards2-for-v3.10

The merge with renesas-pinmux2-for-v3.10 was made to provide
run-time dependencies for the following changes:

ARM: shmobile: APE6EVM LAN9220 support
ARM: shmobile: APE6EVM PFC support

* tag 'renesas-boards3-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (307 commits)
  ARM: shmobile: mackerel: clean up MMCIF vs. SDHI1 selection
  ARM: shmobile: mackerel: add interrupt names for SDHI0
  ARM: shmobile: mackerel: switch SDHI and MMCIF interfaces to slot-gpio
  ARM: shmobile: mackerel: remove OCR masks, where regulators are used
  ARM: shmobile: mackerel: SDHI resources do not have to be numbered
  ARM: shmobile: Initial r8a7790 Lager board support
  ARM: shmobile: APE6EVM LAN9220 support
  ARM: shmobile: APE6EVM PFC support
  ARM: shmobile: APE6EVM base support
  ARM: shmobile: kzm9g-reference: add ethernet support
  ARM: shmobile: add R-Car M1A Bock-W platform support
  sh-pfc: r8a73a4: Remove unused GPIO bias data
  ARM: shmobile: r8a73a4: Remove all GPIO enums
  sh-pfc: r8a73a4: Remove function GPIOs
  ARM: shmobile: r8a73a4: Remove IRQC function GPIOs
  ARM: shmobile: r8a73a4: Remove SCIF function GPIOs
  sh-pfc: r8a73a4: Remove IRQC function GPIOS
  sh-pfc: r8a73a4: Remove SCIF function GPIOS
  sh-pfc: r8a73a4: Add IRQC pin groups and functions
  sh-pfc: r8a73a4: Add SCIF pin groups and functions
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-02 23:27:51 -07:00
Olof Johansson
e382328a81 Second round of Renesas ARM and SH based SoC pinmux updates for v3.10
Highlights:
 
 * Compilation fixes for sh7269 and for when CONFIG_BUG is not set
 * sh-pfc Support for r8a73a4 SoC
 * Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC
 
 This pull request is based on a merge of:
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10
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Merge tag 'renesas-pinmux2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2

Second round of Renesas ARM and SH based SoC pinmux updates for v3.10

Highlights:

* Compilation fixes for sh7269 and for when CONFIG_BUG is not set
* sh-pfc Support for r8a73a4 SoC
* Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC

This pull request is based on a merge of:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10

* tag 'renesas-pinmux2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (185 commits)
  sh-pfc: r8a73a4: Remove unused GPIO bias data
  ARM: shmobile: r8a73a4: Remove all GPIO enums
  sh-pfc: r8a73a4: Remove function GPIOs
  ARM: shmobile: r8a73a4: Remove IRQC function GPIOs
  ARM: shmobile: r8a73a4: Remove SCIF function GPIOs
  sh-pfc: r8a73a4: Remove IRQC function GPIOS
  sh-pfc: r8a73a4: Remove SCIF function GPIOS
  sh-pfc: r8a73a4: Add IRQC pin groups and functions
  sh-pfc: r8a73a4: Add SCIF pin groups and functions
  sh-pfc: r8a73a4: Add bias (pull-up/down) pinconf support
  sh-pfc: r8a73a4: GPIO IRQ support
  sh-pfc: r8a73a4: Support sparse GPIO numbers
  sh-pfc: Add r8a73a4 pinmux support
  sh-pfc: r8a7779: Split DU input and output pixel clocks
  sh-pfc: r8a7779: Remove GPIO data
  ARM: shmobile: r8a7779: Register GPIO devices
  sh-pfc: Configure pins as GPIOs at request time when handled externally
  sh-pfc: Skip gpiochip registration when no GPIO resource is found
  sh-pfc: Make GPIO support optional
  sh-pfc: Make function GPIOs support optional
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-02 23:06:57 -07:00
Olof Johansson
2f7053e0ec Second round of Renesas ARM SoC updates for v3.10
Some Highlights:
 
 * Add r8a7790 SoC
 * Add r8a73a4 SoC
 * Migrate r8a7740 SoC from INTC to GIC
 * Add thermal driver support to r8a73a4 SoC
 * Add irqpin DT nodes to sh73a0 SoC
 * Add SCIF support to r8a7778 SoC
 
 This pull request is based on a merge of:
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc-for-v3.10
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-intc-external-irq2-for-v3.10
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Merge tag 'renesas-soc2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2

Second round of Renesas ARM SoC updates for v3.10

Some Highlights:

* Add r8a7790 SoC
* Add r8a73a4 SoC
* Migrate r8a7740 SoC from INTC to GIC
* Add thermal driver support to r8a73a4 SoC
* Add irqpin DT nodes to sh73a0 SoC
* Add SCIF support to r8a7778 SoC

This pull request is based on a merge of:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc-for-v3.10
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-intc-external-irq2-for-v3.10

* tag 'renesas-soc2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (88 commits)
  ARM: shmobile: r8a7790 SoC 64-bit DT support
  ARM: shmobile: r8a73a4 SoC 64-bit DT support
  ARM: shmobile: r8a7790 PFC support
  ARM: shmobile: r8a7790 IRQC support
  ARM: shmobile: r8a7790 SCIF support
  ARM: shmobile: Initial r8a7790 SoC support
  ARM: shmobile: r8a7779: move global functions to r8a7779.h
  ARM: shmobile: r8a7740: move global functions to r8a7740.h
  ARM: shmobile: sh73a0: move global functions to sh73a0.h
  ARM: shmobile: sh7372: move global functions to sh7372.h
  ARM: shmobile: r8a7779: remove DIV4 clocks and use fixed ratio clock
  ARM: shmobile: r8a7740: use fixed ratio clock
  ARM: shmobile: r8a7740: tidyup comment/implementation mismatch
  ARM: shmobile: sh73a0: use fixed ratio clock
  ARM: shmobile: sh7372: use fixed ratio clock
  ARM: shmobile: add struct clk_ratio and fixed ratio clock macro
  ARM: shmobile: sh7372: remove DIV4_ZT* clocks
  ARM: shmobile: sh73a0: remove DIV4_ZT* clocks
  ARM: shmobile: sh73a0: add a TWD clock
  ARM: shmobile: r8a7740: Migrate from INTC to GIC
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-02 22:49:03 -07:00
Magnus Damm
202ac6a21a sh-pfc: r8a73a4: Remove unused GPIO bias data
Remove unused pull-up/down data from the r8a73a4 PFC code.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:43 +09:00
Magnus Damm
3e36ab671c sh-pfc: r8a73a4: Remove function GPIOs
All r8a73a4 platforms use the pinctrl API to control pin functions.
Function GPIOs are no longer needed.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:42 +09:00
Magnus Damm
f91663ff56 sh-pfc: r8a73a4: Remove IRQC function GPIOS
The r8a73a4 board support will use the pinctrl API to control the
external IRQ pins so remove the unused function GPIOS.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:41 +09:00
Magnus Damm
504e584aa1 sh-pfc: r8a73a4: Remove SCIF function GPIOS
The r8a73a4 board support will use the pinctrl API to control the SCIF
pins, remove the corresponding unused function GPIOS.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:41 +09:00
Magnus Damm
515a828f77 sh-pfc: r8a73a4: Add IRQC pin groups and functions
V2 of PINCTRL support for r8a73a4 IRQC hardware
and in particular the external pins IRQ0 -> IRQ57.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:40 +09:00
Magnus Damm
172fd616dd sh-pfc: r8a73a4: Add SCIF pin groups and functions
Add PINCTRL support for r8a73a4 SCIF ports SCIFA0->SCIFA1 and
SCIFB0->SCIFB3.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:40 +09:00
Magnus Damm
57ef73b469 sh-pfc: r8a73a4: Add bias (pull-up/down) pinconf support
Implement pull-up/down support for r8a73a4 similar to the implementation
for sh73a0.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:39 +09:00
Magnus Damm
c96931ca88 sh-pfc: r8a73a4: GPIO IRQ support
V2 of code to add GPIO -> IRQ mappings to the
PFC table for the r8a73a4 SoC. Requires the IRQs
to be mapped at a fixed location in Linux IRQ
space. The actual IRQs are not handled by the
PFC, instead IRQC is used on r8a73a4.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:39 +09:00
Magnus Damm
f365bfcc87 sh-pfc: r8a73a4: Support sparse GPIO numbers
The r8a73a4 SoC has sparse GPIO numbers. Declare ranges for pin numbers
in the PFC SoC data. Pin numbers shall be used with the GPIO API from
this point on.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:38 +09:00
Magnus Damm
c98f6c21af sh-pfc: Add r8a73a4 pinmux support
Add initial PFC support for the r8a73a4 SoC.

At this point only GPIO interface is supported, move to newer interfaces
planned as incremental changes.

Original authors are Morimoto-san with help from Yoshii-san, thanks to
them for the heavy lifting. Adjusted by Magnus to work together with
updated code in drivers/pinctrl.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:38 +09:00
Laurent Pinchart
ba774cc738 sh-pfc: r8a7779: Split DU input and output pixel clocks
The output pixel clocks can be used without the input pixel clocks.
Split them in different groups.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:37 +09:00
Laurent Pinchart
2b4b588299 sh-pfc: r8a7779: Remove GPIO data
GPIOs are now handled by a separate driver, remove GPIO data from the
SoC information structure.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:37 +09:00
Laurent Pinchart
e3c470510b sh-pfc: Configure pins as GPIOs at request time when handled externally
When a GPIO is handled by a separate driver the pinmux
gpio_set_direction() handler won't be called. The pin mux type then need
to be configured to GPIO at request time.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:36 +09:00
Laurent Pinchart
ceef91dcc0 sh-pfc: Skip gpiochip registration when no GPIO resource is found
Boards/platforms that register dedicated GPIO devices will not supply a
memory resource for GPIOs. Try to locate the GPIO memory resource at
initialization time, and skip registration of the gpiochip if the
resource can't be found.

This is a temporary modification to ease the transition to separate GPIO
drivers. It should be reverted when all boards and platforms will have
been moved.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:36 +09:00
Laurent Pinchart
1a4fd58f76 sh-pfc: Make GPIO support optional
When implemented as a separate IP block, GPIOs should be handled by a
separate driver. To make this possible GPIO support needs to be optional
in the sh-pfc driver.

If no GPIO data registers are supplied in the SoC information structure
skip registration of the gpiochip.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:35 +09:00
Laurent Pinchart
542a564d2d sh-pfc: Make function GPIOs support optional
The target is to get rid of function GPIOs completely. To reach this,
make function GPIOs support optional by skipping the function GPIO chip
registration if no function GPIOS are defined in SoC data.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03 10:30:35 +09:00
Laurent Pinchart
7417dae521 sh-pfc: r8a7779: Don't use GPIO enum entries
Refactor the GPIO macro magic to use GPIO numbers directly instead of
the GPIO_GP_x_y enum entries. This will allow removing the GPIO enum
entries from the mach/r8a7779.h header.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02 11:09:45 +09:00
Laurent Pinchart
c09b51d5de sh-pfc: r8a7779: Remove function GPIOs
All r8a7779 platforms use the pinctrl API to control functions. Function
GPIOs are unused and unneeded, remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02 11:09:45 +09:00
Laurent Pinchart
1960d58003 sh-pfc: Fix compiler warning when BUG()
The sh_pfc_phys_to_virt() function ends with a BUG() statement without a
return. When CONFIG_BUG isn't set the function will thus have no return
value. Fix it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02 11:09:45 +09:00
Simon Horman
809609a5d8 Merge branch 'soc' into pinmux-base
Conflicts:
	drivers/pinctrl/sh-pfc/pfc-r8a7740.c

This merge is to provide r8a73a4 SoC files, which are added in the
soc branch and depended on by r8a73a4 pfc-changes which are to
be added to the pinmux branch.
2013-04-02 11:08:34 +09:00
Bastian Hecht
0b7d782022 ARM: shmobile: r8a7740: Migrate from INTC to GIC
With the added capabilty of the intc_irqpin driver to handle shared
external IRQs, all prerequisites are fulfilled and we are ready to
migrate completely to GIC. This includes the following steps:

- Kconfig:	select ARM_GIC and RENESAS_INTC_IRQPIN
- intc-r8a7740: Throw out all legacy INTC code and init the GIC. We need
  		to mask out all shared IRQs as it is needed by the
		shared intc_irqpin driver.
- setup-r8a7740: Add 4 irqpin devices to handle external IRQs and update
		all IRQ numbers to point to the GIC SPI.
- board-armadillo: Update all IRQ numbers to point to the GIC SPI.
- pfc-r8a7740:	Update all IRQ numbers of the GPIOs to point to the GIC
		SPI.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02 11:02:09 +09:00
David Woodhouse
aaed651ff6 pinctrl: mvebu: prevent walking off the end of group array
While investigating (ab)use of krealloc, David found this bug.  It's
unlikely to occur, but now we detect the condition and error out
appropriately.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 23:36:17 +01:00
Richard Genoud
50cf7c8ab3 pinctrl: re-enable old state in case of error in pinctrl_select_state
If a new state is applied, the groups configured in the old state but
not in the new state are disabled.
If something goes wrong and the new state can't be applied, we have to
re-enable those groups.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 23:18:28 +01:00
Richard Genoud
3102a76cfb pinctrl: disable and free setting in select_state in case of error
If enabling a pin fails in pinctrl_select_state_locked(), all the
previous enabled pins have to be disabled to get back to the previous
state.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 23:17:12 +01:00
Richard Genoud
d3cee8305b pinctrl: create pinctrl_free_setting function
This prepares the implementation of pinctrl_select_state_locked() free code.

No functionnal change.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 23:14:52 +01:00
Richard Genoud
2c9abf808a pinctrl: fix typo in header
Clearly, "node" was meant instead of "not"

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 23:12:48 +01:00
Wei Yongjun
3dcbd6f578 pinctrl: sirf: using for_each_set_bit to simplify the code
Using for_each_set_bit() to simplify the code.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 22:57:14 +01:00
Sachin Kamat
8b0ef2580f pinctrl: coh901: Fix checkpatch error
Fixes the following checkpatch error:
ERROR: space required before the open parenthesis '('

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 22:50:01 +01:00
Sachin Kamat
b6465424a6 pinctrl: generic: Fix checkpatch errors
Fixes the following type of checkpatch errors:
ERROR: space required before the open parenthesis '('

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 22:49:13 +01:00
Sachin Kamat
1ef465c059 pinctrl: generic: Make 'conf_items' static
'conf_items' is used only in this file. Silences the below
sparse warning:
drivers/pinctrl/pinconf-generic.c:37:24: warning:
symbol 'conf_items' was not declared. Should it be static?

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 22:48:08 +01:00
Sachin Kamat
3c93600d3e pinctrl: at91: Fix checkpatch errors
Fixes the following types of checkpatch errors:
ERROR: "foo * bar" should be "foo *bar"
ERROR: "foo* bar" should be "foo *bar"
ERROR: space required before the open parenthesis '('
ERROR: "(foo*)" should be "(foo *)"
ERROR: space required after that ',' (ctx:WxV)
ERROR: "(foo*const*)" should be "(foo *const*)"
ERROR: space required before that '*' (ctx:VxB)

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 22:47:12 +01:00
Sachin Kamat
1164d73a98 pinctrl: at91: Remove duplicate const
const declared twice. Fixes the following sparse warning:
drivers/pinctrl/pinctrl-at91.c:815:21: warning: duplicate const
drivers/pinctrl/pinctrl-at91.c:849:21: warning: duplicate const

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 22:46:18 +01:00
Wei Yongjun
c078d78aa9 pinctrl: exynos5440: fix invalid use of sizeof in exynos5440_pinctrl_probe()
sizeof() when applied to a pointer typed expression gives the
size of the pointer, not that of the pointed data.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 22:23:47 +01:00
Sachin Kamat
87ff934afd pinctrl/nomadik: Fix checkpatch errors
Fixes the following types of checkpatch errors:
ERROR: space required after that ',' (ctx:VxV)
ERROR: space prohibited before that close parenthesis ')'

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 22:22:17 +01:00
Sachin Kamat
cde6d8dcc3 pinctrl/nomadik-db8500: Fix checkpatch errors
Silences the following type of checkpatch errors:
ERROR: space required after that ',' (ctx:VxV)

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 22:21:32 +01:00
Haojian Zhuang
62194200e5 pinctrl: remove pxa pinctrl driver
pinctrl-pxa driver doesn't support well on DT mode. Now pinctrl-single
could support DT mode & pin configuration. Use pinctrl-single driver to
support MMP/PXA silicons instead.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 22:19:50 +01:00
Catalin Marinas
de88cbb7b2 arm: Move chained_irq_(enter|exit) to a generic file
These functions have been introduced by commit 10a8c383 (irq: introduce
entry and exit functions for chained handlers) in asm/mach/irq.h. This
patch moves them to linux/irqchip/chained_irq.h so that generic irqchip
drivers do not rely on architecture specific header files.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>
2013-03-26 16:11:43 +00:00
Arnd Bergmann
b426476a5c pinctrl: sirf: convert to linear irq domain
The sirf platforms use no hardcoded IRQ numbers, so there is no reason to
use the legacy domain, and by converting to the linear domain, we get
a more efficient representation of sparse IRQs and remove the dependency
on the mach/irqs.h header file.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
2013-03-25 12:25:23 +01:00
Linus Torvalds
3912a677f6 Here are a few pinctrl fixes for the v3.9 rc series:
- Usecount bounds checking so we do not go below zero on
   mux usecounts.
 - Loop range checking in GPIO ranges in the DT range parser.
 - Proper print in debugfs for pinconf state.
 - Fix compilation bug in generic pinconf code.
 - Minor bugfixes to abx500 and mvebu drivers.
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Merge tag 'pinctrl-fixes-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pinctrl fixes from Linus Walleij:
 "Here are a few pinctrl fixes for the v3.9 rc series:
   - Usecount bounds checking so we do not go below zero on mux
     usecounts.
   - Loop range checking in GPIO ranges in the DT range parser.
   - Proper print in debugfs for pinconf state.
   - Fix compilation bug in generic pinconf code.
   - Minor bugfixes to abx500 and mvebu drivers."

* tag 'pinctrl-fixes-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinmux: forbid mux_usecount to be set at UINT_MAX
  pinctrl: mvebu: fix checking for SoC specific controls
  pinctrl: generic: Fix compilation error
  pinctrl: Print the correct information in debugfs pinconf-state file
  pinctrl: abx500: Fix checking if pin use AlternateFunction register
  gpio: fix wrong checking condition for gpio range
2013-03-24 10:11:29 -07:00
Richard Genoud
740924a267 pinmux: forbid mux_usecount to be set at UINT_MAX
If pin_free is called on a pin already freed, mux_usecount is set to
UINT_MAX which is really a bad idea.

This will issue a warning, so that we can correct the code responsible
for the double free.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-21 19:26:18 +01:00
Simon Guinot
48a23fac5e pinctrl: mvebu: fix checking for SoC specific controls
This patch fixes a minor bug (probably due to a typo) while checking
the SoC specific controls in mvebu_pinctrl_probe().

Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-21 18:50:54 +01:00
Arnd Bergmann
c16c4c4b12 Renesas INTC External IRQ pin driver
This provides two new INTC drivers for use with Renesas ARM-based SoCs and
 makes use of them on the r8a7779 and sh73a0 SoCs.
 
 It has been agreed by the relevant parties, Thomas Gleixner, Magnus Damm,
 and myself that it would be best to merge this code through the renesas
 tree and thus through the arm-soc tree.
 
 This is based on:
 
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git renesas-soc-v3.10
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Merge tag 'renesas-intc-external-irq-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

From Simon Horman <horms+renesas@verge.net.au>:

Renesas INTC External IRQ pin driver

This provides two new INTC drivers for use with Renesas ARM-based SoCs and
makes use of them on the r8a7779 and sh73a0 SoCs.

It has been agreed by the relevant parties, Thomas Gleixner, Magnus Damm,
and myself that it would be best to merge this code through the renesas
tree and thus through the arm-soc tree.

This is based on:

git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git renesas-soc-v3.10

* tag 'renesas-intc-external-irq-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  irqchip: irqc: Add DT support
  irqchip: intc-irqpin: Initial DT support
  ARM: shmobile: Make r8a7779 INTC irqpin platform data static
  ARM: shmobile: Make sh73a0 INTC irqpin platform data static
  irqchip: Renesas IRQC driver
  irqchip: intc-irqpin: GPL header for platform data
  irqchip: intc-irqpin: Make use of devm functions
  irqchip: intc-irqpin: Add force comments
  irqchip: intc-irqpin: Cache mapped IRQ
  irqchip: intc-irqpin: Whitespace fixes
  ARM: shmobile: INTC External IRQ pin driver on r8a7779
  ARM: shmobile: INTC External IRQ pin driver on sh73a0
  ARM: shmobile: irq_pin() for static IRQ pin assignment
  irqchip: Renesas INTC External IRQ pin driver

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-03-21 18:02:40 +01:00
Magnus Damm
341eb5465f ARM: shmobile: INTC External IRQ pin driver on sh73a0
Adjust the sh73a0 IRQ code to make use of the
INTC External IRQ pin driver for external
interrupt pins IRQ0 -> IRQ31.

This removes quite a bit of special-case code
in intc-sh73a0.c but the number of lines get
replaced with platform device information in
setup-sh73a0.c. The PFC code is also adjusted
to make gpio_to_irq() return the correct
interrupt number.

At this point the DT reference implementations
are not covered. In the future such code shall
tie in the INTC External IRQ pin driver via
DT, so this kind of verbose code is not needed
for the long term DT case.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-18 21:26:05 +09:00
Laurent Pinchart
fdd7fc55f5 sh-pfc: r8a7779: Remove INTC function GPIOS
All r8a7779 platforms now use the pinctrl API to control the INTC pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:16 +01:00
Laurent Pinchart
cb1f8abc79 sh-pfc: r8a7779: Remove LBSC function GPIOS
All r8a7779 platforms now use the pinctrl API to control the LBSC pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:16 +01:00
Laurent Pinchart
e1114715f4 sh-pfc: r8a7779: Remove USB function GPIOS
All r8a7779 platforms now use the pinctrl API to control the USB pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:15 +01:00
Laurent Pinchart
52c5d0327e sh-pfc: r8a7779: Remove HSPI function GPIOS
All r8a7779 platforms now use the pinctrl API to control the HSPI pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:15 +01:00
Laurent Pinchart
c97c7464f9 sh-pfc: r8a7779: Remove SCIF function GPIOS
All r8a7779 platforms now use the pinctrl API to control the SCIF pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:15 +01:00
Laurent Pinchart
dd11cd3d1b sh-pfc: r8a7779: Remove SDHI and MMCIF function GPIOS
All r8a7779 platforms now use the pinctrl API to control the SDHI and
MMCIF pins, the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:15 +01:00
Laurent Pinchart
2a02818cbb sh-pfc: r8a7779: Remove DU1_DOTCLKOUT1 GPIO
The function is not documented in the r8a7779 datasheet. Remove it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:15 +01:00
Laurent Pinchart
3dff629bd8 sh-pfc: r8a7740: Remove SDHI and MMCIF function GPIOS
All r8a7740 platforms now use the pinctrl API to control the SDHI and
MMCIF pins, the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:15 +01:00
Laurent Pinchart
b56479f233 sh-pfc: r8a7740: Remove LCD0 and LCD1 function GPIOS
All r8a7740 platforms now use the pinctrl API to control the LCD0 and
LCD1 pins, the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:14 +01:00
Laurent Pinchart
f89fa85663 sh-pfc: sh73a0: Remove IrDA function GPIOS
All sh73a0 platforms now use the pinctrl API to control the IrDA pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:14 +01:00
Laurent Pinchart
f03e4be625 sh-pfc: sh73a0: Remove USB function GPIOS
All sh73a0 platforms now use the pinctrl API to control the USB pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:14 +01:00
Laurent Pinchart
0ad6fe5367 sh-pfc: sh73a0: Remove BSC function GPIOS
All sh73a0 platforms now use the pinctrl API to control the BSC pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:14 +01:00
Laurent Pinchart
d28d6d1d0d sh-pfc: sh73a0: Remove KEYSC function GPIOS
All sh73a0 platforms now use the pinctrl API to control the KEYSC pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:14 +01:00
Laurent Pinchart
19ac5557e7 sh-pfc: sh73a0: Remove pull-up function GPIOS
All sh73a0 platforms now use the pinconf API to control pull-ups, the
corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:14 +01:00
Laurent Pinchart
0b1e75ccc1 sh-pfc: sh73a0: Remove FSI function GPIOS
All sh73a0 platforms now use the pinctrl API to control the FSI pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:13 +01:00
Laurent Pinchart
85ef331547 sh-pfc: sh73a0: Remove I2C function GPIOS
All sh73a0 platforms now use the pinctrl API to control the I2C pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:13 +01:00
Laurent Pinchart
27d9b21f79 sh-pfc: sh73a0: Remove SCIFA and SCIFB function GPIOS
All sh73a0 platforms now use the pinctrl API to control the SCIFA and
SCIFB pins, the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:13 +01:00
Laurent Pinchart
31d3a01a87 sh-pfc: sh73a0: Remove LCD and LCD2 function GPIOS
All sh73a0 platforms now use the pinctrl API to control the LCD and
LCD2 pins, the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:13 +01:00
Laurent Pinchart
570f76a867 sh-pfc: sh7372: Remove SDHI and MMCIF function GPIOS
All sh7372 platforms now use the pinctrl API to control the SDHI and
MMCIF pins, the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:13 +01:00
Laurent Pinchart
fd9e7feb9a sh-pfc: r8a7779: Add INTC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:08 +01:00
Laurent Pinchart
f27f81f2c0 sh-pfc: r8a7779: Add LBSC pin groups and functions
Only the CS pins and functions are currently handled.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:08 +01:00
Laurent Pinchart
97d40c4224 sh-pfc: r8a7779: Add USB pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:08 +01:00
Laurent Pinchart
0f6e2e0e4e sh-pfc: r8a7779: Add USB0 and USB1 PENC pinmux support
The USB0 and USB1 PENC functions were missing. Add them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:08 +01:00
Laurent Pinchart
f516238737 sh-pfc: r8a7779: Add HSPI pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:07 +01:00
Laurent Pinchart
081b69bbb2 sh-pfc: r8a7779: Add SCIF pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:07 +01:00
Laurent Pinchart
6dbf296a45 sh-pfc: r8a7779: Add SDHI and MMCIF pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:07 +01:00
Laurent Pinchart
e8ebafdfea sh-pfc: r8a7779: Add DU pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:07 +01:00
Guennadi Liakhovetski
8b2810b957 sh-pfc: r8a7740: Add SDHI and MMCIF pin groups and functions
Add pin groups for the first two SDHI interfaces and two alternative pin
groups for the MMCIF interface on the r8a7740 SoC.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:07 +01:00
Laurent Pinchart
06c7dd866d sh-pfc: r8a7740: Add LCDC0 and LCDC1 pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:06 +01:00
Laurent Pinchart
512b156cef sh-pfc: sh73a0: Add IrDA pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:06 +01:00
Laurent Pinchart
a6aa1c7b0a sh-pfc: sh73a0: Add USB pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:06 +01:00
Laurent Pinchart
e24c62a6ce sh-pfc: sh73a0: Add BSC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:06 +01:00
Laurent Pinchart
d6bab7b12e sh-pfc: sh73a0: Add KEYSC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:06 +01:00
Guennadi Liakhovetski
82f6b6da70 sh-pfc: sh73a0: Add SDHI and MMCIF pin groups and functions
Add pin group definitions for SDHI0, SDHI1, SDHI2 and MMCIF interfaces on
sh73a0.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:06 +01:00
Laurent Pinchart
2ecd4154c9 sh-pfc: sh73a0: Add FSI pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:05 +01:00
Laurent Pinchart
ec3a57bb3b sh-pfc: sh73a0: Add I2C2 and I2C3 pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:05 +01:00
Laurent Pinchart
64d87acb27 sh-pfc: sh73a0: Add SCIFA and SCIFB pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:05 +01:00
Laurent Pinchart
df68a28d17 sh-pfc: sh73a0: Add LCD and LCD2 pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:05 +01:00
Laurent Pinchart
b8238993ed sh-pfc: sh73a0: Add bias (pull-up/down) pinconf support
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:34:05 +01:00
Guennadi Liakhovetski
55f11f0ec1 sh-pfc: sh7372: Add SDHCI and MMCIF pin groups and functions
Add pin groups for all three SDHI interfaces and two alternative pin
groups for the MMCIF interface on the sh7372 SoC.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-03-15 13:34:05 +01:00
Laurent Pinchart
6dc9b4550a sh-pfc: Return an error if a pin doesn't support the requested direction
When setting a pin direction verify that the requested direction is
supported, and return an error if it isn't.

This requires pin configuration information to be supplied by SoC data.
The check is a no-op if the information is not supplied.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:54 +01:00
Laurent Pinchart
9a643c9a11 sh-pfc: Convert message printing from pr_* to dev_*
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:54 +01:00
Laurent Pinchart
9fddc4a589 sh-pfc: Clean up pin configuration type handling
Set pin configuration type to

- PINMUX_TYPE_NONE at initialization time and when disabling a function
  or freeing a GPIO

- PINMUX_TYPE_FUNCTION when enabling a function

- PINMUX_TYPE_INPUT or PINMUX_TYPE_OUTPUT when setting the GPIO
  direction

Verify that the type is PINMUX_TYPE_NONE when enabling a function or
requesting a GPIO and return -EBUSY if it isn't.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:54 +01:00
Laurent Pinchart
0d00f00a10 sh-pfc: Merge sh_pfc_reconfig_pin() into sh_pfc_gpio_set_direction()
The sh_pfc_reconfig_pin() is only called from a single location. Merge
it into its call site to make the code easier to follow.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:54 +01:00
Laurent Pinchart
c58d9c1b26 sh-pfc: Implement generic pinconf support
The existing PFC pinconf implementation, tied to the PFC-specific pin
types, isn't used by drivers or boards. Replace it with the generic
pinconf types to implement bias (pull-up/down) setup. Other pin
configuration options can be implemented later if needed.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:54 +01:00
Laurent Pinchart
b705c05425 sh-pfc: Use proper error codes
Return proper error codes instead of -1, and propagate the error codes.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:54 +01:00
Laurent Pinchart
cd3c1beecf sh-pfc: Constify all SoC data
None of the SoC data need to be modified. Constify it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:53 +01:00
Laurent Pinchart
861601de10 sh-pfc: Remove configuration dry-run and free
The purpose of the dry-run is to ensure that a pin about to be
configured isn't in use. However, the current implementation is a no-op.
This proves that the dry-run isn't essential. Remove it.

Freeing configuration then becomes a no-op as well. Remove it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:53 +01:00
Laurent Pinchart
1a0039dce2 sh-pfc: Don't modify sh_pfc_pin SoC data
The sh_pfc_pin structure supplied in SoC data contains information about
pin configuration and name. It's abused to store GPIO data registers
information and pin config type. Move those fields out of the
pinmux_data_reg structure into the new sh_pfc_gpio_pin and
sh_pfc_pin_config structures.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:53 +01:00
Laurent Pinchart
51cb226b35 sh-pfc: Don't modify pinmux_data_reg SoC data
The pinmux_data_reg structure supplied in SoC data contains information
about data registers. It's abused to store per-device mapped iomem and
shadow values. Move those fields out of the pinmux_data_reg structure
into the per-device sh_pfc_chip structure.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:53 +01:00
Laurent Pinchart
bee9f22ba1 sh-pfc: Drop unused support for 1:1 physical to virtual memory mappings
Now that all PFC platform devices provide memory resources support for
registers without an associated memory resource isn't used anymore. Drop
it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:53 +01:00
Laurent Pinchart
e51d5343ff sh-pfc: Don't map data registers individually
All data registers are located in the same memory resource. Locate the
mapped resource at initializat time and use it directly instead of
computing a mapped address for each register. This gets rid of the
mapped_reg field of the pinmux_data_reg structure.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:53 +01:00
Laurent Pinchart
41f1219fae sh-pfc: Move GPIO registers access functions to gpio.c
Move the sh_pfc_setup_data_regs(), sh_pfc_setup_data_reg(),
sh_pfc_get_data_reg(), sh_pfc_read_bit() and sh_pfc_write_bit()
function to gpio.c as they belong to the GPIO implementation. Inline
sh_pfc_read_bit() and sh_pfc_write_bit() in their only call location.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:52 +01:00
Wei Yongjun
fd9d05b0fd sh-pfc: Fix return value check in sh_pfc_register_pinctrl()
In case of error, the function pinctrl_register() returns NULL not
ERR_PTR(). The IS_ERR() test in the return value check should be
replaced with NULL test.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:52 +01:00
Laurent Pinchart
3d8d9f1df9 sh-pfc: Expose real groups and functions in pinctrl/pinmux operations
The sh-pfc driver exposes one fake group and function per GPIO pin. As
the pinctrl and pinmux APIs are not used by any SuperH and SH Mobile
board or driver, drop the fake groups and functions and replace them by
a real pinctrl and pinmux implementation.

Groups and functions must now be explicitly provided by PFC SoC-specific
data.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:40 +01:00
Guennadi Liakhovetski
b58e5fac96 ARM: shmobile: sh73a0: Support sparse GPIO numbers
The SH73A0 SoC has sparse GPIO numbers. Declare the pin numbers ranges
in the PFC SoC data and use the pin numbers in the GPIO API.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:39 +01:00
Laurent Pinchart
63d573835f sh-pfc: Add support for sparse pin numbers
The PFC driver assumes that the value of the GPIO_PORTxxx enumeration
names are equal to the port number. This isn't true when the port number
space is sparse, as with the SH73A0.

Fix the issue by adding support for pin numbers ranges specified through
SoC data. When no range is specified the driver considers that the PFC
implements a single contiguous range for all pins.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:39 +01:00
Laurent Pinchart
247127f90b sh-pfc: Replace pinctrl_add_gpio_range() with gpiochip_add_pin_range()
Adding a GPIO range to a pinctrl device logically belongs to the GPIO
driver. Switch to the right API.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:39 +01:00
Laurent Pinchart
934cb02bab sh-pfc: Add function to retrieve a pin instance from its pin number
This prepares support for sparse pin numbering. The function currently
just performs and indexed lookup in the pins array.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:39 +01:00
Laurent Pinchart
0b73ee5d53 sh-pfc: Simplify the sh_pfc_gpio_is_pin() logic
The function is guaranteed to be called with a gpio number smaller than
nr_pins. The condition can the be simplified, and the function inlined.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:39 +01:00
Laurent Pinchart
a68fdca9b0 sh-pfc: Use pinmux identifiers in the pin muxing API
The PFC core exposes a sh_pfc_config_gpio() function that configures
pinmuxing for a given GPIO (either a real GPIO or a function GPIO).
Handling of real and function GPIOs belong to the GPIO layer, move the
GPIO number to mark translation to the caller and rename the function to
sh_pfc_config_mux().

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:39 +01:00
Laurent Pinchart
17dffe48d1 sh-pfc: Share the PORT_10_REV, PORT_32 and PORT_32_REV definitions
The macros are defined identically and used in two SoC-specific files,
share them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:38 +01:00
Laurent Pinchart
c07f54f604 sh-pfc: Look up IRQ table entries by GPIO number
Instead of converting the GPIO number to an enum_id and looking up IRQ
table entries by enum_id, replace the pinmux_irq enum_ids field with a
gpios field and lookup entries using the GPIO number.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:38 +01:00
Laurent Pinchart
a3db40a68a sh-pfc: Rename struct pinmux_pin to struct sh_pfc_pin
And drop the pinmux_flag_t typedef.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:38 +01:00
Laurent Pinchart
16883814ec sh-pfc: Split pins and functions into separate gpio_chip instances
Register two GPIO chips, one for the real GPIOs and one for the function
GPIOs.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:38 +01:00
Laurent Pinchart
a373ed0aa2 sh-pfc: Split pins and functions definition tables
Split the GPIOs table into a pins table for real GPIOs and a functions
table for function GPIOs.

Only register pins with the pinctrl core. The function GPIOs remain
accessible as GPIOs.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:38 +01:00
Laurent Pinchart
24d6b36e91 sh-pfc: Don't needlessly check GPIO type in sh_gpio_free()
The GPIO type is always PINMUX_TYPE_FUNCTION when freeing a function
GPIO. Hardcode the type value.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:37 +01:00
Laurent Pinchart
2119f7c9af sh-pfc: Shrink the pinctrl GPIO range to include real GPIOs only
As a step towards GPIO function removal, shorten the GPIO range
registered with the pinctrl core. Function GPIOs are now handled in the
GPIO handlers directly instead of going through the pinctrl API.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:37 +01:00
Laurent Pinchart
051fae4bec sh-pfc: Make struct pinmux_gpio enum_id field const
This ensures that the field is not modified, which is a prerequisite for
the rest of the PFC refactoring work.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:37 +01:00
Laurent Pinchart
380c2ed924 sh-pfc: Initialize pinmux_gpio flags statically
All function GPIO entries are initialized with the GPIO_FN macro that
expands to the PINMUX_GPIO macro, used to initialize real GPIOs. Create
a PINMUX_GPIO_FN macro that duplicates PINMUX_GPIO and sets flags to
PINMUX_TYPE_FUNCTION and use it in GPIO_FN, and make PINMUX_GPIO set
flags to PINMUX_TYPE_GPIO.

This removes the need to initialize GPIO flags at runtime and thus
simplifies the code, preparing for the GPIO and functions split.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:37 +01:00
Laurent Pinchart
53f374b134 sh-pfc: Remove unused sh_pfc_soc_info reserved_id field
The field is unused, remove it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:37 +01:00
Laurent Pinchart
caa5bac3b4 sh-pfc: Replace SoC info data and mark ranges with a number of pins
The data and mark ranges are only used to check whether a GPIO
corresponds to a real pin or a function. As pins come first in the list
of GPIOs and in the platform-specific GPIO enumerations, we can replace
the data and mark ranges by a number of pins.

Add an nr_pins field to struct sh_pfc_soc_info to store the number of
pins implemented by the SoC, remove the data and mark range fields and
introduce sh_pfc_gpio_is_pin() and sh_pfc_gpio_is_function() functions
to replace range-based checks.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:37 +01:00
Laurent Pinchart
d7a7ca5781 sh-pfc: Replace first_gpio and last_gpio with nr_gpios
The SoC information first_gpio field is always equal to 0, and the
last_gpio field is the index of the last entry in the pinmux_gpios
array. Replace the first_gpio and last_gpio fields by a nr_gpios field,
and initialize it to ARRAY_SIZE(pinmux_gpios).

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:36 +01:00
Laurent Pinchart
35ad42719e sh-pfc: Use GPIO_FN instead of PINMUX_GPIO where possible
The GPIO_FN macro expands to the PINMUX_GPIO macro. The regular
expression to 'unexpand' PINMUX_GPIO to GPIO_FN is

s/\tPINMUX_GPIO(GPIO_FN_\([A-Z0-9_]*\),[ \t]*\1_MARK)/\tGPIO_FN(\1)/

This consolidates SoC-specific PFC information to use the same macros
for all SoCs.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:36 +01:00
Laurent Pinchart
d785fdb5d8 sh-pfc: Don't take the sh_pfc spinlock in sh_pfc_map_gpios()
The sh_pfc_map_gpios() function is only called at initialization time
when no other task can access the sh_pfc fields. Don't protect the
operation with a spinlock.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:36 +01:00
Laurent Pinchart
e3e89ae43e sh-pfc: Drop the sh_pfc_pinctrl spinlock
The spinlock is used to protect data that is only accessed sequentially
during initialization. Remove it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:36 +01:00
Guennadi Liakhovetski
942785db87 sh-pfc: Fix a typo and simplify a definition on sh73a0
Fix definition of the SDHIWP0 function and simplify the CPU_ALL_PORT
definition on sh73a0.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:36 +01:00
Laurent Pinchart
dcc427e1a8 sh-pfc: Don't define the per-device pinctrl struct instances as global
The pinctrl_desc and pinctrl_gpio_range structures registered with the
pinctrl core are per-device instances. Move them to the dynamically
allocated sh_pfc_pinctrl structure and initialize them at runtime.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:36 +01:00
Laurent Pinchart
fe330ce8e1 sh-pfc: Declare operation structures as const
The pinconf, pinctrl and pinmux operation structures hold function
pointers that are never modified. Declare them as const.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15 13:33:35 +01:00
Simon Horman
47f4e0c1c8 Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl into pinmux-base 2013-03-15 07:16:28 +01:00
Ludovic Desroches
647f8d94a4 ARM: at91: add gpio suspend/resume support when using pinctrl
gpio suspend/resume and wakeup sources where not managed when using pinctrl so
it was impossible to wake up the system with a gpio.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-03-14 09:37:42 +01:00
Sachin Kamat
9cca117359 pinctrl: pinctrl-nomadik-stn8815: Fix checkpatch error
Fixes the following error:
ERROR: space required after that ',' (ctx:VxV)

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-13 19:50:20 +01:00
Haojian Zhuang
7cba5b3f5f pinctrl: single: correct argument for pinconf
pcs_pinconf_set() is always using "arg << shift" to configure two
parameters case. But pcs_add_conf2() didn't remove shift for config
argument. So correct it.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-13 19:50:19 +01:00
Sachin Kamat
bf4d7be57b pinctrl: generic: Fix compilation error
The function definition of pinconf_generic_dump_config is defined
under CONFIG_DEBUG_FS macro. Define the declaration too under this macro.

Without this patch we get the following build error:
drivers/built-in.o: In function `pcs_pinconf_config_dbg_show':
drivers/pinctrl/pinctrl-single.c:726: undefined reference to
`pinconf_generic_dump_config'

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-13 19:39:59 +01:00
Laurent Pinchart
53ded8191e pinctrl: Print the correct information in debugfs pinconf-state file
A bad copy&paste resulted in the debugfs pinconf-state file printing the
pin name instead of the state name. Fix it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-13 19:12:07 +01:00
Axel Lin
6a40cdd544 pinctrl: abx500: Fix checking if pin use AlternateFunction register
It's pointless to check "af.alt_bit1 == UNUSED" twice.
This looks like a copy-paste bug, I think what we want is to check if *both*
af.alt_bit1 and af.alt_bit2 are UNUSED.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-13 19:11:56 +01:00
Maxime Ripard
ee341a99de pinctrl: sunxi: Add Allwinner A13 pin functions
The initial driver contained only a limited set of pins functions
because we lacked of documentation on it.

Now that we have such documentation, finish to fill the array.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-07 09:05:14 +01:00
Maxime Ripard
b5f50bf923 pinctrl: sunxi: Add Allwinner A10 pin functions
The initial driver contained only a limited set of pins functions
because we lacked of documentation on it.

Now that we have such documentation, finish to fill the array.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-07 09:02:34 +01:00
Axel Lin
a7bbdd7f80 pinctrl: single: Fix build error
If pcs->is_pinconf is false, it means does not support pinconf.
If pcs->is_pinconf is true, is_generic flag is always true.

This patch fixes below build error:

  CC [M]  drivers/pinctrl/pinctrl-single.o
drivers/pinctrl/pinctrl-single.c: In function 'pcs_probe':
drivers/pinctrl/pinctrl-single.c:1441:3: error: assignment of member 'is_generic' in read-only object
make[2]: *** [drivers/pinctrl/pinctrl-single.o] Error 1
make[1]: *** [drivers/pinctrl] Error 2
make: *** [drivers] Error 2

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-07 05:27:31 +01:00
Haojian Zhuang
9dddb4df90 pinctrl: single: support generic pinconf
Support the operation of generic pinconf. The supported config arguments
are INPUT_SCHMITT, INPUT_SCHMITT_ENABLE, DRIVE_STRENGHT, BIAS_DISABLE,
BIAS_PULLUP, BIAS_PULLDOWN, SLEW_RATE.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-07 05:27:31 +01:00
Haojian Zhuang
477ac771dd pinctrl: single: set function mask as optional
Since Hisilicon's pin controller is divided into two parts. One is the
function mux, and the other is pin configuration. These two parts are
in the different memory regions. So make pinctrl-single,function-mask
as optional property. Then we can define pingroups without valid
function mux that is only used for pin configuration.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-07 05:27:31 +01:00
Haojian Zhuang
9cfd1724f0 pinctrl: generic: dump pin configuration
Add the support of dumping pin configuration.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-07 05:27:30 +01:00
Haojian Zhuang
a1a277eb76 pinctrl: single: create new gpio function range
Since gpio driver could create gpio range in DTS, it could invoke
pinctrl_request_gpio(). In the pinctrl-single driver, it needs to
configure pins with gpio function mode.

A new gpio function range should be created in DTS file in below.

pinctrl-single,gpio-range = <phandle pin_offset nr_pins gpio_func>;

range: gpio-range {
	#pinctrl-single,gpio-range-cells = <3>;
};

The gpio-ranges property is used in gpio driver and the
pinctrl-single,gpio-range property is used in pinctrl-single driver.

1. gpio-ranges is used for gpio driver in below.
   gpio-ranges = <phandle gpio_offset_in_chip pin_offset nr_pins>
	gpio-ranges = < &pmx0 0 89 1 &pmx0 1 89 1 &pmx0 2 90 1
			&pmx0 3 90 1 &pmx0 4 91 1 &pmx0 5 92 1>;

2. gpio driver could get pin offset from gpio-ranges property.
   pinctrl-single driver could get gpio function mode from gpio_func
   that is stored in @gpiofuncs list in struct pcs_device.
   This new pinctrl-single,gpio-range is used as complement for
   gpio-ranges property in gpio driver.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-07 05:27:30 +01:00
Haojian Zhuang
51e13c2475 pinctrl: check pinctrl ready for gpio range
pinctrl_get_device_gpio_range() only checks whether a certain GPIO pin
is in gpio range. But maybe some GPIO pins don't have back-end pinctrl
interface, it means that these pins are always configured as GPIO
function. For example, gpio159 isn't related to back-end pinctrl device
in Hi3620 while other GPIO pins are related to back-end pinctrl device.

Append pinctrl_ready_for_gpio_range() that is used to check whether
pinctrl device with GPIO range is ready. This function will be called
after pinctrl_get_device_gpio_range() fails.

If pinctrl device with GPIO range is found, it means that pinctrl device
is already launched and a certain GPIO pin just don't have back-end pinctrl
interface. Then pinctrl_request_gpio() shouldn't return -EPROBE_DEFER in
this case.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-07 05:27:30 +01:00
Axel Lin
e392971494 pinctrl: abx500: Add terminating entry for of_device_id table
The of_device_id table is supposed to be zero-terminated.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-07 05:27:29 +01:00
Laurent Pinchart
022ab148d2 pinctrl: Declare operation structures as const
The pinconf, pinctrl and pinmux operation structures hold function
pointers that are never modified. Declare them as const.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-07 05:27:29 +01:00
Jingoo Han
a72149e82b pinctrl: core: use devres_release() instead of devres_destroy()
devres_release() can simplify the code, because devres_release()
will call the destructor for the resource as well as freeing
the devres data.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-07 05:27:29 +01:00
Thomas Abraham
f67faf487f pinctrl: exynos: add exynos5250 SoC specific data
Add Samsung Exynos5250 SoC specific data to enable pinctrl support for
all platforms based on Exynos5250.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-03-05 20:59:12 +09:00
Linus Torvalds
a8f3740feb arm-soc: device tree conversions
These are device tree conversions for a number of platforms,
 with the intention of turning code from board files into
 device tree descriptions. Notable changes are:
 
 * davinci bindings for pinctrl, MTD, RTC, watchdog and i2c
 * nomadik bindings for all devices, removing the board files
 * bcm2835 bindings for mmc and i2c
 * tegra bindings for hdmi, keyboard, audio, as well as some updates
 * at91 bindings for hardware ecc and for devices on RM9200
 * mxs bindings for cfa100xx
 * sunxi support for Miniand Hackberry board
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Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device tree conversions from Arnd Bergmann:
 "These are device tree conversions for a number of platforms, with the
  intention of turning code from board files into device tree
  descriptions.  Notable changes are:

   - davinci bindings for pinctrl, MTD, RTC, watchdog and i2c

   - nomadik bindings for all devices, removing the board files

   - bcm2835 bindings for mmc and i2c

   - tegra bindings for hdmi, keyboard, audio, as well as some updates

   - at91 bindings for hardware ecc and for devices on RM9200

   - mxs bindings for cfa100xx

   - sunxi support for Miniand Hackberry board"

* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (72 commits)
  Revert "sunxi: a10-cubieboard: Add user LEDs to the device tree"
  Revert "sunxi: a13-olinuxino: Add user LED to the device tree"
  clk: tegra: initialise parent of uart clocks
  ARM: tegra: remove clock-frequency properties from serial nodes
  clk: tegra: fix driver to match DT binding
  clk: tegra: local arrays should be static
  clk: tegra: Add missing spinlock for hclk and pclk
  clk: tegra: Implement locking for super clock
  clk: tegra: fix wrong clock index between se to sata_cold
  sunxi: a13-olinuxino: Add user LED to the device tree
  ARM: davinci: da850 DT: add support for machine reboot
  ARM: davinci: da850: add wdt DT node
  ARM: davinci: da850: add DT node for I2C0
  ARM: at91: at91sam9n12: add DT parameters to enable PMECC
  ARM: at91: at91sam9x5: add DT parameters to enable PMECC
  ARM: at91: add EMAC bindings to RM9200 DT
  ARM: at91: add SSC bindings to RM9200 DT
  ARM: at91: add MMC bindings to RM9200 DT
  ARM: at91: Animeo IP: enable watchdog support
  ARM: nomadik: fix OF compilation regression
  ...
2013-02-21 15:38:49 -08:00
Linus Torvalds
7ae1c76ee5 arm-soc: pin muxing for sh-mobile
This is another cleanup series, containing the move of the Renesas
 SH-Mobile pin controller code from arch/arm/mach-shmobile over to the
 generic pinctrl subsystem, changing it over to the common interfaces in
 the process.
 
 Based on agreement between Olof, Paul Mundt, Linus Walleij and Simon,
 we're merging this large branch of pinctrl conversion through arm-soc,
 even though it contains the corresponding conversions for arch/sh. Main
 reason for this is tight dependencies (that will now mostly be broken)
 between the arch/sh and mach-shmobile implementations.
 
 There will be more of this in 3.10 to do device-tree bindings, but this
 is the initial conversion.
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Merge tag 'sh-pinmux' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull sh-mobile pinctrl conversion from Arnd Bergmann:
 "This is another cleanup series, containing the move of the Renesas
  SH-Mobile pin controller code from arch/arm/mach-shmobile over to the
  generic pinctrl subsystem, changing it over to the common interfaces
  in the process.

  Based on agreement between Olof, Paul Mundt, Linus Walleij and Simon,
  we're merging this large branch of pinctrl conversion through arm-soc,
  even though it contains the corresponding conversions for arch/sh.
  Main reason for this is tight dependencies (that will now mostly be
  broken) between the arch/sh and mach-shmobile implementations.

  There will be more of this in 3.10 to do device-tree bindings, but
  this is the initial conversion."

* tag 'sh-pinmux' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (81 commits)
  sh-pfc: sh_pfc_probe() sizeof() fix
  sh-pfc: Move sh_pfc.h from include/linux/ to driver directory
  sh-pfc: Remove pinmux_info definition
  sh: Remove unused sh_pfc_register_info() function
  sh: shx3: pinmux: Use driver-provided pinmux info
  sh: sh7786: pinmux: Use driver-provided pinmux info
  sh: sh7785: pinmux: Use driver-provided pinmux info
  sh: sh7757: pinmux: Use driver-provided pinmux info
  sh: sh7734: pinmux: Use driver-provided pinmux info
  sh: sh7724: pinmux: Use driver-provided pinmux info
  sh: sh7723: pinmux: Use driver-provided pinmux info
  sh: sh7722: pinmux: Use driver-provided pinmux info
  sh: sh7720: pinmux: Use driver-provided pinmux info
  sh: sh7269: pinmux: Use driver-provided pinmux info
  sh: sh7264: pinmux: Use driver-provided pinmux info
  sh: sh7203: pinmux: Use driver-provided pinmux info
  ARM: shmobile: sh73a0: Use driver-provided pinmux info
  ARM: shmobile: sh7372: Use driver-provided pinmux info
  ARM: shmobile: r8a7779: Use driver-provided pinmux info
  ARM: shmobile: r8a7740: Use driver-provided pinmux info
  ...
2013-02-21 15:00:16 -08:00
Linus Torvalds
b24174b0cb arm-soc: non-critical bug fixes
Bug fixes that did not make it into v3.8, mostly because they were not
 considered important enough, and in some cases because bugs only show
 up in combination with other patches destined for 3.9.
 This includes a few larger patches for GPIO on the Marvell PXA platform
 and a lot of Samsung specific bug fixes, as well as a series from Arnd
 to fix older build warnings.
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Merge tag 'fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull non-critical ARM SoC bug fixes from Arnd Bergmann:
 "Bug fixes that did not make it into v3.8, mostly because they were not
  considered important enough, and in some cases because bugs only show
  up in combination with other patches destined for 3.9.  This includes
  a few larger patches for GPIO on the Marvell PXA platform and a lot of
  Samsung specific bug fixes, as well as a series from Arnd to fix older
  build warnings."

* tag 'fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
  ARM: SPEAr13xx: Enable CONFIG_ARCH_HAS_CPUFREQ
  ARM: imx: MACH_MX31ADS_WM1133_EV1 needs REGULATOR_WM8350
  scripts/sortextable: silence script output
  ARM: s3c: i2c: add platform_device forward declaration
  ARM: mvebu: allow selecting mvebu without Armada XP
  ARM: pick Versatile by default for !MMU
  ARM: integrator: fix build with INTEGRATOR_AP off
  ARM: integrator/versatile: fix NOMMU warnings
  ARM: sa1100: don't warn about mach/ide.h
  ARM: shmobile: fix defconfig warning on CONFIG_USB
  ARM: w90x900: fix legacy assembly syntax
  ARM: samsung: fix assembly syntax for new gas
  ARM: disable virt_to_bus/virt_to_bus almost everywhere
  ARM: dts: Correct pin configuration of SD 4 for exynos4x12-pinctrl
  ARM: SAMSUNG: Silence empty switch warning in fimc-core.h
  ARM: SAMSUNG: Silence empty switch warning in sdhci.h
  ARM: msm: proc_comm_boot_wait should not be __init
  arm: vt8500: Update MAINTAINERS entry for arch-vt8500
  ARM: integrator: ensure ap_syscon_base is initialised when !CONFIG_MMU
  ARM: S5PV210: Fix early uart output in fifo mode
  ...
2013-02-21 14:54:55 -08:00
Linus Torvalds
06991c28f3 Driver core patches for 3.9-rc1
Here is the big driver core merge for 3.9-rc1
 
 There are two major series here, both of which touch lots of drivers all
 over the kernel, and will cause you some merge conflicts:
   - add a new function called devm_ioremap_resource() to properly be
     able to check return values.
   - remove CONFIG_EXPERIMENTAL
 
 If you need me to provide a merged tree to handle these resolutions,
 please let me know.
 
 Other than those patches, there's not much here, some minor fixes and
 updates.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'driver-core-3.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

Pull driver core patches from Greg Kroah-Hartman:
 "Here is the big driver core merge for 3.9-rc1

  There are two major series here, both of which touch lots of drivers
  all over the kernel, and will cause you some merge conflicts:

   - add a new function called devm_ioremap_resource() to properly be
     able to check return values.

   - remove CONFIG_EXPERIMENTAL

  Other than those patches, there's not much here, some minor fixes and
  updates"

Fix up trivial conflicts

* tag 'driver-core-3.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (221 commits)
  base: memory: fix soft/hard_offline_page permissions
  drivercore: Fix ordering between deferred_probe and exiting initcalls
  backlight: fix class_find_device() arguments
  TTY: mark tty_get_device call with the proper const values
  driver-core: constify data for class_find_device()
  firmware: Ignore abort check when no user-helper is used
  firmware: Reduce ifdef CONFIG_FW_LOADER_USER_HELPER
  firmware: Make user-mode helper optional
  firmware: Refactoring for splitting user-mode helper code
  Driver core: treat unregistered bus_types as having no devices
  watchdog: Convert to devm_ioremap_resource()
  thermal: Convert to devm_ioremap_resource()
  spi: Convert to devm_ioremap_resource()
  power: Convert to devm_ioremap_resource()
  mtd: Convert to devm_ioremap_resource()
  mmc: Convert to devm_ioremap_resource()
  mfd: Convert to devm_ioremap_resource()
  media: Convert to devm_ioremap_resource()
  iommu: Convert to devm_ioremap_resource()
  drm: Convert to devm_ioremap_resource()
  ...
2013-02-21 12:05:51 -08:00
Linus Torvalds
8a3a11f91d These are the main pinctrl changes for the v3.9 merge window:
- Grabbing of default pinctrl handles from the device core.
   These are the hunks hitting drivers/base. All is ACKed by
   Greg, after a long discussion about different alternatives.
 
 - Some stuff also touches the MFD and ARM SoC trees, this has
   been coordinated and ACKed.
 
 - New drivers for:
 
   - The Tegra 114 sub-SoC
   - Allwinner sunxi
   - New ABx500 driver and sub-SoC drivers for AB8500,
     AB8505, AB9540 and AB8540.
 
 - Make it possible for hogged pins to enter a sleep mode,
   and make it possible for drivers to control that mode.
 
 - Various clean-up, extensions and device tree support to
   various pin controllers.
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Merge tag 'pinctrl-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pinctrl changes from Linus Walleij:
 "These are the main pinctrl changes for the v3.9 merge window.  The
  most interesting change by far is how the device core grabs pinctrl
  default handles avoiding the need to stick boilerplate into driver
  consumers.

   - Grabbing of default pinctrl handles from the device core.  These
     are the hunks hitting drivers/base.  All is ACKed by Greg, after a
     long discussion about different alternatives.

   - Some stuff also touches the MFD and ARM SoC trees, this has been
     coordinated and ACKed.

   - New drivers for:
     - The Tegra 114 sub-SoC
     - Allwinner sunxi
     - New ABx500 driver and sub-SoC drivers for AB8500, AB8505, AB9540
       and AB8540.

   - Make it possible for hogged pins to enter a sleep mode, and make it
     possible for drivers to control that mode.

   - Various clean-up, extensions and device tree support to various pin
     controllers."

* tag 'pinctrl-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (68 commits)
  pinctrl: tegra: add clfvs function to Tegra114 support
  pinctrl: generic: rename input schmitt disable
  pinctrl/pinconfig: add debug interface
  pinctrl: samsung: remove duplicated line
  ARM: ux500: use real AB8500 IRQ numbers instead of virtual ones
  ARM: ux500: remove irq_base property from platform_data
  pinctrl/abx500: use direct IRQ defines
  pinctrl/abx500: replace IRQ offsets with table read-in values
  pinctrl/abx500: move IRQ handling to ab8500-core
  pinctrl: exynos5440: remove erroneous __init
  pinctrl/abx500: adjust offset for get_mode()
  pinctrl/abx500: add Device Tree support
  pinctrl/abx500: align GPIO cluster boundaries
  pinctrl/abx500: prevent error path from corrupting returning error
  pinctrl: sunxi: add of_xlate function
  pinctrl/lantiq: fix pin number in ltq_pmx_gpio_request_enable
  pinctrl/lantiq: add functionality to falcon_pinconf_dbg_show
  pinctrl/lantiq: fix pinconfig parameters
  pinctrl/lantiq: one of the boot leds was defined incorrectly
  pinctrl/lantiq: only probe available pad controllers
  ...
2013-02-20 09:23:30 -08:00
Magnus Damm
8c43fcc780 sh-pfc: sh_pfc_probe() sizeof() fix
Fix sizeof() usage in sh-pfc/core.c to allocate space
for the full data structure instead of a pointer.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-02-16 10:58:50 +09:00
Rhyland Klein
ade158eb53 pinctrl: tegra: add clfvs function to Tegra114 support
This patch adds the definition for the cldvfs function for Tegra114 pinctrl
support. This is based on work by Pritesh Raithatha.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-15 20:22:39 +01:00
Haojian Zhuang
ea27c39617 pinctrl: generic: rename input schmitt disable
Rename PIN_CONFIG_INPUT_SCHMITT_DISABLE to
PIN_CONFIG_INPUT_SCHMITT_ENABLE. It's used to make it more generialize.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-15 09:52:29 +01:00
Olof Johansson
cae617b64c Merge branch 'fixes-for-3.9' into next/fixes-non-critical
This is a branch of fixes that originally were scheduled for 3.8 but
due to the request from Linus to hold back on all but the most critical
of fixes, we're re-queueing them for 3.9 here.

* fixes-for-3.9:
  ARM: dts: imx6: fix fec ptp clock slow 10 time
  ARM: highbank: mask cluster id from cpu_logical_map
  ARM: scu: mask cluster id from cpu_logical_map
  ARM: scu: add empty scu_enable for !CONFIG_SMP
  ARM: at91/at91sam9x5.dtsi: fix usart3 TXD
  ARM: at91: at91sam9x5: fix usart3 pinctrl name
  ARM: EXYNOS: Fix crash on soft reset on EXYNOS5440
  ARM: dts: fix tick and alarm irq numbers for exynos5440
  ARM: dts: fix compatible value for exynos pinctrl
  ARM: dts: Fix compatible value of pinctrl module on EXYNOS5440
  ARM: S3C24XX: fix uninitialized variable warning
  mfd/vexpress: vexpress_sysreg_setup must not be __init
  ARM: ux500: Fix u9540 booting issues
  arm: mvebu: i2c come back in defconfig
  arm: plat-orion: fix printing of "MPP config unavailable on this hardware"
  Dove: activate GPIO interrupts in DT
  ARM: ux500: add spin_unlock(&master_lock).
  ARM: ux500: Disable Power Supply and Battery Management by default

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-02-12 15:03:55 -08:00
Laurent Meunier
6f9e41f4e6 pinctrl/pinconfig: add debug interface
This update adds a debugfs interface to modify a pin configuration
for a given state in the pinctrl map. This allows to modify the
configuration for a non-active state, typically sleep state.
This configuration is not applied right away, but only when the state
will be entered.

This solution is mandated for us by HW validation: in order
to test and verify several pin configurations during sleep without
recompiling the software.

Signed-off-by: Laurent Meunier <laurent.meunier@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-10 21:11:54 +01:00
Jingoo Han
007cd69433 pinctrl: samsung: remove duplicated line
This patch removes duplicated line of samsung_pinctrl_register(),
because the number of pins is redundantly assigned twice.

Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-10 20:16:36 +01:00
Linus Walleij
43a255dba1 pinctrl/abx500: use direct IRQ defines
Make it harder to do mistakes by introducing the actual
defined ABx500 IRQ number into the IRQ cluster definitions.
Deduct cluster offset from the GPIO offset to make each
cluster coherent.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-10 15:48:43 +01:00
Lee Jones
a6a16d274e pinctrl/abx500: replace IRQ offsets with table read-in values
The ABx500 GPIO controller used to provide a set of virtual contiguous
IRQs for use by sub-devices, but they have been removed after a request
from Mainline Maintainers. Now the AB8500 core driver deals with almost
all IRQ related issues instead.

The ABx500 GPIO driver is now only used to convert between GPIO and IRQ
numbers which is actually quite difficult, as the ABx500 GPIO's
associated IRQs are clustered together throughout the interrupt number
space at irregular intervals. To solve this quandary, we have placed the
read-in values into the existing cluster information table to use during
conversion.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Moved irq_base removal into this patch]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-10 15:44:33 +01:00
Lee Jones
ac652d7941 pinctrl/abx500: move IRQ handling to ab8500-core
In its current state the gpio-ab8500 driver looks after some GPIO
lines found on the AB8500 MFD chip. It also controls all of its
own IRQ handling for these GPIOs by inventing some virtual IRQs
and handing those out to sub-devices. There has been quite a bit
of controversy over this and it was a contributing factor to the
driver being marked as BROKEN in Mainline.

The reason for adopting this method was due to added complexity
in the hardware. Unusually, each GPIO has two separate IRQs
associated with it, one for a rising and a different one for a
falling interrupt. Using this method complicates matters further
because the GPIO IRQs are actually sandwiched between a bunch
of IRQs which are handled solely by the AB8500 core driver.

The best way for us to take this forward is to get rid of the
virtual IRQs and only hand out the rising IRQ lines. If a
sub-driver wishes to request a falling interrupt, they can do
so by requesting a rising line in the normal way. They just
have to add IRQ_TYPE_EDGE_FALLING or IRQ_TYPE_EDGE_BOTH, if
they require both in the flags. Then if a falling IRQ is
triggered, the AB8500 core driver will know how to handle the
added complexity accordingly. This should greatly simply things.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Augment to keep irq_base for a while (removed later)]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-10 15:14:13 +01:00
Linus Walleij
7ac63ac61d Merge branch 'allwinner-sunxi' into devel 2013-02-08 14:26:49 +01:00
Linus Walleij
879029c701 pinctrl: exynos5440: remove erroneous __init
This removes the __init notation from some of the
the exynos 5440 pin controller set-up functions. These
functions are called from probe() and as such may be
discarded before probe() completes.

Cc: Thomas Abraham <thomas.abraham@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-07 19:43:20 +01:00
Linus Walleij
a950cb741b pinctrl/abx500: adjust offset for get_mode()
The set_mode() and get_mode() functions in the abx500 were
not mirrored, leading to the wrong GPIO control bits being
read out.

Cc: Lee Jones <lee.jones@linaro.org>
Reported-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-07 17:26:53 +01:00
Lee Jones
f30a3839b3 pinctrl/abx500: add Device Tree support
This patch will allow the ABX500 Pinctrl driver to be probed when
Device Tree is enabled with an appropriate node contained.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-06 22:38:48 +01:00
Lee Jones
b9fab6e45d pinctrl/abx500: align GPIO cluster boundaries
Not quite sure how this ever worked. In ab8500_gpio_to_irq() the
GPIO for conversion is passed through as the second argument. If
GPIO13, which is a valid GPIO for IRQ functionality, was received;
it would be rejected by the following guard:

    GPIO_IRQ_CLUSTER(5, 12, 0); /* GPIO numbers start from 1 */

    if (offset >= cluster->start && offset <= cluster->end)
        /* Valid GPIO for IRQ use */

Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Augmented to account for off-by-one problem]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-06 22:38:40 +01:00
Lee Jones
fa1ec996ac pinctrl/abx500: prevent error path from corrupting returning error
Prior to this patch abx500_gpio_probe() would return the return-value
of gpiochip_remove() during its error patch regardless of what the
actual failure was. So as long as gpiochip_remove() succeeded, probe()
would look like it succeeded too.

This patch ensures the correct error value is returned and that
mutex_destroy() is invoked if gpiochip_add_pin_range() were to fail.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-06 22:38:31 +01:00
Maxime Ripard
a0d72094f0 pinctrl: sunxi: add of_xlate function
Since the pin controller of sunxi chips is represented as a
single bank in the driver.

Since this is neither convenient nor represented that way in the
datasheets, define a custom of_xlate function with the layout
<bank pin flag>

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 17:32:29 +01:00
John Crispin
d8a7c1f134 pinctrl/lantiq: fix pin number in ltq_pmx_gpio_request_enable
The mapping logic inside ltq_pmx_gpio_request_enable() was
broken. This only effected Falcon SoC.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:26 +01:00
John Crispin
c58bdc36bc pinctrl/lantiq: add functionality to falcon_pinconf_dbg_show
The current code only has a stub for falcon_pinconf_dbg_show.
This patch adds proper functionality.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:25 +01:00
John Crispin
77ef406272 pinctrl/lantiq: fix pinconfig parameters
The Falcon driver only defined the pinconf parameters but
did not pass them properly to the underlying api.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:25 +01:00
John Crispin
41228b7b33 pinctrl/lantiq: one of the boot leds was defined incorrectly
On the Falcon SoC the bootleds are located on pins 9->14.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:24 +01:00
John Crispin
a8ae367f40 pinctrl/lantiq: only probe available pad controllers
The template falcon.dtsi lists all 6 pad controllers that
can be loaded. Only probe those that have status = "okay";
inside the dts file.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:24 +01:00
John Crispin
9338628737 pinctrl/lantiq: the pinconf OD parameter argument was ignored
When setting the OpenDrain bit we should really honour the
argument passed inside the devicetree.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:23 +01:00
John Crispin
6360350cbc pinctrl/lantiq: add output pinconf parameter
While converting the boards inside OpenWrt to OF I noticed
that the we are missing a pinconf parameter to set a pin
to output.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:22 +01:00
John Crispin
3a6b04ca33 pinctrl/lantiq: add pin_config_group_set support
While converting all the boards supported by OpenWrt to OF
I noticed that this feature is missing. Adding it makes the
devicetrees more readable.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:22 +01:00
John Crispin
7541083fc4 pinctrl/lantiq: faulty bit inversion
The logic of the OD bit was inverted when calling the
pinconf get method.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:21 +01:00
John Crispin
362ba3cfb4 pinctrl/lantiq: pinconf uses port instead of pin
The XWAY pinctrl driver invalidly uses the port and not the pin
number to work out the registers and bits to be set for the
opendrain and pullup/down resistors.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 16:17:21 +01:00
Barry Song
228f1ce9b8 pinctrl: sirf: replace of_gpio_simple_xlate by sirf specific of_xlate
the default of_gpio_simple_xlate() will make us fail while getting gpios
bigger than 32 by of_get_named_gpio() or related APIs.
this patch adds a specific of_xlate callback for sirf gpio_chip and fix
the problem.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 15:27:39 +01:00
Kukjin Kim
a1ed26703e pinctrl: exynos: change PINCTRL_EXYNOS option
Since pinctrl-exynos can support exynos4 and exynos5 so changed
the option name to PINCTRL_EXYNOS for more clarity.

Cc: Thomas Abraham <Thomas.abraham@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 15:27:39 +01:00
Lee Jones
d41e35c364 pinctrl/abx500: destroy mutex if returning early due to error
Current failure path neglects to mutex_destroy() before returning
an error due to an invalid parameter or an error received from
gpiochip_add(). This patch aims to remedy that behaviour.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 13:54:24 +01:00
Lee Jones
83b423c885 pinctrl/abx500: beautify the ABX500 pin control driver
This patch provides some superficial changes to the driver to
aid with readability and maintainability. We're mostly fixing
things like white-space errors, spreading out code which as
been clumped together impeding readability and comment layout,
such as using the new "/**" comment start for function headers
etc. No code semantics were harmed in the making of this patch.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 13:54:23 +01:00
Lee Jones
1abeebeaa5 pinctrl/abx500: replace incorrect return value
Currently in the empty abx500_pin_config_get() function, we're
returning -EINVAL, with a comment stating that the reason for the
failure is that the function isn't implemented yet. Well there's
a proper return code for that. If we use it, we can do away with
the comment too, as it would be implied.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 13:54:22 +01:00
Lee Jones
49dcf086e4 pinctrl/abx500: use the BIT() macro where appropriate
The BIT() macro provides a simple and easy to read way of
obtaining bit offsets into things like masks and hardware
registers. In this patch we're simply replacing all
instances of '1 << x' with 'bit(x)'.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 13:54:22 +01:00
Patrice Chotard
a8f96e4178 pinctrl/abx500: add AB8540 sub-driver
Add AB8540 sub driver to the ABx500 family, pins, pin groups and
gpio range.

As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 13:54:21 +01:00
Patrice Chotard
09dbec3f74 pinctrl/abx500: add AB9540 sub-driver
Add AB9540 sub driver to the ABx500 family, pins, pin groups and
gpio range.

As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 13:54:20 +01:00
Patrice Chotard
1aa2d8d405 pinctrl/abx500: add AB8505 sub-driver
Add AB8505 sub driver to the ABx5x family.

As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-05 13:54:19 +01:00
Olof Johansson
604d11d991 Linux 3.8-rc6
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Merge tag 'v3.8-rc6' into next/dt

Linux 3.8-rc6
2013-02-04 22:59:22 -08:00
Maxime Ripard
9f5b6b30f9 ARM: pinctrl: sunxi: Add the pinctrl pin set for Allwinner A10
Since the Allwinner SoCs variants don't have the same set of pins to
handle, we need to declare the pin ranges available.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-01 10:45:34 +01:00
Maxime Ripard
ae1575f711 pinctrl: sunxi: Document sun5i pins functions
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-01 10:44:21 +01:00
Patrice Chotard
3c93799378 pinctrl/abx500: add AB8500 sub-driver
This adds a subdriver for the AB8500 pinctrl portions.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.

Acked-by: Olof Johansson <olof@lixom.net>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-30 20:42:40 +01:00
Patrice Chotard
0493e64930 pinctrl: add abx500 pinctrl driver core
This adds the AB8500 core driver, which will be utilized by
the follow-on drivers for different ABx500 variants.
Sselect the driver from the DBX500_SOC, as this chip is
powering and clocking that SoC.

Cc: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-30 20:42:14 +01:00
Sachin Kamat
2917e8338c pinctrl: core: Make pinctrl_release static
'pinctrl_release' is used only in this file. Hence make it static.

Without this patch we get the following sparse error:
drivers/pinctrl/core.c:815:6: warning:
symbol 'pinctrl_release' was not declared. Should it be static?

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-30 11:00:58 +01:00
Maxime Ripard
08e9e614ca ARM: sunxi: gpio: Add Allwinner SoCs GPIO drivers
The IP responsible for the muxing on the Allwinner SoCs are also
handling the GPIOs on the system. This patch adds the needed driver that
relies on the pinctrl driver for most of its operations.

The number of pins available for GPIOs operations are already declared
in the pinctrl driver, we only need to probe a generic driver to handle
the banks available for each SoC.

This driver has been tested on a A13-Olinuxino.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-29 23:37:16 +01:00
Arnd Bergmann
0fafd50e4b pinctrl: nomadik: nmk_prcm_gpiocr_get_mode may be unused
nmk_prcm_gpiocr_get_mode is only needed for debugfs output at
the moment, which can be compile-time disabled. Marking
the function __maybe_unused still gives us compile-time
coverage, but avoids a gcc warning.

Without this patch, building nhk8815_defconfig results in:

drivers/pinctrl/pinctrl-nomadik.c:676:12: warning: 'nmk_prcm_gpiocr_get_mode' defined but not used [-Wunused-function]

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Jean-Nicolas Graux <jean-nicolas.graux@stericsson.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-29 23:10:30 +01:00
Arnd Bergmann
312b00e510 pinctrl: exynos: don't mark probing functions as __init
Functions called from a driver probe() method must not be
marked __init, because they may get called after the
init phase is done, when the device shows up late, or
because of deferred probing.

Without this patch, building exynos_defconfig results in
multiple warnings like:

WARNING: drivers/pinctrl/built-in.o(.text+0x51bc): Section mismatch in reference from the function exynos5440_pinctrl_probe() to the function .init.text:exynos5440_gpiolib_register()
The function exynos5440_pinctrl_probe() references
the function __init exynos5440_gpiolib_register().
This is often because exynos5440_pinctrl_probe lacks a __init
annotation or the annotation of exynos5440_gpiolib_register is wrong.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-29 23:10:11 +01:00
Kukjin Kim
b533c8685b ARM: dts: fix compatible value for exynos pinctrl
Fix the incorrect compatible property value of pinctrl for EXYNOS4 SoCs.

Cc: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-01-28 14:27:50 -08:00
Linus Walleij
6010d40320 ARM: nomadik: move GPIO and pinctrl to device tree
This moves the instances of the Nomadik pin controller and the
Nomadik GPIO blocks (also handled by the GPIO driver) over to
the device tree. A new compatible string is added to the
pin control driver in the process.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-28 23:24:39 +01:00
Laurent Pinchart
c3323806a6 sh-pfc: Move sh_pfc.h from include/linux/ to driver directory
The header file isn't used by arch code anymore. Make it private to the
driver.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-01-25 09:24:31 +09:00
Laurent Pinchart
d5d9a818b8 sh-pfc: Add shx3 pinmux support
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-01-25 09:24:28 +09:00
Laurent Pinchart
d2a31bddbd sh-pfc: Add sh7786 pinmux support
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-01-25 09:24:28 +09:00
Laurent Pinchart
a56398e969 sh-pfc: Add sh7785 pinmux support
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-01-25 09:24:28 +09:00
Laurent Pinchart
0bb92677ab sh-pfc: Add sh7757 pinmux support
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-01-25 09:24:28 +09:00
Laurent Pinchart
ac1ebc2190 sh-pfc: Add sh7734 pinmux support
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-01-25 09:24:27 +09:00
Laurent Pinchart
0ff25baba0 sh-pfc: Add sh7724 pinmux support
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-01-25 09:24:27 +09:00
Laurent Pinchart
d05afa0afc sh-pfc: Add sh7723 pinmux support
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-01-25 09:24:27 +09:00
Laurent Pinchart
f5e25ae52f sh-pfc: Add sh7722 pinmux support
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-01-25 09:24:27 +09:00