Hello Arnd, Kevin, Olof,
This is a very quiet release, featuring a small cleanup, a tosa change
on its charger driver, and support for pxa device-tree based pxa27x
boards.
The device-tree part will only be fully activated once clocks support
is fully operation in the common clock framework.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUbR+1AAoJEAP2et0duMsSscgP/35kcEKXy1mVn7Tvf+bBrcCH
bFQrJafPI6TJ/XI62XmUZ88q8s8uCrzNsvLQOuG4He2caewboAeSjlD1hpDGM7kS
jckDWsKXa4F6VXfabzkEOVisP5gXnmtckGSeYAXtLQP2U9BzU5NECb3tcT7CW9gy
C0UhLM741Os95EeArzRfQORAvFVFyKbrC+Y7kQKLaW6Wxr5n8IunoZVThNjJWgIn
OBbBwGDwyX9oSp28hPcTRbkgzSsdHk7ch21OQgK8EbRCGQ4IHPB7TJ2FmSMu0cg9
3Iv2sGadnQnLfUczFbdCCu2mKbM1g8z/SfiLP6E3DL/5pvlpeEAxiTMsCNrJ/pOb
sP7eyNdiG3hgPPXgOoAp/b6OUh49cZS/3SGKvA1Ao8nkQO3pPvFEo55mGFc8h5TA
e9h0QUbL1ITJFcEBoWUlLxxhw8cE9BSuEQXUzyHpwhf/YKcVH4UUVQiSHjaxcHl5
a60nvyZ8IXXBgnVXaKDS07vw1ztg7+CQfvCOs/hMcAy6Y5DhBt0CvKTTUTrpRGa3
uHbVHVZ6G7mWoKoR8BmqFGgo1y1SX41MGslsnXsYqeIqYT+SLTsokaUOVVM+KA7k
pQ4xqobAICF57KuZ09MOkw32f9ShNuO5lS3/DDKSvDfs9liLHUqfP2AlhFvXYcXb
VSnVb1BjO1S2aKN0NdPN
=Kpce
-----END PGP SIGNATURE-----
Merge tag 'pxa-for-3.19' of https://github.com/rjarzmik/linux into next/soc
Pull "arm: pxa: pxa for v3.19" from Robert Jarzmik:
This is a very quiet release, featuring a small cleanup, a tosa change
on its charger driver, and support for pxa device-tree based pxa27x
boards.
The device-tree part will only be fully activated once clocks support
is fully operation in the common clock framework.
* tag 'pxa-for-3.19' of https://github.com/rjarzmik/linux:
arm: pxa: add pxa27x device-tree support
arm: pxa: remove unnecessary includes from pxa-dt
arm: pxa: move init functions into generic.h
arm: pxa: add device-tree irq init for pxa27x
ARM: pxa: tosa: switch to gpio-charger
arm: mach-pxa: Convert pr_warning to pr_warn
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
"dss_fck" is a hacky clock, used to work around problems with MODULEMODE
bit handling in DSS hwmods.
These problems have now been solved, so we can remove the dss_fck clock.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
RFBI iclk was set to point to hacky "dss_fck", which will be removed.
Instead use "l3_div_ck", which is the proper clock for this. "l3_div_ck"
is the parent of "dss_fck", so the clock rate is the same as previously.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Instead of using a hacky "dss_fck" clock (which toggles the MODULEMODE
bit) as DSS L3 interface clock, set the .modulemode field in the
omap44xx_dss_hwmod. This works now that the DSS core hwmod is enabled
during DSS submodule resets.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Set DSS core hwmod as the parent for all the DSS submodules.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Set DSS core hwmod as the parent for all the DSS submodules.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add a device-tree machine entry (DT_MACHINE_START) for pxa27x based
platforms.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Arnd Bergmann <arnd@arndb.de>
As the init functions necessary for machine init have moved to
generic.h, remove the unnecessary includes and prototypes definitions
from pxa-dt.c.
This removes the include of mach/pxaXXX-regs.h, and make pxa-dt generic
enough to accept other pxa variants.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Arnd Bergmann <arnd@arndb.de>
In order to have a unique .c file for all pxa variants device-tree
definitions, all the initialization functions for MACHINE_START and
DT_MACHINE_START have been put together into generic.h.
The alternative would have been one pxaXXX-dt.c file per variant.
The move is necessary because each include/mach/pxaXXX.h includes the
variant register descriptions which intersects and conflicts one with
each other.
The change is a preparation for pxa-dt.c to support multiple pxa,
ie. pxa3xx and pxa27x.
The machine files including mach/pxaXXX.h all include generic.h, which
guarantees no regression should be introduced.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Add the initializer for irqs in a device-tree machine on a pxa27x.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Switch to simpler gpio-charger module. PDA power requires additional
setup in platform file and is more suited for boards with separate AC
and USB charging inputs. Tosa has a unified input, so it's better suited
for gpio-charger.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Use the more common pr_warn.
Other miscellanea:
o Coalesce formats
o Realign arguments
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Add parent_hwmod pointer to omap_hwmod. This can be set to point to a
"parent" hwmod that needs to be enabled for the "child" hwmod to work.
This is used at hwmod setup time: when doing the initial setup and
reset, first enable the parent hwmod, and after setup and reset is done,
restore the parent hwmod to postsetup_state.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
[paul@pwsan.com: add kerneldoc documentation for parent_hwmod; note that it
is a temporary workaround]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
* Enable PCI domains for R-Car Gen2 devices
* Make APMU resource code SoC-specific
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUZAXRAAoJENfPZGlqN0++qlgQAIne34JegIo6zR6IHUyHzvNK
QqXeFTQvWyUX5jCVsn79gL7gwOuOoSwDqvrdGOla/LH4zayfG/kloFowxoO6qcdl
UGKKTJMWgh4BKMusIskjoDShqGDIbyPRMcs+SdmU0+qrGZh9gYfifUZqopQ2+FpL
2vvPA0vR5J7kfT5Vg8sUkYdbPoivcnL76D5nZonsEcIn0wKEyTL9AY0b5uNMJIxc
em1zBtt5zICwA5iiJKe7Q59z1st5Z/LDWFQP24uquKZwfShawMddm9kPfLqHlSnr
SD9qzAaBPar30R+QDfQH7pC4q3MlALAqAmIWIgaBDLubkJwd5N5yTAgQ7Uw4uqH6
8mwfYY4cnyD9R5CTVUYVn/pY1+QYjjXoYHWlgJkhhsnC8iwYd/FLcXhy793Kk0ac
b2UusUO/zEILVh2wZT2ki50LIURM7dW0CUhl5Gt4G8c+zMQ8FwtZi33eW9Gpf+1k
xWPvKMt5rIi0YyI19mxlhdAp2GF2yWR7uycb4FeN/z/ce5GOAaDOWt1Gtib3YjM9
EQxGFPCWhrTJ/vfufYr4tfPLJeedQ8XpFIKL9ACvIY67zOst5nEkE9g6Lyt23ByU
NbwQSHV8dpIWGkmps4QazDyy2vwQTrUxa0XPU2JcAxO50UjiHGlK6WOKAn610StU
xji8z2cdEbNZ5zV/1tfs
=g7rn
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Second Round of Renesas ARM Based SoC Soc Updates for v3.19" from Simon Horman:
* Enable PCI domains for R-Car Gen2 devices
* Make APMU resource code SoC-specific
* tag 'renesas-soc2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Enable PCI domains for R-Car Gen2 devices
ARM: shmobile: r8a7791: Correct number of CPU cores
ARM: shmobile: Separate APMU resource data into CPU dependant part
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Select CONFIG_ZONE_DMA when CONFIG_ARM_LPAE is enabled
* Add CA7 arch_timer initialization for r8a7794
* Handle CA7 arch timer delay
* Add shmobile_init_late() to sh7372
- This is consistent with other shmobile SoCs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUWBX0AAoJENfPZGlqN0++oZoP/1BV0Lzhol3eQ/RlqG9maNCO
iR2tAdfeScxwqD+VE8pHJQIoyYF8sfKKEaJxsyPl2KP1BzzBXGkNnsp35vNPG8p7
32AY27+98R7AqJ2ajKAqqdc7ooZLam1BW7kv99XmSKx/9n4Y1RKXaXVweRmxh3d5
dBaKGVX8ixl7yDZ7prsQqECzh7XN1/rhPXP50nq0aZtR0CRgAPzHyGGooc7s3zIz
7enlXev2u178I0YH9kujBbB/pjWCxrygKsB7gWp+t/klb9R0MWmVoB8/ae5rFRbq
E+ULTVJ2G0cnhCTncu7N65/N69rmrbCGaGLBzKqV4Ve3qXImr0L6AqGmAGPMlqJT
V+C44tGCjTJ7rc2gwv3Y6EPi/BQmEGRAGUp6GLBC0wexQdP6GRa7HrxsiRPuXrF6
OTG42oGqslMNemF0yZjzJU/SDutLYqYHhbqzl8akGr+PpB58ybjplM0mAyae/pp6
JTDYqCvlowsXN3FWgSZOIZ8UFM58UElGt9DBGCyEypTUADAFqD0SiUU7QCRFGKaj
VhfgQ/gzwmKG19C1DgLTZv+8fzR/lvwBBtjwlP0io4Rd52rUGtmxcvH/0KV8INXq
GsI9mEb6B4ZUFhG0Dgkna1XM9227PIQr126K/PDPjQPNHxVoVMQUuo9DrFNmXMt7
XEhA8eE9kxnf73DQEPB7
=bG2T
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC Soc Updates for v3.19" from Simon Horman:
* Select CONFIG_ZONE_DMA when CONFIG_ARM_LPAE is enabled
* Add CA7 arch_timer initialization for r8a7794
* Handle CA7 arch timer delay
* Add shmobile_init_late() to sh7372
- This is consistent with other shmobile SoCs
* tag 'renesas-soc-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Select CONFIG_ZONE_DMA when CONFIG_ARM_LPAE is enabled
ARM: shmobile: rcar-gen2: Add CA7 arch_timer initialization for r8a7794
ARM: shmobile: sh7372: Add shmobile_init_late()
ARM: shmobile: Handle CA7 arch timer delay
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
RESET_CONTROLLER is meant to be user-selectable. To respect that,
do not select it automatically when using ARCH_BERLIN.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Select CLKSRC_MMIO when the meson6_timer driver is enabled since it
depends on clocksource MMIO functions.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Carlo Caione <carlo@caione.org>
This enables the L2 cache controller available in Amlogic SoCs.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
Add a MACH_MESON8 symbol and add "amlogic,meson8" to the list of
compatible strings for the Meson DT machine to support devices based
on the Meson8 family of SoCs.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
Add serial port debug macros for the SCIF(A) serial ports.
This includes all supported shmobile SoCs, except for EMEV2.
The configuration logic (both Kconfig and #ifdef) is more complicated than
one would expect, for several reasons:
1. Not all SoCs have the same serial devices, and they're not always
at the same addresses.
2. There are two different types: SCIF and SCIFA. Fortunately they can
easily be distinguished by physical address.
3. Not all boards use the same serial port for the console.
The defaults correspond to the boards that are supported in
mainline. If you want to use a different serial port, just change
the value of CONFIG_DEBUG_UART_PHYS, and the rest will auto-adapt.
4. debug_ll_io_init() maps the SCIF(A) registers to a fixed virtual
address. 0xfdxxxxxx was chosen, as it should lie below VMALLOC_END
= 0xff000000, and must not conflict with the 2 MiB reserved region
at PCI_IO_VIRT_BASE = 0xfee00000.
- On SoCs not using the legacy machine_desc.map_io(),
debug_ll_io_init() is called by the ARM core code.
- On SoCs using the legacy machine_desc.map_io(),
debug_ll_io_init() must be called explicitly. Calls are added
for r8a7740, r8a7779, sh7372, and sh73a0.
This was derived from the r8a7790 version by Laurent Pinchart.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The sun6i SMP ops are currently not marked as static, as reported by
sparse. Let's mark it as such.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Most of the patches are clock-related. The DPLL implementation is
changed to better align to the common clock framework.
There is also a patch that removes a few lines from the hwmod code -
this patch should have no functional effect.
Basic build, boot, and PM test logs for these patches can be found here:
http://www.pwsan.com/omap/testlogs/omap-a-for-v3.19/20141113094101/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUZTTPAAoJEMePsQ0LvSpLe1UP/1LphSxqomh57oi2VEN0ggon
9NJacfdwfu5Ic9PHtJzHMUC6CUs/SWBuQFbfdO0pWrUnhtvQLx1fjTz6m+2FftjO
2n/vp9Rs1sIHXXBfKuve6NFK2sDmwO3fnCqIXXuolGSQexO4QtOoYH6tPBFZxYMR
FogReNBbq5rbIrpU75Rc9F1ALKRQIXThznVs3A0lpVpoky1PalcZOe957IEhvjsk
jyLzY/PnuB3W9z5efTyOoCpljJSpHypp6a+/1u0QiQcBT9KAVJs6XqDwTt0o4ben
CeBHU3FNgIsbehB6NDo9Zkj34qIEVcJJWzW0tTrXWrds+qBTIL2VrkzvEq3YAH1x
R31hX6jEyknAySAyx5BJX8UddITx7WCf/mU7nZJhs7byGIthMKGmFVzcYbwkMLoP
LK+JW+5eT2vNxE62ixv1A4g1AXmodQIGKpBgzeZ/6aBRbEQZdZ3LJBRkbfa65mpJ
LM5ud4R4cx1eTx+B7KzZ055WPQtn7Pkok+AxiwgtqGHHcK/V+uDor105umaaaPtL
YeU1qM0tsUHJjg85tq7pO18ch7LY9GeWVSX5CLQiIwDlrTMQADiA0Cn5w0mR1pWw
5RFU5cbaTl4FoDjcPDaf8nyXE54MFOoQWNr1bA3ApZFdSZ7STBDS1yBjiV/ao+29
XIcHnETIXipHt0lqgf/2
=tw+W
-----END PGP SIGNATURE-----
Merge tag 'for-v3.19/omap-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.19/soc
Some OMAP clock/hwmod patches for v3.19.
Most of the patches are clock-related. The DPLL implementation is
changed to better align to the common clock framework.
There is also a patch that removes a few lines from the hwmod code -
this patch should have no functional effect.
Basic build, boot, and PM test logs for these patches can be found here:
http://www.pwsan.com/omap/testlogs/omap-a-for-v3.19/20141113094101/
We support more MediaTek SoCs now, update the description.
Signed-off-by: Joe.C <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
ml->node and sl->node are currently initialized
by means of INIT_LIST_HEAD(). That initialiation
is followed by a list_add() call.
Looking at what both these functions do we will have:
ml->node.next = &ml->node;
ml->node.prev = &ml->node;
oi->master->master_ports.next.prev = &ml->node;
ml->node.next = &oi->master->master_ports.next;
ml->node.prev = &oi->master->master_ports;
oi->master->master_ports.next = &ml->node;
from this, it's clear that both INIT_LIST_HEAD() calls
are unnecessary and can be safely removed.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Currently, DPLLs are hiding the gory details of switching parent
within set_rate, which confuses the common clock code and is wrong.
Fixed by applying the new determine_rate() and set_rate_and_parent()
functionality to any clock-ops previously using the broken approach.
This patch also removes the broken legacy code.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Expand the support of omap4 per-dpll to provide set_rate_and_parent.
This is required for proper behavior of clk_change_rate with
determine_rate support.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Similarly to OMAP3 noncore DPLL, the implementation of this DPLL clock
type is wrong. This patch adds basic functionality for determine_rate
for this clock type which will be taken into use in the patches following
later.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Currently, DPLL code hides the re-parenting within its internals, which
is wrong. This needs to be exposed to the common clock code via
determine_rate and set_rate_and_parent APIs. This patch adds support
for these, which will be taken into use in the following patches.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
DPLL4 can't be reprogrammed on OMAP3430 ES1.0 due to hardware limitation.
Currently, the code does runtime omap_rev() check to see the chip it is
being executed on, instead, change this to use clk_features flags.
This avoids need for runtime omap_rev() checks.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This creates a new SoC bus driver for the ARM Integrator
family core modules to register the SoC bus and provide
sysfs info for the core module. We delete the corresponding
code from the Integrator machine and select this driver to
get a clean result.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This gets rid of the custom LED driver in the Integrator directory
altogether and switches us over to using the syscon LEDs for this.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Integrator debug block is a simple set of registers, make
it a syscon and register the four LEDs on the Integrator/AP
baseboard as syscon LEDs.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Using the augmented reset driver for the Versatile family,
we can move the reset handling for the Integrator out of the
machine. We add a "syscon" attribute to the core module, and
access the syscon registers using this handle. We need to
select SYSCON, POWER, POWER_RESET and POWER_RESET_VERSATILE
in order for the restart functionality to always be
available on all systems (it should not be optional).
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In a combined ARMv6/v7 kernel, the setup-rcar-gen2.c cannot
currently be compiled correctly because it uses the isb
instruction that is not available on ARMv6. Adding the
-march=armv7-a flag lets the compiler know that it is safe
to build this file for ARMv7.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
remove menu "Broadcom Mobile SoC Selection"
This requires:
- selecting ARCH_BCM_MOBILE based on SoC selections
- fixup bcm_defconfig to work with new menu levels.
- multi_v7_defconfig in another patch for merge purposes as per
Olof Johansson's request
Signed-off-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
remove menu "Broadcom Mobile SoC Selection"
This requires:
- selecting ARCH_BCM_MOBILE based on SoC selections
- fixup bcm_defconfig and multi_v7_defconfig to work with new menu levels.
Signed-off-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Move ARCH_BCM_5301X subarch under ARCH_IPROC architecture.
Additional IPROC chipsets that share a lot of commonality should be
added under ARCH_IPROC as well.
Signed-off-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Adds initial support for the Cygnus SoC based on Broadcom’s iProc series.
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Desmond Liu <desmondl@broadcom.com>
Reviewed-by: JD (Jiandong) Zheng <jdzheng@broadcom.com>
Tested-by: Jonathan Richardson <jonathar@broadcom.com>
Signed-off-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Port the sh73a0 restart handling from the kzm9g-legacy board code to the
generic sh73a0 code.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Commit 68f3b875f7
"ARM: integrator: make the Integrator multiplatform"
broke allmodconfig like this:
>> arch/arm/include/asm/cmpxchg.h:114:2: error: #error
"SMP is not supported on this platform"
(etc)
This is due to the fact that as we turned on multiplatform
for the Integrator, this enabled a lot of non-applicable
CPU's to be selected for its multiplatform images, due to
a lot of "depends on ARCH_INTEGRATOR" restrictions in
arch/arm/mm/Kconfig for the different ARM CPU types.
Fix this by restricting the CPU selections to respective
multiplatform config, which now becomes a subset of the
possible Integrator configurations, or alternatively the
non-multiplatform config plus ARCH_INTEGRATOR, i.e.:
if (!ARCH_MULTIPLATFORM || ARCH_MULTI_Vx) &&
(ARCH_INTEGRATOR || ARCH_FOO ...)
Since the Integrator has been converted to multiplatform,
this will often take the short form:
if (ARCH_MULTI_Vx && ARCH_INTEGRATOR)
If no other non-multiplatform platforms are elegible.
Reported-by: Build bot for Mark Brown <broonie@kernel.org>
Reported-by: Kbuild test robot <fengguang.wu@intel.com>
Suggested-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
CPU logic power state is never programmed in either the initialization
or the suspend/resume logic, instead, we depend on mpuss to program this
properly. However, this leaves CPU logic power state indeterminate and
most probably in reset configuration (If bootloader or other similar
software have'nt monkeyed with the register). This can make powerstate=
RET be either programmed for CSWR (logic=ret) or OSWR(logic = OFF) and
in OSWR, there can be context loss when the code does not expect it.
To prevent all these confusions, just support clearly ON, INA, CSWR,
OFF which is the intent of the existing code by explicitly programming
logic state.
NOTE: since this is a hot path (using in cpuidle), the exit path just
programs powerstate (logic state is immaterial when powerstate is ON).
Without doing this, we end up with lockups when CPUs enter OSWR and
multiple blocks loose context, when we expect them to hit CSWR.
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As we add more static dependency mapping for various errata, the logic
gets clunkier. Since it is a simple lookup and map logic, centralize the
same and provide the mapping as a simple list.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 705814b5ea ("ARM: OMAP4+: PM: Consolidate OMAP4 PM code to
re-use it for OMAP5")
Moved logic generic for OMAP5+ as part of the init routine by
introducing omap4_pm_init. However, the patch left the powerdomain
initial setup, an unused omap4430 es1.0 check and a spurious log
"Power Management for TI OMAP4." in the original code.
Remove the duplicate code which is already present in omap4_pm_init from
omap4_init_static_deps.
As part of this change, also move the u-boot version print out of the
static dependency function to the omap4_pm_init function.
Fixes: 705814b5ea ("ARM: OMAP4+: PM: Consolidate OMAP4 PM code to re-use it for OMAP5")
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
