Commit Graph

162833 Commits

Author SHA1 Message Date
David Daney
2ca2ebfd95 MIPS: Don't corrupt page tables on vmalloc fault.
The code after the vmalloc_fault: label in do_page_fault() modifies
user page tables, this is not correct for 64-bit kernels.

For 64-bit kernels we should go straight to the no_context handler
skipping vmalloc_fault.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:52 +02:00
Wu Fei
e0cc87f594 MIPS: Shrink the size of tlb handler
By combining swapper_pg_dir and module_pg_dir, several if conditions
can be eliminated from the tlb exception handler. The reason they
can be combined is that, the effective virtual address of vmalloc
returned is at the bottom, and of module_alloc returned is at the
top. It also fixes the bug in vmalloc(), which happens when its
return address is not covered by the first pgd.

Signed-off-by: Wu Fei <at.wufei@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:51 +02:00
Manuel Lauss
a7bcb1ae60 MIPS: Alchemy: override loops_per_jiffy detection
loops_per_jiffy depends on coreclk speed;  preset it instead of
letting the kernel waste precious microseconds trying to approximate it.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:51 +02:00
David Daney
f7557dc821 MIPS: hw_random: Add hardware RNG for Octeon SOCs.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:51 +02:00
David Daney
e26449153c MIPS: Octeon: Add hardware RNG platform device.
Add a platform device for the Octeon Random Number Generator (RNG).

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:51 +02:00
Ralf Baechle
982f6ffeee MIPS: Remove useless zero initializations.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:51 +02:00
Manuel Lauss
2882b0c63a MIPS: Alchemy: get rid of allow_au1k_wait
Eliminate the 'allow_au1k_wait' variable.  MIPS kernel installs the
Alchemy-specific wait code before timer initialization;  if the C0
timer must be used for timekeeping the wait function is set to NULL
which means no wait implementation is available.

As a sideeffect, the 'wait instruction available' output in
/proc/cpuinfo now correctly indicates whether 'wait' is usable.

Run-tested on DB1200.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:50 +02:00
David Daney
9d24bafb0d MIPS: Octeon: Set kernel_uses_llsc to false on non-SMP builds.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:50 +02:00
David Daney
b791d1193a MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC.
On some CPUs, it is more efficient to disable and enable interrupts in the
kernel rather than use ll/sc for atomic operations.  But if we were to set
cpu_has_llsc to false, we would break the userspace futex interface (in
asm/futex.h).

We separate the two concepts, with a new predicate kernel_uses_llsc, that
lets us disable the kernel's use of ll/sc while still allowing the futex
code to use it.

Also there were a couple of cases in bitops.h where we were using ll/sc
unconditionally even if cpu_has_llsc were false.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:50 +02:00
Ralf Baechle
f7ade3c168 MIPS: Get rid of CONFIG_CPU_HAS_LLSC
CONFIG_CPU_HAS_LLSC duplicated the function of cpu_has_llsc for no good
reason and and the results if the one was enabled and the other disabled
was very unobvious.  Remove it now that there are no more remaining users.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:50 +02:00
Ralf Baechle
b8d6f78cd0 MIPS: Malta: Remove pointless use use of CONFIG_CPU_HAS_LLSC
All CPUs for Malta support LL/SC.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:49 +02:00
Ralf Baechle
43e6ae6d9f MIPS: Rewrite clearing of ll_bit on context switch in C
This also means there is now only one implementation not 3 left.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:49 +02:00
Ralf Baechle
f1e39a4a61 MIPS: Rewrite sysmips(MIPS_ATOMIC_SET, ...) in C with inline assembler
This way it doesn't have to use CONFIG_CPU_HAS_LLSC anymore.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:49 +02:00
Ralf Baechle
f4c6b6bc5a MIPS: Consolidate all CONFIG_CPU_HAS_LLSC use in a single C file.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:49 +02:00
Nelson Elhage
6eb10bc9e2 MIPS: Clean up linker script using new linker script macros.
This patch results in fewer output sections and in some data being
reordered, but should have no functional impact.

Signed-off-by: Nelson Elhage <nelhage@ksplice.com>
Signed-off-by: Tim Abbott <tabbott@ksplice.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:49 +02:00
Nelson Elhage
a0b54e256d MIPS: Use PAGE_SIZE in assembly instead of _PAGE_SIZE.
Now that PAGE_SIZE is available to assembly directly, there is no need
to separately expose it as _PAGE_SIZE through asm-offsets.

In addition, remove _PAGE_SHIFT from asm-offsets, since it was never
needed, and is not used anywhere.

Signed-off-by: Nelson Elhage <nelhage@ksplice.com>
Signed-off-by: Tim Abbott <tabbott@ksplice.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:48 +02:00
Christoph Hellwig
24ffce18a4 MIPS: Convert to asm-generic/hardirq.h
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:48 +02:00
Florian Fainelli
d47fbb5996 MIPS: AR7: Make board code register ar7_wdt as a platform device
This patch makes the board code register the ar7_wdt driver as a platform
device. We move the dynamic resource calculation here since the driver
should not be aware of the AR7 SoC version it is running on.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:48 +02:00
Wu Zhangjin
6f4c7b32e1 MIPS: Loongson: Update the default config file for fuloong2e
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:48 +02:00
Wu Zhangjin
3702bba5eb MIPS: Loongson: Add GCC 4.4 support for Loongson2E
Because only gcc >=4.4 have loongson-specific support, we need to choose
the suitable -march argument for gcc <= 4.3 and gcc >= 4.4, and here, we
use -march=loongson2e for loongson2e.

Thanks goes to Arnaud Patard <apatard@mandriva.com> for suggestion of
using cc-options(Documentation/kbuild/makefiles.txt). and thanks Zhang
Le for introducing the new CPU_LOONGSON2E kernel option.

NOTE: -mtune option is not need if -march and -mtune use the same value.

Signed-off-by: Zhang Le <r0bertz@gentoo.org>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:47 +02:00
Wu Zhangjin
3209e70e5e MIPS: Loongson: Add a machtype kernel command line argument
The difference between some loongson-based machines is very small, so, if
there is no necessary to add new kernel config options to cope with this
difference, it will be better to share the same kernel image file between
them, benefit from this, the linux distribution developers only have a need
to compile the kernel one time.

This machtype kernel command line argument will be used later to share the
same kernel image file between two different machines(menglong & yeeloong)
made by lemote.

Thanks very much to Zhang Le for cleaning up the machtype implementation.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:47 +02:00
Wu Zhangjin
85749d24bc MIPS: Loongson: Split common loongson source code out
To share common loongson source code between all of the loongson-based
machines. there is a need to split it out of the fuloong-2e/ directory.
at the same time, other according tuning is needed. the machine-specific
parts are defined as macros in relative header file, pci.h, mem.h,
machine.h.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:47 +02:00
Wu Zhangjin
8e4971175a MIPS: Loongson: Change naming methods
To make source code of loongson sharable to the machines(such as gdium)
made by the other companies, we rename arch/mips/lemote to
arch/mips/loongson, asm/mach-lemote to asm/mach-loongson, and rename lm2e
to the name of the machine: fuloong-2e. accordingly, FULONG are renamed to
FULOONG2E to make it distinguishable to the future FULOONG2F.  and also,
some other relative tuning is needed.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:47 +02:00
Wu Zhangjin
67b35e5d01 MIPS: Loongson: Add oprofile support
This kernel support is needed by the user-space tool:oprofile to profile
linux kernel or applications via loongson2 performance counters. you can
enable this driver via CONFIG_OPROFILE = y or m.

On Loongson2 there are two performance counters, each one can count 16
events respectively. when anyone of the performance counter overflows, an
interrupt will be generated and is routed to the IRQ MIPS_CPU_IRQ_BASE + 6.

Signed-off-by: Yanhua <yanh@lemote.com>
Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:47 +02:00
Wu Zhangjin
92d1b63dba MIPS: Loongson: RTC: Enable legacy RTC driver on fulong
RTC_LIB is selected by MIPS by default, and therefore, the legacy RTC
driver is disabled. but fortunately, RTC_LIB not works on fulong, so,
enabling the legcy RTC driver is needed, otherwise, the tools like
hwclock will not work.

Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:47 +02:00
Wu Zhangjin
f7face03c6 MIPS: Loongson: PCI: Clean up pcimap setup
Fixup the wrong original comment of pcimap, and make the source code more
understandable. and also, some new extra consideration is added in.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:46 +02:00
Wu Zhangjin
5e983ff654 MIPS: Loongson: clean up the coding style
With the help of script/checkpatch.pl, i have cleaned up the coding
style.

1. remove un-needed header files and tune some comments.
2. remove some un-needed { }

add a new header file loongson.h:

3. move some common header files to loongson.h
4. move some common extern declartions to loongson.h

and this new header file is needed for future loongson2f support.

Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:46 +02:00
Wu Zhangjin
bd92aa013e MIPS: Loongson: Split the implementation of prom and setup parts
This patch split the old initilization and setup implementation to
several file, one file one logic function.

the other main changes include:

	1. as the script/checkpatch.pl suggests, use strict_strtol instead
	of simple_strtol in arch/mips/lemote/lm2e/cmdline.c

	2. use the existed macros in asm/mips-boards/bonito64.h as the
	arguments of set_io_port_base() and remove the un-needed ones in
	asm/mach-lemote/pci.h

Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:46 +02:00
Wu Zhangjin
f54a40ee6b MIPS: Loongson: PCI: use existing mips_io_port_base
mips_io_port_base is initialized via set_io_port_base() in
arch/mips/lemote/lm2e/setup.c, we can use it directly here.

Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:46 +02:00
Wu Zhangjin
f256a5775a MIPS: Loongson: pm: clean up the reboot support
Several magic numbers have been replaced by relative macros, which will be
more readable and understandable.

Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:45 +02:00
Wu Zhangjin
8f0de87fa9 MIPS: Loongson: pm: Remove redundant source code
The implmentation of loongson2e_power_off and loongson2e_halt is almostly
the same, just preserve one of them.

Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:45 +02:00
Wu Zhangjin
f6a2740d0c MIPS: Loongson: Add new early_printk implmentation
This patch is based on the implementation in the lm2e-fixes branch of
Philippe's git://git.linux-cisco.org/linux-mips.git and the
malta-specific early_printk implementation.

Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:45 +02:00
Wu Zhangjin
95ff7c9553 MIPS: Loongson: Remove out-of-date board-specific kgdb source code
Since the re-implementation of kgdb by commit
8854700115 the platform-specific version
has become superfluous, remove it.

Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:44 +02:00
Wu Zhangjin
efc49ef556 MIPS: Loongson: Remove existing early_printk implementation
Removes the existing implementation of early_printk for fulong.  The old
implementation was based on the outdated board-specific dbg_io.c.

Since commit 8d60a903d9 dbg_io.c is not longer
needed; it will be removed by the next patch, and a new implementation of
early_printk will be added later.

Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:44 +02:00
Ralf Baechle
eb42306b7a MIPS: IP22, IP28: Build with -Werror
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:44 +02:00
Ralf Baechle
03bf6ad9d8 MIPS: FW: Build with -Werror
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:44 +02:00
Ralf Baechle
38c9fb743f MIPS: Fulong: Convert reset initialization to initcall.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:43 +02:00
Ralf Baechle
1f320d053c MIPS: Malta: Convert reset initialization to initcall.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:43 +02:00
Ralf Baechle
7e17615c45 MIPS: Get rid of duplicate cpu_idle() prototype.
Since 2.6.11-rc1 there is a prototype in <linux/smp.h>.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:43 +02:00
Julia Lawall
70ebadc8e3 MIPS: TXx9: Fix error handling.
Error handling code following a kzalloc should free the allocated data.
Error handling code following an ioremap should iounmap the allocated data.

The semantic match that finds the first problem is as follows:
(http://www.emn.fr/x-info/coccinelle/)

// <smpl>
@r exists@
local idexpression x;
statement S;
expression E;
identifier f,f1,l;
position p1,p2;
expression *ptr != NULL;
@@

x@p1 = \(kmalloc\|kzalloc\|kcalloc\)(...);
...
if (x == NULL) S
<... when != x
     when != if (...) { <+...x...+> }
(
x->f1 = E
|
 (x->f1 == NULL || ...)
|
 f(...,x->f1,...)
)
...>
(
 return \(0\|<+...x...+>\|ptr\);
|
 return@p2 ...;
)

@script:python@
p1 << r.p1;
p2 << r.p2;
@@

print "* file: %s kmalloc %s return %s" % (p1[0].file,p1[0].line,p2[0].line)
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:43 +02:00
Atsushi Nemoto
13680ade4e MIPS: TXx9: Disable PM capability of TX493[89] internal ether
Some TC35815 variants (i.e. TX493[89] internal ether) report existance of
PM registers though they are not supported.  Disable PM features by
clearing pdev->pm_cap.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:43 +02:00
Nelson Elhage
99502d94c3 MIPS: make page.h constants available to assembly.
page.h includes ifndef __ASSEMBLY__ guards, but PAGE_SIZE and some other
constants are defined using "1UL", which the assembler does not support.
Use the _AC macro from const.h to make them available to assembly (and
linker scripts).

Signed-off-by: Nelson Elhage <nelhage@ksplice.com>
Signed-off-by: Tim Abbott <tabbott@ksplice.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:42 +02:00
Manuel Lauss
75f4531641 MIPS: Alchemy: add gpio_request/gpio_free stubs for CONFIG_GPIOLIB=n
Some drivers use gpio_request/gpio_free regardless of whether
gpiolib is actually built;  add stubs to work around the ensuing
compile failures.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Tested-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:42 +02:00
Alexey Dobriyan
6de4c6f9c8 MIPS: Lasat: Fix compilation
Header needed for current_cpu_data which expands to smp_processor_id().
However, linux/smp.h can't be included into asm/cpu-info.h due to horrible
circular dependencies, so plug it here.

Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:42 +02:00
David Daney
2608441164 MIPS: Octeon: Check all CCAs in cvmx_write_csr.
The current code only checks CCA of 0 when deciding if a dummy read is
needed.  Since the kernel can (and does) use other CCAs we need to
mask out the CCA bits from the address.  Since the address constant
now fits in 16 bits, there is an added benefit that smaller code is
generated.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:41 +02:00
Roel Kluin
fff9c81529 MIPS: Octeon: False positive timeout
If we reach the test just below the loop with a `timeout' value of 0,
this does not mean that the timeout caused the loop to end, but rather
the `smi_rd.s.pending', in the last iteration. If timeout caused the
loop to end, then `timeout' is -1, not 0.

Since this can occur only in the last iteration, it is not very likely
to be a problem. By changing the post- to prefix decrement we ensure
that a timeout of 0 does mean it timed out.

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Acked-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:41 +02:00
Ralf Baechle
e3bf887d73 MIPS: Fix potencial build error in <asm/delay.h>
<asm/delay.h> will break if HZ isn't defined.  In 2.6.26 and later we're
usually lucky ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:41 +02:00
Linus Torvalds
79b520e87e Merge branch 'for-linus' of git://oss.sgi.com/xfs/xfs
* 'for-linus' of git://oss.sgi.com/xfs/xfs: (39 commits)
  xfs: includecheck fix for fs/xfs/xfs_iops.c
  xfs: switch to seq_file
  xfs: Record new maintainer information
  xfs: use correct log reservation when handling ENOSPC in xfs_create
  xfs: xfs_showargs() reports group *and* project quotas enabled
  xfs: un-static xfs_inobt_lookup
  xfs: actually enable the swapext compat handler
  xfs: simplify xfs_trans_iget
  xfs: merge fsync and O_SYNC handling
  xfs: speed up free inode search
  xfs: rationalize xfs_inobt_lookup*
  xfs: untangle xfs_dialloc
  xfs: factor out debug checks from xfs_dialloc and xfs_difree
  xfs: improve xfs_inobt_update prototype
  xfs: improve xfs_inobt_get_rec prototype
  xfs: factor out inode initialisation
  fs/xfs: Correct redundant test
  xfs: remove XFS_INO64_OFFSET
  un-static xfs_read_agf
  xfs: add more statics & drop some unused functions
  ...
2009-09-17 09:54:37 -07:00
Linus Torvalds
abf5940dad Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (75 commits)
  Blackfin: update ftrace for latest toolchain
  Blackfin: fix elf_fpregset_t definition
  Blackfin: unify cache init functions
  Blackfin: swap clocksource ratings for gptimer/cycles
  Blackfin: update ftrace_push_return_trace() breakage
  Blackfin: update cm board resources
  Blackfin: cm-bf537u: split board from cm-bf537e
  Blackfin: bf538-ezkit: add SPI IRQ resources
  Blackfin: increase default async timings for parallel flashes
  Blackfin: add ICPLB coverage for async banks
  Blackfin: use KERN_ALERT in all kgdb_test output
  Blackfin: fix BF54x SPI CS resources
  Blackfin: fix typo in isram_write()
  Blackfin: bf537-stamp: add adp5588 gpio resources
  Blackfin: add some isram-driver self tests
  Blackfin: workaround anomaly 05000283
  Blackfin: fix spelling in a few comments
  Blackfin: use raw_smp_processor_id() in exception code
  Blackfin: remove useless duplicated assignment in gpio code
  Blackfin: Fix link errors with binutils 2.19 and GCC 4.3
  ...
2009-09-17 09:53:04 -07:00
Linus Torvalds
66bc4a6f34 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (53 commits)
  m68knommu: Make PAGE_SIZE available to assembly files.
  m68knommu: fix ColdFire definition of CLOCK_TICK_RATE
  m68knommu: set multi-function pins for ethernet when enabled
  m68knommu: remove special interrupt handling code for ne2k support
  m68knommu: relax IO_SPACE_LIMIT setting
  m68knommu: remove ColdFire direct interrupt register access
  m68knommu: create a speciailized ColdFire 5272 interrupt controller
  m68knommu: add support for second interrupt controller of ColdFire 5249
  m68knommu: clean up old ColdFire timer irq setup
  m68knommu: map ColdFire interrupts to correct masking bits
  m68knommu: clean up ColdFire 532x CPU timer setup
  m68knommu: simplify ColdFire "timers" clock initialization
  m68knommu: support code to mask external interrupts on old ColdFire CPU's
  m68knommu: merge old ColdFire interrupt controller masking macros
  m68knommu: remove duplicate ColdFire mcf_autovector() code
  m68knommu: move ColdFire INTC definitions to new include file
  m68knommu: mask off all interrupts in ColdFire intc-simr controller
  m68knommu: remove timer device interrupt setup for ColdFire 532x
  m68knommu: remove interrupt masking from ColdFire pit timer
  m68knommu: remove unecessary interrupt level setting in ColdFire 520x setup
  ...
2009-09-17 09:52:43 -07:00