Commit Graph

71333 Commits

Author SHA1 Message Date
Christian König
4932d37055 drm/amdgpu: limit the amdgpu_vm_update_ptes trace point
The text output should not be more than a page, so only print the first
32 page table entries.

If we need all of them we can still look into the binary trace.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Shashank Sharma <shashank.sharma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10 16:41:48 -05:00
Dave Airlie
b10733527b Merge tag 'amd-drm-next-5.11-2020-12-09' of git://people.freedesktop.org/~agd5f/linux into drm-next
amd-drm-next-5.11-2020-12-09:

amdgpu:
- SR-IOV fixes
- Navy Flounder updates
- Sienna Cichlid updates
- Dimgrey Cavefish updates
- Vangogh updates
- Misc SMU fixes
- Misc display fixes
- Last big hunk of W=1 warning fixes
- Cursor validation fixes
- CI BACO updates

From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201210045344.21566-1-alexander.deucher@amd.com
Signed-off-by: Dave Airlie <airlied@redhat.com>
2020-12-10 16:55:53 +10:00
Andrey Grodzovsky
f8aab60422 drm/amdgpu: Initialise drm_gem_object_funcs for imported BOs
For BOs imported from outside of amdgpu, setting of amdgpu_gem_object_funcs
was missing in amdgpu_dma_buf_create_obj. Fix by refactoring BO creation
and amdgpu_gem_object_funcs setting into single function called
from both code paths.

Fixes: d693def4fd ("drm: Remove obsolete GEM and PRIME callbacks from struct drm_driver")

v2: Use use amdgpu_gem_object_create() directly
v3: fix warning

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09 23:17:03 -05:00
Evan Quan
c5b58c8c86 drm/amd/pm: typo fix (CUSTOM -> COMPUTE)
The "COMPUTE" was wrongly spelled as "CUSTOM".

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 5.9.x
2020-12-09 22:38:10 -05:00
Dave Airlie
60f2f74978 Merge tag 'drm-msm-next-2020-12-07' of https://gitlab.freedesktop.org/drm/msm into drm-next
* Shutdown hook for GPU (to ensure GPU is idle before iommu goes away)
* GPU cooling device support
* DSI 7nm and 10nm phy/pll updates
* Additional sm8150/sm8250 DPU support (merge_3d and DSPP color
  processing)
* Various DP fixes
* A whole bunch of W=1 fixes from Lee Jones
* GEM locking re-work (no more trylock_recursive in shrinker!)
* LLCC (system cache) support
* Various other fixes/cleanups

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGt0G=H3_RbF_GAQv838z5uujSmFd+7fYhL6Yg=23LwZ=g@mail.gmail.com
2020-12-10 09:42:47 +10:00
Andrey Grodzovsky
ab43234d0b drm/amdgpu: Initialise drm_gem_object_funcs for imported BOs
For BOs imported from outside of amdgpu, setting of amdgpu_gem_object_funcs
was missing in amdgpu_dma_buf_create_obj. Fix by refactoring BO creation
and amdgpu_gem_object_funcs setting into single function called
from both code paths.

Fixes: d693def4fd ("drm: Remove obsolete GEM and PRIME callbacks from struct drm_driver")

v2: Use use amdgpu_gem_object_create() directly
v3: fix warning

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09 10:06:40 -05:00
Alex Deucher
157fe68d74 drm/amdgpu: fix size calculation with stolen vga memory
If we need to keep the stolen vga memory, make sure it is
at least as big as the legacy vga size.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2020-12-09 10:06:40 -05:00
Changfeng
c9918d1f63 drm/amd/pm: update smu10.h WORKLOAD_PPLIB setting for raven
When using old WORKLOAD_PPLIB setting in smu10.h, there is problem that
it can't be able to switch to mak gpu clk during compute workload.
It needs to update WORKLOAD_PPLIB setting to fix this issue.

Signed-off-by: Changfeng <Changfeng.Zhu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2020-12-09 10:06:40 -05:00
Felix Kuehling
ab6e4e9de8 drm/amdkfd: Fix leak in dmabuf import
Release dmabuf reference before returning from kfd_ioctl_import_dmabuf.
amdgpu_amdkfd_gpuvm_import_dmabuf takes a reference to the underlying
GEM BO and doesn't keep the reference to the dmabuf wrapper.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09 10:06:39 -05:00
Stanley.Yang
6896887b86 drm/amdgpu: fix sdma instance fw version and feature version init
each sdma instance fw_version and feature_version
should be set right value when asic type isn't
between SIENNA_CICHILD and CHIP_DIMGREY_CAVEFISH

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2020-12-09 10:06:39 -05:00
Sung Lee
369b7ebe17 drm/amd/display: Add wm table for Renoir
[Why]
Without additional HostVM Latency, Renoir takes 2us longer to exit
self-refresh. This causes underflow in certain cases.

[How]
Add table for Renoir with updated sr exit latencies for WM set A.

Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09 10:06:39 -05:00
Chris Park
c2ffe78b8b drm/amd/display: Prevent bandwidth overflow
[Why]
At very high pixel clock, bandwidth calculation exceeds 32 bit size
and overflow value. This causes the resulting selection of link rate
to be inaccurate.

[How]
Change order of operation and use fixed point to deal with integer
accuracy. Also address bug found when forcing link rate.

Signed-off-by: Chris Park <Chris.Park@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09 10:06:39 -05:00
Arnd Bergmann
2343e9d2c5 drm/amdgpu: fix debugfs creation/removal, again
There is still a warning when CONFIG_DEBUG_FS is disabled:

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:1145:13: error: 'amdgpu_ras_debugfs_create_ctrl_node' defined but not used [-Werror=unused-function]
 1145 | static void amdgpu_ras_debugfs_create_ctrl_node(struct amdgpu_device *adev)

Change the code again to make the compiler actually drop
this code but not warn about it.

Fixes: ae2bf61ff3 ("drm/amdgpu: guard ras debugfs creation/removal based on CONFIG_DEBUG_FS")
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-09 10:06:39 -05:00
Alex Deucher
578b6c4878 drm/amdgpu/disply: set num_crtc earlier
To avoid a recently added warning:
 Bogus possible_crtcs: [ENCODER:65:TMDS-65] possible_crtcs=0xf (full crtc mask=0x7)
 WARNING: CPU: 3 PID: 439 at drivers/gpu/drm/drm_mode_config.c:617 drm_mode_config_validate+0x178/0x200 [drm]
In this case the warning is harmless, but confusing to users.

Fixes: 0df1082374 ("drm: Validate encoder->possible_crtcs")
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=209123
Reviewed-by: Daniel Vetter <daniel@ffwll.ch>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2020-12-09 10:03:59 -05:00
Viresh Kumar
b66ba5b593 drm/panfrost: dev_pm_opp_put_*() accepts NULL argument
The dev_pm_opp_put_*() APIs now accepts a NULL opp_table pointer and so
there is no need for us to carry the extra check. Drop them.

Reviewed-by: Steven Price <steven.price@arm.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-12-09 11:21:12 +05:30
Viresh Kumar
72ba9e226f drm/lima: dev_pm_opp_put_*() accepts NULL argument
The dev_pm_opp_put_*() APIs now accepts a NULL opp_table pointer and so
there is no need for us to carry the extra check. Drop them.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-12-09 11:21:12 +05:30
Alex Deucher
0e830d2872 drm/amdgpu/powerplay: parse fan table for CI asics
Set up all the parameters required for SMU fan control if supported.

Bug: https://bugzilla.kernel.org/show_bug.cgi?id=201539
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2020-12-08 23:12:08 -05:00
Alex Deucher
3001867952 drm/amdgpu: fix size calculation with stolen vga memory
If we need to keep the stolen vga memory, make sure it is
at least as big as the legacy vga size.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:06:37 -05:00
Alex Deucher
64f2c15892 drm/amdgpu: remove amdgpu_ttm_late_init and amdgpu_bo_late_init
No longer used.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:06:33 -05:00
Alex Deucher
5f6fab247c drm/amdgpu: free the pre-OS console framebuffer after the first modeset
Rather than in late_init to avoid race conditions between freeing the
buffers and the initial modeset.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:06:30 -05:00
Alex Deucher
35d3f41dd6 drm/amdgpu: enable runtime pm using BACO on CI dGPUs
Works using BACO.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:06:26 -05:00
Alex Deucher
580577fbb4 drm/amdgpu/cik: enable BACO reset on Bonaire
Works now that the BACO sequence is fixed.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:06:23 -05:00
Changfeng
f6f75ebdc0 drm/amd/pm: update smu10.h WORKLOAD_PPLIB setting for raven
When using old WORKLOAD_PPLIB setting in smu10.h, there is problem that
it can't be able to switch to mak gpu clk during compute workload.
It needs to update WORKLOAD_PPLIB setting to fix this issue.

Signed-off-by: Changfeng <Changfeng.Zhu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:06:15 -05:00
Xiaojian Du
8c901781d7 drm/amd/pm: remove one unsupported smu function for vangogh
This patch is to remove one unsupported smu function, this function
will set the smu feature mask to disable all smu features in exception.
Because vangogh doesn't support to set the smu feature mask
by driver software, so this function is invalid for vangogh.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:06:07 -05:00
Roman Li
1352485633 drm/amd/display: setup system context for APUs
[Why]
Scatter/gather is APU feature.
But in dm it is limited only to Renoir.
Now we need it for Vangogh.

[How]
Apply system context setup in dm_init to all APUs.

Signed-off-by: Roman Li <roman.li@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:06:01 -05:00
Roman Li
5cd5f00700 drm/amd/display: add S/G support for Vangogh
[Why]
Scatter/gather feature is supported on Vangogh.

[How]
Add GTT domain support for Vangogh to enable
display buffers in system memory.

Signed-off-by: Roman Li <roman.li@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:05:54 -05:00
Felix Kuehling
c897934da1 drm/amdkfd: Fix leak in dmabuf import
Release dmabuf reference before returning from kfd_ioctl_import_dmabuf.
amdgpu_amdkfd_gpuvm_import_dmabuf takes a reference to the underlying
GEM BO and doesn't keep the reference to the dmabuf wrapper.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:05:47 -05:00
Nirmoy Das
68fce5f07c drm/amdgpu: use AMDGPU_NUM_VMID when possible
Replace hardcoded vmid number with AMDGPU_NUM_VMID macro.

Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:05:40 -05:00
Stanley.Yang
92c415a3e2 drm/amdgpu: fix sdma instance fw version and feature version init
each sdma instance fw_version and feature_version
should be set right value when asic type isn't
between SIENNA_CICHILD and CHIP_DIMGREY_CAVEFISH

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:05:29 -05:00
Tao Zhou
3755ff54c5 drm/amd/pm: update driver if version for dimgrey_cavefish
Per PMFW 59.16.0.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:05:21 -05:00
Aric Cyr
aec0ebd651 drm/amd/display: 3.2.115
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:05:14 -05:00
Anthony Koo
8b19a4e351 drm/amd/display: [FW Promotion] Release 0.0.45
- Add define for __forceinline

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:05:06 -05:00
Michael Strauss
3abad347c4 drm/amd/display: Revert DCN2.1 dram_clock_change_latency update
[Why]
New value breaks VSR on high refresh panels, reverting until a fix is developed

Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:04:59 -05:00
Charlene Liu
6df9218a22 drm/amd/display: Enable gpu_vm_support for dcn3.01
[Why]
dcn3_01 supports gpu_vm, but this is not enabled in amdgpu_dm

Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:04:53 -05:00
Roy Chan
c0794a3b59 drm/amd/display: Fixed the audio noise during mode switching with HDCP mode on
[Why]
When HDCP is on, some display would introduce audio noise during
HDCP handling.

[How]
Mute before HDCP handling when disabling core link. Unmute after
HDCP when enabling core link.

Signed-off-by: Roy Chan <roy.chan@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:04:46 -05:00
Sung Lee
4bbfae00ac drm/amd/display: Add wm table for Renoir
[Why]
Without additional HostVM Latency, Renoir takes 2us longer to exit
self-refresh. This causes underflow in certain cases.

[How]
Add table for Renoir with updated sr exit latencies for WM set A.

Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:04:40 -05:00
Chris Park
80089dd841 drm/amd/display: Prevent bandwidth overflow
[Why]
At very high pixel clock, bandwidth calculation exceeds 32 bit size
and overflow value. This causes the resulting selection of link rate
to be inaccurate.

[How]
Change order of operation and use fixed point to deal with integer
accuracy. Also address bug found when forcing link rate.

Signed-off-by: Chris Park <Chris.Park@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:04:33 -05:00
Qingqing Zhuo
3083a9845e drm/amd/display: Only one display lights up while using MST hub
[Why]
With the addition of dc_lock acquire before dc_link_handle_hpd_rx_irq,
there will be a deadlock situation where commit state sends a request
for payload allocation on MST and wait for HPD to process DOWN_REP.

[How]
Move forward the MST message handling in handle_hpd_rx_irq so that
it will not rely on call to dc_link_handle_hpd_rx_irq.

Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:04:26 -05:00
Wesley Chalmers
5a83bf8072 drm/amd/display: Use provided offset for DPG generation
[Why]
Currently, the offset provided to dcn30_set_disp_pattern_generator is
not forwarded to OPP for display pattern generation, resulting in
misaligned patterns and test failures.

[How]
Use the provided offset.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Samson Tam <Samson.Tam@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:04:19 -05:00
Judy Cai
a013dd15d4 drm/amd/display: Change to IMMEDIATE mode from FRAME mode
[Why]
Change in DCN10 to use IMMEDIATE_UPDATE mode for AFMT is not
reflected in DCN30 as it uses VPG.

[How]
Use IMMEDIATE_UPDATE mode for DCN30 in VPG.

Signed-off-by: Judy Cai <HuiYi.Cai@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:04:12 -05:00
John Wu
25331a18f4 drm/amd/display: Don't check seamless boot in power down HW by timeout
[Why]
power_down_on_boot is designed to power down HW when set mode is not
called before timeout. It can happen in headless system or booting with
the display is output by non-AMD GPU only.
The function will be executed only if it's not seamless boot. So in
seamless boot, the HW is still on.
It's not necessary to check this since there's no display data in both
cases.

[How]
Remove seamless boot checking in power_down_on_boot.

Signed-off-by: John Wu <john.wu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:04:04 -05:00
Jing Zhou
5c8a6c71d7 drm/amd/display: Set default bits per channel
[Why]
Bump into calcReducedBlankingTiming because of mode query failed.
In this function,
timing.displayColorDepth == DISPLAY_COLOR_DEPTH_UNDEFINED.
Then req_bw == 0 because of bits_per_channel == 0.
So decide edp link settings, use default RBRx1 for special timing.

[How]
Set default bits_per_channel is 8.

Signed-off-by: Jing Zhou <Jing.Zhou@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:03:52 -05:00
Wyatt Wood
92f1fa0d67 drm/amd/display: Add support for runtime feature detection command
[Why]
Add support for new fw command for runtime feature detection.

[How]
Driver sends command through ring buffer, and fw returns data back
through this command.

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:03:46 -05:00
Dmytro Laktyushkin
42ddf36e67 drm/amd/display: Expose clk_mgr functions for reuse
[How & Why]
Allow clk_mgr functions to be reused by making then non-static

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:03:39 -05:00
Qingqing Zhuo
c8ea79a8a2 drm/amd/display: NULL pointer error during compliance test
[Why]
Calls to disable/enable stream should be guarded with dc_lock.

[How]
Add dc_lock before calling into dc_link_handle_hpd_rx_irq.

Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:03:31 -05:00
AMD\ramini
983bcb4cbe drm/amd/display: Set FixRate bit in VSIF V3
[Why]
Signal FreeSync display that we are in Fixed Rate mode, and
expand the FreeSync range to 1024.

[How]
Set the new bit in SB16:bit0, and augment the min and max
refresh rate with 2 extra bits.

Signed-off-by: AMD\ramini <Reza.Amini@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:03:04 -05:00
Reza Amini
9bc4162665 drm/amd/display: Implement VSIF V3 extended refresh rate feature
[Why]
Implement feature of VSIF V3

[How]
Set refresh rate MSB for extended range

Signed-off-by: Reza Amini <Reza.Amini@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:02:57 -05:00
Kevin Wang
a6d64c1ae1 drm/amdgpu/pm: add smc v2_1 printer in amdgpu_ucode_print_smc_hdr()
the smc v2_0 printer is not compatible with the smc v2_1 .
1. add smc v2_1 printer.
2. cleanup code

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:02:50 -05:00
Kevin Wang
ee3d8dd1af drm/amdgpu: change trace event parameter name from 'direct' to 'immediate'
s/direct/immediate/g

amdgpu vm has renamed parameter name from 'direct' to 'immedate'.
however, the trace event is not updated yet.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:02:38 -05:00
Arnd Bergmann
c699b05c40 drm/amdgpu: fw_attestation: fix unused function warning
Without debugfs, the compiler notices one function that is not used at
all:

drivers/gpu/drm/amd/amdgpu/amdgpu_fw_attestation.c:123:12: error: unused function 'amdgpu_is_fw_attestation_supported' [-Werror,-Wunused-function]

In fact the static const amdgpu_fw_attestation_debugfs_ops structure is
also unused here, but that warning is currently disabled.

Removing the #ifdef check does the right thing and leads to all of this
code to be dropped without warning.

Fixes: 19ae333001 ("drm/amdgpu: added support for psp fw attestation")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-08 23:02:28 -05:00