Krzysztof Kozlowski
f03a9670d2
irqchip/aspeed-scu-ic: Fix irq_of_parse_and_map() return value
...
The irq_of_parse_and_map() returns 0 on failure, not a negative ERRNO.
Fixes: 04f605906fkrzysztof.kozlowski@linaro.org >
Signed-off-by: Marc Zyngier <maz@kernel.org >
Link: https://lore.kernel.org/r/20220423094227.33148-2-krzysztof.kozlowski@linaro.org
2022-05-04 16:37:48 +01:00
Billy Tsai
8958389681
irqchip/aspeed-scu: Replace update_bits with write_bits.
...
The interrupt status bits are cleared by writing 1, we should force a
write to clear the interrupt without checking if the value has changed.
Fixes: 04f605906fbilly_tsai@aspeedtech.com >
Reviewed-by: Joel Stanley <joel@jms.id.au >
Signed-off-by: Marc Zyngier <maz@kernel.org >
Link: https://lore.kernel.org/r/20211124094348.11621-1-billy_tsai@aspeedtech.com
Cc: stable@vger.kernel.org
2021-11-25 16:50:44 +00:00
Marc Zyngier
046a6ee234
irqchip: Bulk conversion to generic_handle_domain_irq()
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Wherever possible, replace constructs that match either
generic_handle_irq(irq_find_mapping()) or
generic_handle_irq(irq_linear_revmap()) to a single call to
generic_handle_domain_irq().
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be >
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com >
Signed-off-by: Marc Zyngier <maz@kernel.org >
2021-06-10 13:09:19 +01:00
Eddie James
04f605906f
irqchip: Add Aspeed SCU interrupt controller
...
The Aspeed SOCs provide some interrupts through the System Control
Unit registers. Add an interrupt controller that provides these
interrupts to the system.
Signed-off-by: Eddie James <eajames@linux.ibm.com >
Signed-off-by: Marc Zyngier <maz@kernel.org >
Reviewed-by: Andrew Jeffery <andrew@aj.id.au >
Link: https://lore.kernel.org/r/1579123790-6894-3-git-send-email-eajames@linux.ibm.com
2020-01-20 19:10:04 +00:00
