The GW53xx has a transceiver with a STBY pin connected to an IMX6 GPIO.
Configure this as a regulator to drive it low when CAN is in use.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GW52xx has a transceiver with a STBY pin connected to an IMX6 GPIO.
Configure this as a regulator to drive it low when CAN is in use.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This pull request contains Broadcom ARM-based SoC Device Tree updates
for 6.1, please pull the following:
- Rafal improves the BCM5301X PCIe DT nodes schema validation by
flagging the PCIe controller with a missing "device_type" property
- William merges BCM4908 within BCMBCA since this chip is part of the
Broadcom Broadband Carrier Access group and follows the architecture of
those chips
* tag 'arm-soc/for-6.1/devicetree' of https://github.com/Broadcom/stblinux:
arm64: bcmbca: Merge ARCH_BCM4908 to ARCH_BCMBCA
arm64: dts: Add BCM4908 generic board dts
arm64: dts: Move BCM4908 dts to bcmbca folder
arm64: dts: bcmbca: update BCM4908 board dts files
dt-bindings: arm64: bcmbca: Update BCM4908 description
dt-bindings: arm64: bcmbca: Merge BCM4908 into BCMBCA
ARM: dts: BCM5301X: Add basic PCI controller properties
Link: https://lore.kernel.org/r/20220915023044.2350782-2-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable mac3 controller in Elbert dts: Elbert MAC3 is connected to the
BCM53134P onboard switch's IMP_RGMII port directly (fixed link, no PHY
between BMC MAC and BCM53134P).
Note: BMC's mdio0 controller is connected to BCM53134P's MDIO interface,
and the MDIO channel will be enabled later, when BCM53134 is added to
"bcm53xx" DSA driver.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
The SAMA5D3-EDS board is an Ethernet Development Platform allowing for
evaluating many Microchip ethernet switch and PHY products. Various
daughter cards can connect via an RGMII connector or an RMII connector.
The EDS board is not intended for stand-alone use and has no ethernet
capabilities when no daughter board is connected. As such, this device
tree is intended to be used with a DT overlay defining the add-on board.
To better ensure consistency, some items are defined here as a form of
documentation so that all add-on overlays will use the same terms.
Link: https://www.microchip.com/en-us/development-tool/SAMA5D3-ETHERNET-DEVELOPMENT-SYSTEM
Signed-off-by: Jerry Ray <jerry.ray@microchip.com>
[claudiu.beznea: s/gpio-inputs/gpio-keys in at91-sama5d3_eds.dts]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220909163022.13022-2-jerry.ray@microchip.com
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom-msm8226-samsung-s3ve3g.dtb: hwlock: 'reg' is a required property
qcom-msm8226-samsung-s3ve3g.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-16-krzysztof.kozlowski@linaro.org
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom-apq8084-mtp.dtb: hwlock: 'reg' is a required property
qcom-apq8084-mtp.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-15-krzysztof.kozlowski@linaro.org
STM32 DT for v6.1, round 1
Highlights:
----------
- MPU:
- General:
- Add I2C support (5 instances) on STM32MP13.
- Add SPI support (5 instabces) on STM32MP13.
- Add timer interrupts support on STM32MP15.
- ST boards:
- Enable I2C1 and I2C5 on stm32mp135f-dk board.
- Add SPI5 on stm32mp135f-dk board but disabled as only available on
the GPIO expansion connector.
- ARGON:
- Remove spidev node as not used by the code.
* tag 'stm32-dt-for-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: argon: remove spidev node
ARM: dts: stm32: Create separate pinmux for qspi cs pin in stm32mp15-pinctrl.dtsi
ARM: dts: stm32: Fix typo in license text for Engicam boards
ARM: dts: stm32: Add timer interrupts on stm32mp15
ARM: dts: stm32: add pinctrl and disabled spi5 node in stm32mp135f-dk
ARM: dts: stm32: add spi nodes into stm32mp131.dtsi
ARM: dts: stm32: enable i2c1 and i2c5 on stm32mp135f-dk.dts
ARM: dts: stm32: add i2c nodes into stm32mp131.dtsi
Link: https://lore.kernel.org/r/d80afc20-2745-24a2-ab70-a5a03439bd50@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Adapt emac nodes to make them conform to the newly yaml-converted binding.
* tag 'v6.1-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: restyle emac nodes
ARM: dts: rockchip: fix rk3036 emac node compatible string
Link: https://lore.kernel.org/r/4766760.31r3eYUQgx@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Commit 956b200a84 ("spi: spidev: Warn loudly if instantiated from DT
as "spidev"") states that there should not be spidev nodes in DTs.
Remove this non-HW description. There won't be a regression because it
won't bind since 2015 anyhow.
Fixes: 16e3e44c5b ("ARM: dts: stm32: Add support for the emtrion emSBC-Argon")
Cc: Reinhold Mueller <reinhold.mueller@emtrion.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Create a separate pinmux for qspi chip select in stm32mp15-pinctrl.dtsi.
In the case we want to use transfer_one() API to communicate with a SPI
device, chip select signal must be driven individually.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The timer units in the stm32mp15x CPUs have interrupts, depending on the
timer flavour either one "global" or four dedicated ones. Add the irqs
to the timer units on stm32mp15x.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add pinctrl information and a disabled spi5 node within
stm32mp135f-dk.dts in order to use the spi5 bus which is
available via the GPIO expansion pins of the STM32MP135 Discovery board.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Node names should be generic, so change the sdma node name format 'sdma'
into 'dma-controller'.
Acked-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Joy Zou <joy.zou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Driver moxart-mmc.c has .compatible = "moxa,moxart-mmc".
But moxart .dts/.dtsi and the documentation file moxa,moxart-dma.txt
contain compatible = "moxa,moxart-sdhci".
Change moxart .dts/.dtsi files and moxa,moxart-dma.txt to match the driver.
Replace 'sdhci' with 'mmc' in names too, since SDHCI is a different
controller from FTSDC010.
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Cc: Jonas Jensen <jonas.jensen@gmail.com>
Link: https://lore.kernel.org/r/20220907175341.1477383-1-saproj@gmail.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
