The 'fsl,refclk-pad-mode' DT property used to select clock source for
PCIe PHY can have either of three values, IMX8_PCIE_REFCLK_PAD_INPUT,
IMX8_PCIE_REFCLK_PAD_OUTPUT, IMX8_PCIE_REFCLK_PAD_UNUSED. The first
two options are handled correctly by the driver, the last one is not,
this patch implements support for the last option.
The IMX8_PCIE_REFCLK_PAD_INPUT means PCIE_RESREF is PHY clock input,
the IMX8_PCIE_REFCLK_PAD_OUTPUT means PHY clock are sourced from SoC
internal PLL and output to PCIE_RESREF external IO pin. The last
IMX8_PCIE_REFCLK_PAD_UNUSED is a combination of previous two, PHY
clock are sourced from SoC internal PLL and not output anywhere.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
To: linux-phy@lists.infradead.org
Link: https://lore.kernel.org/r/20220413140710.10074-1-marex@denx.de
Signed-off-by: Vinod Koul <vkoul@kernel.org>
i.MX8qxp SoC embeds a Mixel MIPI DPHY + LVDS PHY combo which supports
either a MIPI DSI display or a LVDS display. The PHY mode is controlled
by SCU firmware and the driver would call a SCU firmware function to
configure the PHY mode. The single LVDS PHY has 4 data lanes to support
a LVDS display. Also, with a master LVDS PHY and a slave LVDS PHY, they
may work together to support a LVDS display with 8 data lanes(usually, dual
LVDS link display). Note that this patch supports the LVDS PHY mode only
for the i.MX8qxp Mixel combo PHY, i.e., the MIPI DPHY mode is yet to be
supported, so for now error would be returned from ->set_mode() if MIPI
DPHY mode is passed over to it for the combo PHY.
Cc: Guido Günther <agx@sigxcpu.org>
Cc: Robert Chiras <robert.chiras@nxp.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Link: https://lore.kernel.org/r/20220419010852.452169-6-victor.liu@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Freescale Layerscape Lynx 28G SerDes PHYs are only present on
Freescale/NXP Layerscape SoCs.
Move PHY_FSL_LYNX_28G outside the block for ARCH_MXC, as the latter
is meant for i.MX8 SoCs, which is a different family than Layerscape.
Add a dependency on ARCH_LAYERSCAPE, to prevent asking the user about
this driver when configuring a kernel without Layerscape SoC support.
Fixes: 02e2af20f4 ("Merge tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc")
Fixes: 8f73b37cf3 ("phy: add support for the Layerscape SerDes 28G")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Here is the big set of char/misc and other small driver subsystem
updates for 5.18-rc1.
Included in here are merges from driver subsystems which contain:
- iio driver updates and new drivers
- fsi driver updates
- fpga driver updates
- habanalabs driver updates and support for new hardware
- soundwire driver updates and new drivers
- phy driver updates and new drivers
- coresight driver updates
- icc driver updates
Individual changes include:
- mei driver updates
- interconnect driver updates
- new PECI driver subsystem added
- vmci driver updates
- lots of tiny misc/char driver updates
There will be two merge conflicts with your tree, one in MAINTAINERS
which is obvious to fix up, and one in drivers/phy/freescale/Kconfig
which also should be easy to resolve.
All of these have been in linux-next for a while with no reported
problems.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc and other driver updates from Greg KH:
"Here is the big set of char/misc and other small driver subsystem
updates for 5.18-rc1.
Included in here are merges from driver subsystems which contain:
- iio driver updates and new drivers
- fsi driver updates
- fpga driver updates
- habanalabs driver updates and support for new hardware
- soundwire driver updates and new drivers
- phy driver updates and new drivers
- coresight driver updates
- icc driver updates
Individual changes include:
- mei driver updates
- interconnect driver updates
- new PECI driver subsystem added
- vmci driver updates
- lots of tiny misc/char driver updates
All of these have been in linux-next for a while with no reported
problems"
* tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (556 commits)
firmware: google: Properly state IOMEM dependency
kgdbts: fix return value of __setup handler
firmware: sysfb: fix platform-device leak in error path
firmware: stratix10-svc: add missing callback parameter on RSU
arm64: dts: qcom: add non-secure domain property to fastrpc nodes
misc: fastrpc: Add dma handle implementation
misc: fastrpc: Add fdlist implementation
misc: fastrpc: Add helper function to get list and page
misc: fastrpc: Add support to secure memory map
dt-bindings: misc: add fastrpc domain vmid property
misc: fastrpc: check before loading process to the DSP
misc: fastrpc: add secure domain support
dt-bindings: misc: add property to support non-secure DSP
misc: fastrpc: Add support to get DSP capabilities
misc: fastrpc: add support for FASTRPC_IOCTL_MEM_MAP/UNMAP
misc: fastrpc: separate fastrpc device from channel context
dt-bindings: nvmem: brcm,nvram: add basic NVMEM cells
dt-bindings: nvmem: make "reg" property optional
nvmem: brcm_nvram: parse NVRAM content into NVMEM cells
nvmem: dt-bindings: Fix the error of dt-bindings check
...
Fix following includecheck warning:
./drivers/phy/freescale/phy-fsl-lynx-28g.c: linux/workqueue.h is
included more than once.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Link: https://lore.kernel.org/r/20220315235603.59481-1-yang.lee@linux.alibaba.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This patch adds a new generic PHY driver to support the Lynx 28G SerDes
block found on some of the Layerscape SoCs such as LX2160A.
At the moment, only the following Ethernet protocols are supported:
SGMII/1000Base-X and 10GBaseR.
SerDes lanes which are not running an Ethernet protocol or a currently
supported Ethenet protocol will be left as it was configured through the
RCW (Reset Configuration Word) at boot time.
At probe time, the platform driver will read the current
configuration of both PLLs found on a SerDes block and will determine
what protocols are supported using that PLL.
For example, if a PLL is configured to generate a clock net (frate) of
5GHz the only protocols sustained by that PLL are SGMII/1000Base-X
(using a quarter of the full clock rate) and QSGMII using the full clock
net frequency on the lane.
On the .set_mode() callback, the PHY driver will first check if the
requested operating mode (protocol) is even supported by the current PLL
configuration and will error out if not.
Then, the lane is reconfigured to run on the requested protocol.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The Freescale/NXP i.MX8 USB3, MIPI DSI, and PCIE PHYs are only present
on the NXP i.MX8 family of SoCs. Hence wrap the config symbols for
these PHYs inside a check for ARCH_MXC && ARM64, to prevent asking the
user about these drivers when configuring a kernel without NXP i.MX SoC
family support.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Link: https://lore.kernel.org/r/393868affd830016d35f0d9aba32ccd7098c8073.1641987369.git.geert+renesas@glider.be
Signed-off-by: Vinod Koul <vkoul@kernel.org>
kernel test robot complains about missing FIELD_PREP, so include
bitfield.h for that
drivers/phy/freescale/phy-fsl-imx8m-pcie.c:41:37: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
drivers/phy/freescale/phy-fsl-imx8m-pcie.c:41:41: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
Reported-by: kernel test robot <lkp@intel.com>
Fixes: 1aa97b0022 ("phy: freescale: pcie: Initialize the imx8 pcie standalone phy driver")
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Link: https://lore.kernel.org/r/20211215060834.921617-1-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The only usage of imx8mp_usb_phy_ops is to assign its address to the
data field in the of_device_id struct, which is a const void pointer.
Make it const to allow the compiler to put it in read-only memory.
Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200926205844.34218-1-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The only usage is to pass its address to devm_phy_create() which takes a
const pointer. Make it const to allow the compiler to put it in
read-only memory.
Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200823220025.17588-3-rikard.falkeborn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Add initial support for imx8mp usb phy support, imx8mp usb has
a silimar phy as imx8mq, which has some different customizations
on clock and low power design when SoC integration.
Signed-off-by: Li Jun <jun.li@nxp.com>
Link: https://lore.kernel.org/r/1598276014-2377-2-git-send-email-jun.li@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
*) Add a new PHY driver for Qualcomm PCIe2 PHY
*) Add a new PHY driver for Mixel DPHY present in i.MX8
*) Fix Qualcomm QMP UFS PHY driver from incorrectly reporting that
PHY enable failed
*) Fix _BUG_ on Amlogic G12A USB3 + PCIE Combo PHY Driver due to
calling a sleeping function from invalid context
*) Fix WARN_ON dump on rcar-gen3-usb2 PHY driver caused due to
imbalance powered flag
*) Fix .cocci and sparse warnings
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Merge tag 'phy-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next
phy: for 5.3
*) Add a new PHY driver for Qualcomm PCIe2 PHY
*) Add a new PHY driver for Mixel DPHY present in i.MX8
*) Fix Qualcomm QMP UFS PHY driver from incorrectly reporting that
PHY enable failed
*) Fix _BUG_ on Amlogic G12A USB3 + PCIE Combo PHY Driver due to
calling a sleeping function from invalid context
*) Fix WARN_ON dump on rcar-gen3-usb2 PHY driver caused due to
imbalance powered flag
*) Fix .cocci and sparse warnings
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* tag 'phy-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy:
phy: qcom-qmp: Raise qcom_qmp_phy_enable() polling delay
phy: meson-g12a-usb3-pcie: disable locking for cr_regmap
phy: Add driver for mixel mipi dphy found on NXP's i.MX8 SoCs
dt-bindings: phy: Add documentation for mixel dphy
dt-bindings: phy-pxa-usb: add bindings
phy: renesas: rcar-gen3-usb2: fix imbalance powered flag
phy: qcom-qmp: Drop useless msm8998_pciephy_cfg setting
phy: qcom-qmp: Correct READY_STATUS poll break condition
phy: ti: am654-serdes: Make serdes_am654_xlate() static
phy: usb: phy-brcm-usb: Fix platform_no_drv_owner.cocci warnings
phy: samsung: Use struct_size() in devm_kzalloc()
phy: qcom: Add Qualcomm PCIe2 PHY driver
dt-bindings: phy: Add binding for Qualcomm PCIe2 PHY
This adds support for the Mixel DPHY as found on i.MX8 CPUs but since
this is an IP core it will likely be found on others in the future. So
instead of adding this to the nwl host driver make it a generic PHY
driver.
The driver supports the i.MX8MQ. Support for i.MX8QM and i.MX8QXP can be
added once the necessary system controller bits are in via
mixel_dphy_devdata.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Co-developed-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Add SPDX license identifiers to all Make/Kconfig files which:
- Have no license information of any form
These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:
GPL-2.0-only
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This adds support to the PHY driver to power up/down the VBUS
voltage rail at the appropriate times.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Since this is going to be used on more SoCs than just i.MX8MQ,
make the dependency here more generic.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This is a cleaned up port of the downstream i.MX8MQ USB3 PHY driver.
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
