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37 Commits

Author SHA1 Message Date
Jack Xiao
86ddf3529e drm/amdgpu/psp: add new psp interface for vcn updating sram 
PSP leverages the existing fw loading function for vcn updating sram.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-06-21 18:59:33 -05:00
Hawking Zhang
cc0beec2dd drm/amd/amdgpu: add flag to mark whether autoload is supported or not 
rlc autoload is supported since navi10

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-06-20 21:46:50 -05:00
Hawking Zhang
1a5b4cca29 drm/amdgpu/psp: start rlc autoload after psp recieved all gfx firmware 
RLC handles firmware loading for gfx to support vddgfx feature.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-06-20 21:46:50 -05:00
Hawking Zhang
93d8f2221b drm/amdgpu/psp: support init psp sos microcode with build-in toc 
psp_firmware_header_v1_1 is used for psp sos with build-in toc

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-06-20 21:46:49 -05:00
Hawking Zhang
7d0906e83a drm/amdgpu: add structure to support build-in toc to psp sos 
Table Of Content (TOC) is used by RLC to auto load gc firmwares.
PSP need to parse the toc to calculate the tmr size needed and
load gc firmwares to tmr for RLC to auto load them finally

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-06-20 21:46:49 -05:00
Trigger Huang
c5d19419ed drm/amdgpu: implement PSP cmd GFX_CMD_ID_PROG_REG 
Add implementation to program regs by PSP, currently the following
IH registers are supported:
	IH_RB_CNTL
	IH_RB_CNTL_RING1
	IH_RB_CNTL_RING2

Signed-off-by: Trigger Huang <Trigger.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-05-24 12:20:51 -05:00
shaoyunl
da361dd13f drm/amdgpu: Implement get num of hops between two xgmi device 
KFD need to provide the info for upper level to determine the data path

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-05-24 12:20:48 -05:00
xinhui pan
c030f2e416 drm/amdgpu: add amdgpu_ras.c to support ras (v2) 
add obj management.
add feature control.
add debugfs infrastructure.
add sysfs infrastructure.
add IH infrastructure.
add recovery infrastructure.

It is a framework. Other IPs need call amdgpu_ras_xxx function instead of
psp_ras_xxx functions.

v2: squash in warning fixes

Signed-off-by: xinhui pan <xinhui.pan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-03-19 15:36:50 -05:00
xinhui pan
5e5d315457 drm/amdgpu: add psp ras subsystem infrastructure (v2) 
Add ras fw loading, init, terminate.
Add ras cmd submit helper.
Add ras feature enable/disable common function.

v2: squash in unused variable warning fix

Signed-off-by: xinhui pan <xinhui.pan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-03-19 15:36:50 -05:00
xinhui pan
7da674535d drm/amdgpu: add psp ras callback func and macro 
Define the driver side interface for ras ta.

Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: xinhui pan <xinhui.pan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-03-19 15:36:50 -05:00
xinhui pan
c6eec90219 drm/amdgpu: add ta ras fw info (v2) 
Add ras fw part, xgmi and ras fw are combined together in ta binary.
Reading the data from the info is not implemented yet.

v2: squash in "drm/amdgpu: fix NULL pointer when ta is missing"

Signed-off-by: xinhui pan <xinhui.pan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-03-19 15:36:50 -05:00
Hawking Zhang
be4630d962 drm/amdgpu/psp: make get_fw_type and prep_cmd_buf to be common interfaces 
get_fw_type and prep_cmd_buf should be common interface
instead of IP specific ones

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-01-14 15:04:51 -05:00
Evan Quan
379c237e39 drm/amdgpu: correct the return value for error case 
It should not return 0 for error case as '0' is actually
a special value for index.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-12-18 17:39:18 -05:00
Emily Deng
e27a73d130 drm/amdgpu/psp: Correct and refine the vmr support. (v2) 
Currently driver only psp v11 support vmr.

v2: squash in unused variable removal (Alex)

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-12-14 12:04:39 -05:00
Xiangliang Yu
5ec996dfb6 drm/amdgpu/psp: Add support VMR ring for VF 
PSP only support VMR ring for SRIOV vf since v45 and all commands will
be send to VMR ring for executing.

VMR ring use C2PMSG 101 ~ 103 instead of C2PMSG 64 ~ 71.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-12-07 17:53:46 -05:00
Hawking Zhang
593caa07ad drm/amdgpu/psp: update topology info structures 
topology info structure needs to match with the one defined
in xgmi ta

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-11-06 14:02:45 -05:00
Hawking Zhang
dd3c45d306 drm/amdgpu/psp: add get_node_id function 
get_node_id function is used for driver to get node_id
for current device from xgmi ta

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-11-06 14:02:43 -05:00
Hawking Zhang
ca6e1e59a2 drm/amdgpu/psp: add helper function to invoke xgmi ta per ta cmd_id 
psp_xgmi_invoke is the helper function to issue ta cmd to firmware

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-11-06 14:02:42 -05:00
Hawking Zhang
f0cfa19579 drm/amdgpu/psp: add structure for xgmi ta and its shared buffer 
Add data structures for xgmi trusted application.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-11-06 14:02:39 -05:00
Hawking Zhang
0b25cbf9c2 drm/amdgpu/psp: avoid hard-code fence value pre submission 
Hard-code submission fence is not a sustainable way as there is
more and more run-time psp kernel mode submission from driver to
fw

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-11-05 14:21:09 -05:00
Shaoyun Liu
6449724058 drm/amdgpu : Add psp function interfaces for XGMI support 
Place holder for XGMI support

Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-09-10 22:47:35 -05:00
Feifei Xu
3082be1aea drm/amdgpu/psp: Enlarge PSP TMR SIZE from 3M to 4M. 
Enlarge the PSP TMR SIZE to 4M for dual UVD fw front-door loading.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-08-27 11:10:39 -05:00
Feifei Xu
654f761cfa drm/amdgpu: Add psp 11.0 support for vega20. (v2) 
Add psp 11.0 code for vega20 and enable it.  PSP is the
security processor for the GPU.  It handles firmware
loading and GPU resets among other things.

v2: whitespace fix, enable support, adjust reg includes (Alex)

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-08-27 11:10:34 -05:00
Huang Rui
6462c0071b drm/amdgpu: move psp macro into amdgpu_psp header 
Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-08-27 11:09:56 -05:00
Alex Deucher
f75a9a5d6c drm/amdgpu/soc15: don't abuse IP soft reset for adapter reset 
The IP soft reset interface is for per IP reset but it was
being abused for adapter reset on soc15 asics.  Adjust the
interface to make it explicit.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:31 -05:00
Alex Deucher
e7f9ccb437 drm/amdgpu/psp: use a function pointer structure 
This way we can make all of the IP specific functions static,
and we only need a single entry point into the PSP IP modules.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-02-19 14:18:31 -05:00
Ken Wang
98512bb8c2 drm/amdgpu: Add GPU reset functionality for Vega10 
V2

Signed-off-by: Ken Wang <Ken.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:06 -04:00
Evan Quan
bcd6eab837 drm/amdgpu: stop psp ring on suspend 
Otherwise, the ring will fail to create on next resume.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-12 14:30:21 -04:00
Evan Quan
4ef7245331 drm/amdgpu: added api for stopping psp ring (v2) 
- v2: reuse the ring stop api in ring destory

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-12 14:30:11 -04:00
Huang Rui
a1952da73f drm/amdgpu: make psp cmd buffer as a reserve memory 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-07-14 11:06:13 -04:00
Huang Rui
dfbd643861 drm/amdgpu: add psp v10 ip block 
Add the ip block version structure for psp 10.0.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:19 -04:00
Trigger Huang
e3c5e9826d drm/amdgpu: Destroy psp ring in hw_fini 
Fix issue that PSP initialization will fail if reload amdgpu module.
That's because the PSP ring must be destroyed to be ready for the
next time PSP initialization.

Changes in v2:
	- Move psp_ring_destroy before all BOs free (suggested by
	  Ray Huang).
Changes in v3:
	- Check firmware load type, if it is not PSP, we should do
	  nothing in fw_fini(), and of course will not destroy
	  PSP ring too (suggested by Ray Huang).

Signed-off-by: Trigger Huang <trigger.huang@amd.com>
Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-04-28 17:32:46 -04:00
Huang Rui
be70bbda3f drm/amdgpu: split psp ring init function 
Rework in order to properly support suspend.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-04-28 16:37:58 -04:00
Huang Rui
f5cfef98f7 drm/amdgpu: split psp asd function 
Rework in order to properly support suspend.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-04-28 16:37:58 -04:00
Huang Rui
2b0c3aee21 drm/amdgpu: use private memory to store psp firmware data 
Rework in order to properly support suspend.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-04-28 16:37:57 -04:00
Huang Rui
53a5cf57d8 drm/amdgpu: add psp firmware private memory 
Needed for proper suspend support.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-04-28 16:37:56 -04:00
Huang Rui
0e5ca0d1ac drm/amdgpu: add PSP driver for vega10 (v2) 
PSP is responsible for firmware loading on SOC-15 asics.

v2: fix memory leak (Ken)

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:54:48 -04:00