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3366 Commits

Author SHA1 Message Date
Dave Airlie
211b4dbc07 Merge tag 'drm-intel-gt-next-2021-12-09' of git://anongit.freedesktop.org/drm/drm-intel into drm-next 
Core Changes:

- Fix PENDING_ERROR leak in dma_fence_array_signaled() (Thomas Hellström)

Driver Changes:

- Fix runtime PM handling during PXP suspend (Tejas Upadhyay)
- Improve eviction performance on discrete by implementing async TTM moves (Thomas Hellström, Maarten Lankhorst)
- Improve robustness of error capture under memory pressure (Thomas Hellström)
- Fix GuC PMU versus GPU reset handling (Umesh Nerlige Ramappa)
- Use per device iommu check (Tvrtko Ursulin)
- Make error capture work with async migration (Thomas Hellström)
- Revert incorrect implementation of Wa_1508744258 causing hangs (José Roberto de Souza)
- Disable coarse power gating on some DG2 steppings workaround (Matt Roper)
- Add IC cache invalidation workaround on DG2 (Ramalingam C)
- Move two Icelake workarounds to the right place (Raviteja Goud Talla)
- Fix error pointer dereference in i915_gem_do_execbuffer() (Dan Carpenter)
- Fixup a couple of generic and DG2 specific issues in migration code (Matthew Auld)

- Fix kernel-doc warnings in i915_drm_object.c (Randy Dunlap)
- Drop stealing of bits from i915_sw_fence function pointer (Matthew Brost)
- Introduce new macros for i915 PTE (Michael Cheng)
- Prep work for engine reset by reset domain lookup (Tejas Upadhyay)

- Fixup drm-intel-gt-next build failure (Matthew Auld)
- Fix live_engine_busy_stats selftests in GuC mode (Umesh Nerlige Ramappa)
- Remove dma_resv_prune (Maarten Lankhorst)
- Preserve huge pages enablement after driver reload (Matthew Auld)
- Fix a NULL pointer dereference in igt_request_rewind() (selftests) (Zhou Qingyang)
- Add workaround numbers to GEN7_COMMON_SLICE_CHICKEN1 whitelisting (José Roberto de Souza)
- Increase timeouts in i915_gem_contexts selftests to handle GuC being slower (Bruce Chang)

Signed-off-by: Dave Airlie <airlied@redhat.com>

# Conflicts:
#	drivers/gpu/drm/i915/display/intel_fbc.c
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YbIBOeqhn+nPzaYD@tursulin-mobl2
 2021-12-10 15:35:20 +10:00
Hans de Goede
6306d8dbfa drm/i915: Add privacy-screen support (v3) 
Add support for eDP panels with a built-in privacy screen using the
new drm_privacy_screen class.

Changes in v3:
- Move drm_privacy_screen_get() call to intel_ddi_init_dp_connector()

Changes in v2:
- Call drm_connector_update_privacy_screen() from
  intel_enable_ddi_dp() / intel_ddi_update_pipe_dp() instead of adding a
  for_each_new_connector_in_state() loop to intel_atomic_commit_tail()
- Move the probe-deferral check to the intel_modeset_probe_defer() helper

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211005202322.700909-11-hdegoede@redhat.com
 2021-12-09 16:09:46 +01:00
Hans de Goede
94b541f53d drm/i915: Add intel_modeset_probe_defer() helper 
The upcoming privacy-screen support adds another check for
deferring probe till some other drivers have bound first.

Factor out the current vga_switcheroo_client_probe_defer() check
into an intel_modeset_probe_defer() helper, so that further
probe-deferral checks can be added there.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211005202322.700909-10-hdegoede@redhat.com
 2021-12-09 16:09:35 +01:00
Ville Syrjälä
7d41745acf drm/i915: s/intel_get_first_crtc/intel_first_crtc/ 
Since we got rid of the "_get_" from intel_get_crtc_for_pipe()
let's do the same for intel_get_first_crtc() for consistency.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211203112029.1057-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2021-12-09 16:18:30 +02:00
Ville Syrjälä
927167f37f drm/i915: Relocate intel_crtc_for_plane() 
Move intel_crtc_for_plane() next to its only user. No one
else should ever use this.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211203112029.1057-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2021-12-09 16:18:30 +02:00
Ville Syrjälä
cbb8a79571 drm/i915: Nuke {pipe,plane}_to_crtc_mapping[] 
These plane/pipe->crtc mapping arrays are rather pointless.
Get rid of them and just iterate the lists instead.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211203112029.1057-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2021-12-09 16:18:30 +02:00
Jani Nikula
01dd1fa26b Merge drm/drm-next into drm-intel-next 
Get the dependencies for merging drm-privacy-screen support.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2021-12-09 15:58:34 +02:00
Jani Nikula
fd2b94a5cb drm/i915/trace: split out display trace to a separate file 
Add display/intel_display_trace.[ch] for defining display
tracepoints. The main goal is to reduce cross-includes between gem and
display. It would be possible split up tracing even further, but that
would lead to more boilerplate.

We end up having to include intel_crtc.h in a few places because it was
pulled in implicitly via intel_de.h -> i915_trace.h -> intel_crtc.h, and
that's no longer the case.

There should be no changes to tracepoints.

v3:
- Rebase

v2:
- Define TRACE_INCLUDE_PATH relative to define_trace.h (Chris)
- Remove useless comments (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7862ad764fbd0748d903c76bc632d3d277874e5b.1638961423.git.jani.nikula@intel.com
 2021-12-09 11:21:46 +02:00
Madhumitha Tolakanahalli Pradeep
e08a7d5611 drm/i915/dmc: Update DMC to v2.14 on ADL-P 
Changes since v2.12:
  - Release notes for v2.13:
      1. Fix for simple flip queue with DC6v
  - Release notes for v2.14:
      1. Fix for flip queue roll over cases with DC6v
      2. Enhancement for residency
      3. Workaround for 3Dlut restore issue

v2: Commit message update (Imre)

Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211208213115.1919503-1-lucas.demarchi@intel.com
 2021-12-08 16:13:57 -08:00
Ville Syrjälä
d4a2393049 drm/i915: Allow cdclk squasher to be reconfigured live 
Supposedly we should be able to change the cdclk squasher waveform
even when many pipes are active. Make it so.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211119131348.725220-6-mika.kahola@intel.com
 2021-12-07 16:54:07 +02:00
Mika Kahola
77ab3a1ecb drm/i915/display/dg2: Read CD clock from squasher table 
To calculate CD clock with squasher unit, we set CD clock ratio to fixed value of 34.
The CD clock value is read from CD clock squasher table.

BSpec: 54034

v2: Read ratio from register (Ville)
    Drop unnecessary local variable (Ville)
    Get CD clock from the given table
v3: Calculate CD clock frequency based on waveform bit pattern (Ville)
[v4: vsyrjala: Actually do a proper blind readout from the hardware]
[v5: vsyrjala: Use has_cdclk_squasher()]

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211119131348.725220-5-mika.kahola@intel.com
 2021-12-07 16:54:06 +02:00
Mika Kahola
2060a6895b drm/i915/display/dg2: Set CD clock squashing registers 
Set CD clock squashing registers based on selected CD clock.

v2: use slk_cdclk_decimal() to compute decimal values instead of a
    specific table (Ville)
    Set waveform based on CD clock table (Ville)
    Drop unnecessary local variable (Ville)
v3: Correct function naming (Ville)
    Correct if-else structure (Ville)
[v4: vsyrjala: Fix spaces vs. tabs]
[v5: vsyrjala: Fix cd2x divider calculation (Uma),
               Add warn to waveform lookup (Uma),
               Handle bypass freq in waveform lookup,
               Generalize waveform handling in bxt_set_cdclk()]

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211119131348.725220-4-mika.kahola@intel.com
 2021-12-07 16:54:05 +02:00
Mika Kahola
ba884a4117 drm/i915/display/dg2: Sanitize CD clock 
In case of CD clock squashing the divider is always 1. We don't
need to calculate the divider in use so let's skip that for DG2.

v2: Drop unnecessary local variable (Ville)
v3: Avoid if-else structure (Ville)
[v4: vsyrjala: Fix cd2x divider calculation (Uma),
               Introduce has_cdclk_squasher()]

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211119131348.725220-3-mika.kahola@intel.com
 2021-12-07 16:54:05 +02:00
Mika Kahola
2fb352fa62 drm/i915/display/dg2: Introduce CD clock squashing table 
For CD clock squashing method, we need to define corresponding CD clock table for
reference clocks, dividers and ratios for all CD clock options.

BSpec: 54034

v2: Add CD squashing waveforms as part of CD clock table (Ville)
v3: Waveform is 16 bits wide (Ville)
[v4: vsyrjala: Nuke the non-squasher based table,
               Set .divider=2 for consistency,
	       Pack intel_cdclk_vals a bit nicer]
v5: Fix error in waveform value (Swati)
v6 (Lucas): Rebase on upstream
v7 (MattR): Drop 40.8, 81.6, and 122.4 MHz frequencies to reflect new
    bspec update.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211119131348.725220-2-mika.kahola@intel.com
 2021-12-07 16:54:03 +02:00
Jani Nikula
fbf8b5dc6d drm/i915/ddi: add use_edp_hobl() and use_edp_low_vswing() helpers 
Localize HOBL and low vswing VBT lookups to a couple of small helpers,
and get rid of a bunch of local variables.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211203131318.2885969-1-jani.nikula@intel.com
 2021-12-07 10:59:22 +02:00
Jani Nikula
61b98486e4 drm/i915/snps: use div32 version of MPLLB word clock for UHBR 
The mode set sequence for 128b/132b requires setting the div32 version
of MPLLB clock.

Bspec: 53880, 54128
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211202144456.2541305-1-jani.nikula@intel.com
 2021-12-07 10:41:07 +02:00
Uma Shankar
17815f624a drm/i915/xelpd: Enable Pipe Degamma 
Enable Pipe Degamma for XE_LPD. Extend the legacy implementation
to incorparate the extended lut size for XE_LPD.

v2: Added a helper for degamma lut size (Ville)

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211207071135.3660332-3-uma.shankar@intel.com
 2021-12-07 12:50:31 +05:30
Uma Shankar
e83c18cffa drm/i915/xelpd: Enable Pipe color support for D13 platform 
Enable pipe color support for Display 13 platforms. Currently
limit to just 10bit gamma and later extend it for logarithmic
gamma, once the new UAPI is agreed by community and implemented
by a userspace consumer.

v2: Updated dev_priv to i915 (Ville)

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211207071135.3660332-2-uma.shankar@intel.com
 2021-12-07 12:50:30 +05:30
Madhumitha Tolakanahalli Pradeep
5d50c8d7ed drm/i915/dmc: Change max DMC FW size on ADL-P 
Increase the max size of DMC on ADL-P to account for support of new
features in the current/upcoming DMC versions.

Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211207023718.322349-1-madhumitha.tolakanahalli.pradeep@intel.com
 2021-12-06 23:05:45 -08:00
Tejas Upadhyay
af10ec31a8 drm/i915/adl_p: Add ddc pin mapping 
From VBT, ddc pin info suggests the following mapping:
    VBT                                    DRIVER
    DDI TC1->ddc_pin=3 should translate to PORT_TC1->0x9
    DDI TC2->ddc_pin=4 should translate to PORT_TC2->0xa
    DDI TC3->ddc_pin=5 should translate to PORT_TC3->0xb
    DDI TC4->ddc_pin=6 should translate to PORT_TC4->0xc

Adding pin map to facilitate this translation as we cannot use existing
icl ddc pin map due to conflict with DDI C and DDI TC1 info.

Bspec:20124

v2:
  - Changed Author to Tejas Upadhyay

Cc: Clinton Taylor <Clinton.A.Taylor@intel.com>
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Acked-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Signed-off-by: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211203073720.3823371-1-ravitejax.goud.talla@intel.com
 2021-12-03 10:21:36 -08:00
Ville Syrjälä
b1e4747259 drm/i915: Get rid of the "sizes are 0 based" stuff 
Replace the "sizes are 0 based" stuff with just straight
up -1 where needed. Less confusing all around.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-4-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
 2021-12-03 19:18:53 +02:00
Ville Syrjälä
812e338619 drm/i915/fbc: Pimp the FBC debugfs output 
Now that each plane tracks its own no_fbc_reason we can print that
out in debugfs, and we can also show which plane is currently
selected for FBC duty.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-21-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2021-12-03 19:15:01 +02:00
Ville Syrjälä
d5ba72f3c1 drm/i915/fbc: No FBC+double wide pipe 
FBC and double wide pipe are mutually exclusive. Disable FBC when
we have to resort to double wide.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-20-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 13:26:36 +02:00
Ville Syrjälä
d3e27f7c51 drm/i915/fbc: s/parms/fbc_state/ 
Rename the 'params' to just fbc state.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-19-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 13:26:25 +02:00
Ville Syrjälä
0cb9f228bc drm/i915/fbc: Move plane pointer into intel_fbc_state 
Currently we track the FBC plane as a pointer under intel_fbc
and also as a i9xx_plane_id under intel_fbc_state. Just store
the pointer once in the fbc state.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-18-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 13:25:21 +02:00
Ville Syrjälä
f4cfdbb02c drm/i915/fbc: Nuke state_cache 
fbc->state_cache has now become useless. We can simply update
the reg params directly from the plane/crtc states during
__intel_fbc_enable().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-17-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 13:23:47 +02:00
Ville Syrjälä
b156def991 drm/i915/fbc: Disable FBC fully on FIFO underrun 
Currently a FIFO underrun just causes FBC to be deactivated,
and later checks then prevent it from being reactivated. We
can simpify our lives a bit by logically disabling FBC on
FIFO underruns. This avoids the funny intermediate state where
FBC is logically enabled but can't actually be activated.

v2: intel_wait_for_vblank() is no more

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-16-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 13:23:38 +02:00
Ville Syrjälä
98009fd73b drm/i915/fbc: Move stuff from intel_fbc_can_enable() into intel_fbc_check_plane() 
Don't really see a good reason why we can't just do the vgpu and
modparam checks already in intel_fbc_check_plane().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-15-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 13:16:01 +02:00
Ville Syrjälä
606754fdcb drm/i915/fbc: Allocate intel_fbc dynamically 
In the future we may have more than one FBC instance on some
platforms. So let's just allocate it dynamically. This also
lets us fully hide the implementation from prying eyes.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-14-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 13:13:21 +02:00
Ville Syrjälä
825bd8335e drm/i915/fbc: Introduce intel_fbc_add_plane() 
In order to better encapsulate the FBC implementation
introduce a small helper to do the plane<->FBC instance
association.

We'll also try to structure the plane init code such
that introducing multiple FBC instances will be easier
down the line.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-13-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 13:13:04 +02:00
Ville Syrjälä
d2de8ccfb2 drm/i915/fbc: Move FBC debugfs stuff into intel_fbc.c 
In order to encapsulate FBC harder let's just move the debugfs
stuff into intel_fbc.c.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-12-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula <jani.nikula@intel.com>
 2021-12-03 13:12:47 +02:00
Ville Syrjälä
32024bb85e drm/i915/fbc: Pass i915 instead of FBC instance to FBC underrun stuff 
The underrun code doesn't need to know any details about FBC, so
just pass in the whole device rather than a specific FBC instance.
We could make this a bit more fine grained by also passing in the
pipe to intel_fbc_handle_fifo_underrun_irq() and letting the FBC
code figure which FBC instance (if any) is active on said pipe.
But that seems a bit overkill for this so don't bother.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-11-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 13:12:30 +02:00
Ville Syrjälä
62d4874bee drm/i915/fbc: Flatten __intel_fbc_pre_update() 
Use an early return to flatten most of __intel_fbc_pre_update().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-10-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 13:12:19 +02:00
Ville Syrjälä
004f80f91a drm/i915/fbc: Track FBC usage per-plane 
In the future we may have multiple planes on the same pipe
capable of using FBC. Prepare for that by tracking FBC usage
per-plane rather than per-crtc.

v2: s/intel_get_crtc_for_pipe/intel_crtc_for_pipe/

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-9-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 13:12:06 +02:00
Ville Syrjälä
6e4d2e45ef drm/i915/fbc: Pass around FBC instance instead of crtc 
Pass the FBC instance instead of the crtc to a bunch of places.

We also adjust intel_fbc_post_update() to do the
intel_fbc_get_reg_params() things instead of doing it from the lower
level function (which also gets called for front buffer tracking).
Nothing in there will change during front buffer updates.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-8-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 12:50:16 +02:00
Ville Syrjälä
e1521cbd27 drm/i915/fbc: Reuse the same struct for the cache and params 
The FBC state cache and params are now nearly identical. Just
use the same structure for both.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-7-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 12:50:05 +02:00
Ville Syrjälä
873c995a40 drm/i915/fbc: Nuke more FBC state 
There isn't a good reason why we'd have to cache all this
plane state stuff in the FBC state. Instead we can just
pre-calculate what FBC will really need.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-6-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 12:49:54 +02:00
Ville Syrjälä
266790871e drm/i915/fbc: Relocate intel_fbc_override_cfb_stride() 
Move intel_fbc_override_cfb_stride() next to its cousins.
Helps with later patches.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-5-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 12:49:43 +02:00
Ville Syrjälä
2e6c99f886 drm/i915/fbc: Nuke lots of crap from intel_fbc_state_cache 
There's no need to store all this stuff in intel_fbc_state_cache.
Just check it all against the plane/crtc states and store only
what we need. Probably more should get nuked still, but this
is a start.

So what we'll do is:
- each plane will check its own state and update its local
  no_fbc_reason
- the per-plane no_fbc_reason (if any) then gets propagated
  to the cache->no_fbc_reason while doing the actual update
- fbc->no_fbc_reason gets updated in the end with either
  the value from the cache or directly from frontbuffer
  tracking

It's still a bit messy, but should hopefuly get cleaned up
more in the future. At least now we can observe each plane's
reasons for rejecting FBC now more consistently, and we don't
have so mcuh redundant state store all over the place.

v2: store no_fbc_reason per-plane instead of per-pipe

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-4-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 12:49:33 +02:00
Ville Syrjälä
b6e201f5f1 drm/i915/fbc: Pass whole plane state to intel_fbc_min_limit() 
No reason to burden the caller with the details on how the minimum
compression limit is calculated, so just pass in the whole plane
state instead of just the cpp value.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-3-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
 2021-12-03 12:49:23 +02:00
Ville Syrjälä
d96c5ed0e3 drm/i915: Rename PLANE_CUS_CTL Y plane bits 
Rename the PLANE_CUS_CTL Y plane selection bits to actually
say "Y plane".

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-6-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
 2021-12-03 12:49:02 +02:00
Ville Syrjälä
62f887ae46 drm/i915: Rename plane YUV order bits 
Rename the YUV byte order bits to be a bit more consistent.

v2: Deal with gvt

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-3-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
 2021-12-03 12:49:02 +02:00
Ville Syrjälä
f84b336a2f drm/i915: Get rid of the 64bit PLANE_CC_VAL mmio 
Let's just stick to 32bit mmio accesses so we can get rid
of the bare "uncore" reg access in display code. The register
are defined as 32bit in the spec anyway.

We could define a 64bit "de" variant I suppose, but doesn't
really make much sense just for this one case, and when we
start to use the DSB for this stuff we'd also need another
64bit variant for that. Just easier to do 32bit always.

While at it we can reorder stuff a bit so that we write the
registers in order of increasing offset (more or less).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-2-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
 2021-12-03 12:49:02 +02:00
Jani Nikula
15162c5a36 drm/i915/display: stop including i915_drv.h from intel_display_types.h 
Break the dependency on i915_drv.h.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ee740f494e416d875e057c2eda585f4e66d65500.1638366969.git.jani.nikula@intel.com
 2021-12-03 11:46:33 +02:00
Jani Nikula
726a2d779f drm/i915/display: convert dp_to_i915() to a macro 
Avoid looking into the guts of struct drm_i915_private in
headers. Again, converting an inline function to a macro is less than
ideal, but avoids having to pull in i915_drv.h just for the to_i915()
part.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ed6c43455d13c90ebfed442b196625af5e6ede88.1638366969.git.jani.nikula@intel.com
 2021-12-03 11:39:14 +02:00
Jani Nikula
5734c1774d drm/i915: move enum hpd_pin to intel_display.h 
It's not the ideal location, but a better alternative than
i915_drv.h. The goal is to break the intel_display_types.h to i915_drv.h
dependency.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/9f882eff78cdc6b28c18e73f5e53f57e413240dc.1638366969.git.jani.nikula@intel.com
 2021-12-03 11:33:37 +02:00
Jani Nikula
f83974a408 drm/i915: split out intel_pm_types.h 
This is far from ideal, but it reduces the i915_drv.h dependency from
intel_display_types.h. Maybe in the future we'll need a better split.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c6c60d9a8f6dcd1fa2f4b187000c5bb6843a1371.1638366969.git.jani.nikula@intel.com
 2021-12-03 11:28:12 +02:00
Jani Nikula
1538f65f18 drm/i915/fb: move intel_fb_uses_dpt to intel_fb.c and un-inline 
Move fb functions where they belong, and un-inline to avoid looking into
struct drm_i915_private guts in header files.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/4aa89f113ce6d840d62f50c989e2a1415483557c.1638366969.git.jani.nikula@intel.com
 2021-12-03 11:23:15 +02:00
Jani Nikula
92e9624ad9 drm/i915/crtc: un-inline some crtc functions and move to intel_crtc.[ch] 
Move a number of crtc/pipe related functions to intel_crtc.[ch], and
un-inline to avoid looking into struct drm_i915_private guts in header
files.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c0be2adc4a7f7e72a47e12a57f742aaa42b813e6.1638366969.git.jani.nikula@intel.com
 2021-12-03 11:09:41 +02:00
Matt Roper
7cbea1b617 drm/i915/dg2: Add Wa_14010547955 
This workaround is documented a bit strangely in the bspec; it's listed
as an A0 workaround, but the description clarifies that the workaround
is implicitly handled by the hardware and what the driver really needs
to do is program a chicken bit to reenable some internal behavior.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211116174818.2128062-3-matthew.d.roper@intel.com
 2021-12-02 21:40:26 -08:00