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299 Commits

Author SHA1 Message Date
Alan Liu
6880ed280e drm/amd/display: Add HDMI_ACP_SEND register 
Define HDMI_ACP_SEND register shift/mask.

Signed-off-by: Alan Liu <HaoPing.Liu@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-26 14:56:32 -04:00
Hawking Zhang
81570d6dc2 drm/amdgpu: add lsdma v6_0_0 ip headers 
Add lsdma v6_0_0 register offset and shift masks
header files

v2: squash in updates (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-10 17:53:11 -04:00
Andrey Grodzovsky
bce04f216d drm/amd/psp: Add C2P registers to mp_13_0_2 header 
Add additional registers.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-06 16:58:10 -04:00
Huang Rui
c4d1c905ba drm/amdgpu: add hdp v5_2_1 ip headers 
Add hdp v5.2.1 offset and shift mask ip header files.

v2: squash in updates (Alex)

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-06 10:36:13 -04:00
Huang Rui
4debe75395 drm/amdgpu: add nbio v7_7_0 ip headers 
Add nbio v7.7.0 offset and shift mask ip header files.

v2: squash in updates (Alex)

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-06 10:36:13 -04:00
Hawking Zhang
fd1e77d915 drm/amdgpu: add mmhub v3_0_2 ip headers 
Add mmhub v3_0_2 register offset and shift masks

v2: update to latest headers

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-05 16:51:45 -04:00
Leo Liu
ed1db32e33 drm/amdgpu: add vcn 4_0_0 header files v7 
Add VCN 4.0.0 registers

Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-04 10:43:55 -04:00
Hawking Zhang
9f99d98305 drm/amdgpu: add mmhub v3_0_0 ip headers v6 
Add mmhub v3_0_0 register offset and shift masks
header files (Hawking)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-04 09:57:16 -04:00
Hawking Zhang
f41c963972 drm/amdgpu: add athub v3_0_0 ip headers v6 
Add athub v3_0_0 register offset and shift masks
header files (Hawking)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-04 09:57:06 -04:00
Hawking Zhang
55437d3bf4 drm/amdgpu: add smuio v13_0_6 ip headers v4 
Add smuio v13_0_6 register offset and shift masks
header files (Hawking)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-04 09:54:35 -04:00
Hawking Zhang
11c4328a82 drm/amdgpu: add hdp v6_0_0 ip headers v4 
Add hdp v6_0_0 register offset and shift masks
header files (Hawking)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-04 09:53:34 -04:00
Hawking Zhang
d71093aa15 drm/amdgpu: add osssys v6_0_0 ip headers v4 
Add osssys v6_0_0 register offset and shift masks
header files (Hawking)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-04 09:52:56 -04:00
Hawking Zhang
e19920c6a0 drm/amdgpu: add nbio v4_3_0 ip headers v6 
Add nbio v4_3_0 register offset and shift masks
header files (Hawking)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-04 09:52:41 -04:00
Hawking Zhang
f33ac92f9c drm/amdgpu: add gc v11_0_0 ip headers v11 
Add gc v11_0_0 register offset and shift masks
header files (Hawking)

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-04-28 17:48:28 -04:00
Hawking Zhang
85a41b429d drm/amdgpu: add mp v13_0_0 ip headers v7 
Add mp v13_0_0 register offset and shift masks
header files (Hawking)

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-04-28 17:48:25 -04:00
Mohammad Zafar Ziya
f0a339a8c0 drm/amdgpu/vcn: Add vcn and jpeg ver 2.6 ras register definition 
Adding vcn and jpeg ver 2.6 ras register definition

Signed-off-by: Mohammad Zafar Ziya <Mohammadzafar.ziya@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-03-28 12:54:39 -04:00
Xiaogang Chen
45f0ff404c drm/amdgpu: config HDP_MISC_CNTL.READ_BUFFER_WATERMARK 
To fix applications running across multiple GPU config hang.

Signed-off-by: Xiaogang Chen <xiaogang.chen@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-24 17:24:43 -05:00
Qingqing Zhuo
5b723b1230 drm/amd/include: add DCN 3.1.5 registers 
Add DCN 3.1.5 and DPCS 4.2.2 register headers.

Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Change-Id: I5588a1c422ae384cc76aa42380545dfc1aad1948
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-18 14:07:00 -05:00
Yifan Zhang
62640f251f drm/amdgpu: add mp 13.0.5 header files 
This patch is to add mp 13.0.5 header files.

v2: update headers

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-18 14:07:00 -05:00
Leo Li
f3f6eff85f drm/amd/include: Add MP 13.0.8 register headers 
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-17 15:45:07 -05:00
Leo Li
64b14a184e drm/amd/include: Add register headers for DCN 3.1.6 
Add register headers for the following IPs:
- DCN 3.1.6
- DPCS 4.2.3

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-17 15:44:45 -05:00
Stanley.Yang
1ec1944eb5 drm/amdgpu: print more error info 
print more error info when deferred uncorrectable ras error

changed from V1:
    move Defferred error msg into query uncorrectable error
    count function.

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-14 15:08:41 -05:00
Alex Deucher
4a5dc6c73d drm/amdgpu: move dpcs_3_0_3 headers from dcn to dpcs 
To align with other headers.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-07 18:03:50 -05:00
Alex Deucher
68550cbc61 drm/amdgpu: move dpcs_3_0_0 headers from dcn to dpcs 
To align with other headers.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-07 18:03:50 -05:00
Alex Deucher
120cc6e67a drm/amdgpu: add missing license to dpcs_3_0_0 headers 
MIT.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-02-07 18:03:50 -05:00
Alex Deucher
109a357f28 drm/amdgpu: clean up some leftovers from bring up 
Some old registers leftover from pre-silicon.  No longer
relevant on real hardware.  Remove.

Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-12-16 14:08:20 -05:00
Andrey Grodzovsky
db5b5c679e drm/amd/pm: Add STB support in sienna_cichlid 
Add STB implementation for sienna_cichlid

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-11-22 14:58:54 -05:00
Jake Wang
e7414a1a18 drm/amd/display: Disable hdmistream and hdmichar clocks 
[Why & How]
Disable hdmistream and hdmichar root clocks when not being used.

Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Jake Wang <haonan.wang2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-10-19 17:20:28 -04:00
Zhan Liu
0ad53fe3ae drm/amdgpu: add cyan_skillfish asic header files 
This patch is to add cyan_skillfish asic header files.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Zhan Liu <zhan.liu@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Jun Lei <jun.lei@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-09-29 17:30:00 -04:00
Tom St Denis
ce9c1d8c71 drm/amd/amdgpu: Add missing mp_11_0_8_sh_mask.h header 
The commit 2766534b76 added the offset
header but didn't add the masks.  This adds the masks based on what
was selected for the offsets.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-09-29 17:30:00 -04:00
Tao Zhou
ca5c636dc6 drm/amdgpu: add poison mode query for DF (v2) 
Add ras poison mode query interface for DF.

v2: replace RREG32_PCIE with RREG32_SOC15.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-09-28 09:30:06 -04:00
Liu, Zhan
bdd1a21b52 drm/amd/display: Fix B0 USB-C DP Alt mode 
[Why]
Starting from B0, along with RDPCSTX, RDPCSPIPE registers are also used.

[How]
Make sure RDPCSPIPE registers are programmed correctly.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Zhan Liu <Zhan.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-09-23 15:17:30 -04:00
Evan Quan
d9ca7567b8 drm/amd/pm: correct the fan speed RPM retrieving 
The relationship "PWM = RPM / smu->fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, we need a new way to
retrieving the fan speed RPM.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-08-16 15:35:56 -04:00
Evan Quan
fb1f667e71 drm/amd/pm: correct the fan speed PWM retrieving 
The relationship "PWM = RPM / smu->fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, we need a new way to
retrieving the fan speed PWM.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-08-16 15:35:56 -04:00
Tom St Denis
d2a266fad5 drm/amd/amdgpu: add regCP_MEx_INT_STAT_DEBUG for Aldebaran debugging 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-08-05 21:17:59 -04:00
Lang Yu
2766534b76 drm/amdgpu: add mp 11.0.8 header for cyan_skillfish 
The cyan_skillfish will use the mp 11.0.8.

Signed-off-by: Lang Yu <lang.yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-07-23 10:08:01 -04:00
Xiaomeng Hou
dde5864539 drm/amd/pm: drop smu_v13_0_1.c|h files for yellow carp 
Since there's nothing special in smu implementation for yellow carp,
it's better to reuse the common smu_v13_0 interfaces and drop the
specific smu_v13_0_1.c|h files.

v2: remove the duplicate register offset and shift mask header files as
well.

Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-07-08 17:47:28 -04:00
Chun-Liang Chang
556a979d3c drm/amd/display: DMUB Outbound Interrupt Process-X86 
[Why]
dmub would notify x86 response time violation by GPINT_DATAOUT

[How]
1. Use GPINT_DATAOUT to trigger x86 interrupt
2. Register GPINT_DATAOUT interrupt handler.
3. Trigger ACR while GPINT_DATAOUT occurred.

Signed-off-by: Chun-Liang Chang <Chun-Liang.Chang@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-07-08 15:14:36 -04:00
Alex Deucher
0677e42256 drm/amdgpu: add license to umc_8_7_0_sh_mask.h 
Was missing. Add it.

Fixes: 6b36fa6143 ("drm/amdgpu: add umc v8_7_0 IP headers")
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-07-01 00:25:33 -04:00
Lukas Bulwahn
c11ffa54be drm/amdgpu: rectify line endings in umc v8_7_0 IP headers 
Commit 6b36fa6143 ("drm/amdgpu: add umc v8_7_0 IP headers") adds the new
file ./drivers/gpu/drm/amd/include/asic_reg/umc/umc_8_7_0_sh_mask.h with
DOS line endings, which is very uncommon for the kernel repository.

Rectify the line endings in this file with dos2unix.

Identified by a checkpatch evaluation on the whole kernel repository and
spot-checking for really unexpected checkpatch rule violations.

Reported-by: Dwaipayan Ray <dwaipayanray1@gmail.com>
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-07-01 00:25:33 -04:00
Wesley Chalmers
a659f2fdf8 drm/amd/display: Add interface to get Calibrated Avg Level from FIFO 
[WHY]
Hardware has handed down a new sequence requiring the value of this
register be read from clk_mgr.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-06-15 17:25:41 -04:00
Aaron Liu
02680c23d7 drm/amdgpu: add yellow carp asic header files (v3) 
This patch is to add yellow carp asic header files.

v2: squash in updates (Alex)
v3: squash in DCN updates (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-06-04 16:03:05 -04:00
Mukul Joshi
1f6256590c drm/amdgpu: Query correct register for DF hashing on Aldebaran 
For Aldebaran, driver needs to query DramMegaBaseAddress to
check if DF hashing is enabled.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:44:19 -04:00
Aurabindo Pillai
015b448985 drm/amd/display: Edit license info for beige goby DC files 
[How]
* Add MIT license to all new files as SPDX tag.
* Fix copyright year

Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:42:04 -04:00
Aurabindo Pillai
8198ace7a0 drm/amd/display: Add register definitions for Beige Goby 
[Why&How]
Adds registers definitions required for Beige Goby initial support.

Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Chris Park <Chris.Park@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-19 22:41:55 -04:00
Mukul Joshi
da6b993717 drm/amdgpu: Enable TCP channel hashing for Aldebaran 
Enable TCP channel hashing to match DF hash settings for Aldebaran.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Joseph Greathouse <Joseph.Greathouse@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-05-10 18:07:20 -04:00
Hawking Zhang
53ee6609b4 drm/amdgpu: only harvest gcea/mmea error status in arcturus 
SDP RdRspStatus/WrRspStatus or first parity error on
RdRsp data can cause system fatal error in arcturus.
GPU will be freezed in such case.

Driver needs to harvest these error information before
reset the GPU. Check error type to avoid harvest normal
gcea/mmea information.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Stanley Yang <Stanley.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-04-20 21:35:45 -04:00
Tom St Denis
53df89ddc0 drm/amd/amdgpu: Add CP_IB1_BASE_* to gc_10_3_0 headers 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-04-09 16:46:59 -04:00
Hawking Zhang
b77a9fdf52 drm/amdgpu: add vcn v2_6_0 ip headers (v3) 
v1: Add vcn v2_6_0 register offset and
shift masks in header files (Hawking)
v2: Clean up vcn v2_6_0 registers (Alex)
v3: update registers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-03-10 00:01:20 -05:00
Hawking Zhang
b28f2165d0 drm/amdgpu: add umc v6_7_0 ip headers (v3) 
v1: Add umc v6_7_0 register offset and shift masks
in header files (Hawking)
v2: Clean up registers (Alex)
v3: update registers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2021-03-10 00:01:18 -05:00