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6920 Commits

Author SHA1 Message Date
Harry Wentland
a6114e854c drm/amd/display: Fix some more color indentations 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:31 -05:00
Harry Wentland
efd5220405 drm/amd/display: Bunch of indentation cleanups in color stuff 
Trying to align with kernel coding style and make it a bit more
readable.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:30 -05:00
Yongqiang Sun
e6c258cb4e drm/amd/display: Refactor disable front end pipes. 
There are different code to disable front end, it is
difficult to debug and adding new process.
This refactor makes all disable front end call the same
functions.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:30 -05:00
Tony Cheng
46f6b85cff drm/amd/display: dal 3.1.14 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:30 -05:00
Yue Hin Lau
5fa2ec4fad drm/amd/display: renaming dpp function to follow naming convention 
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Yuehin Lau <Yuehin.Lau@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:29 -05:00
Tony Cheng
37cf55bad9 drm/amd/display: dal 3.1.13 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:29 -05:00
Yue Hin Lau
ea826d640d drm/amd/display: call set csc_default if enable adjustment is false 
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:29 -05:00
Eric Bernstein
6d56c57332 drm/amd/display: Add OPP DPG blank function 
Added a function to blank data using OPP DPG.
Clean up code to prepare for pseudocode review with HW.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:28 -05:00
Tony Cheng
63340ae9a6 drm/amd/display: dal 3.1.12 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:28 -05:00
Dmytro Laktyushkin
6334ac93a1 drm/amd/display: cache pwl params and scl_data to avoid extra programming 
This saves us about 5000 reg writes per full update. This translates to about
40000 writes over the course of single eDP bootup.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:28 -05:00
Andrew Jiang
069d418f41 drm/amd/display: Don't use dc_link in link_encoder 
dc_link is at a higher level than link_encoder, and we only want
higher-level components to be able to access lower-level ones,
not the other way around.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:27 -05:00
Harry Wentland
83c3e57bc4 drm/amd/display: Both timing_sync and multisync need stream_count > 1 
Previous code threw a warning about misleading indentation

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Mikita Lipski <Mikita.Lipski@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:27 -05:00
Yongqiang Sun
073a45e824 drm/amd/display: Add tg_init interface. 
Clear OPTC underflow status when init_hw.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:26 -05:00
Yongqiang Sun
3861421252 drm/amd/display: Enalbe blank data double buffer after mpc disconnected. 
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:26 -05:00
Eric Yang
7d8d90d84f drm/amd/display: get remote dpcd caps for timing validation 
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:26 -05:00
Yue Hin Lau
8a4cf458a8 drm/amd/display: Only update dchub if hubbub is available 
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:25 -05:00
Eric Bernstein
bc71a20db2 drm/amd/display: Call ipp_program_bias_and_scale only if available 
Also move some register definitions to common DCN regs.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:25 -05:00
Tony Cheng
f4dd6dca57 drm/amd/display: dal 3.1.11 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:25 -05:00
Yue Hin Lau
e70fe3b1f0 drm/amd/display: hubbub function flipping true and false 
no logic change

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:24 -05:00
Charlene Liu
c2a5b5008a drm/amd/display: Do post_update_surfaces on new state 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:24 -05:00
Yue Hin Lau
ea00f2979b drm/amd/display: function renaming for hubbub 
following the naming convention with correct prefix

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:24 -05:00
Yue Hin Lau
afa9104b04 drm/amd/display: create new function prototype update_dchub for dcn 
dcn version of update_dchub now uses hubbub instead of hwseq

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:23 -05:00
Mikita Lipski
fa2123dbcc drm/amd/display: Multi display synchronization logic 
This feature synchronizes multiple displays with various timings
to a display with the highest refresh rate
it is enabled if edid caps flag multi_display_sync is set to one

There are limitations on refresh rates allowed
that can be synchronized. That would
prevent from underflow and other potential
corruptions.

Multi display synchronization is using the
same functions as timing_sync in order to minimize
redunduncy and decision to disable synchronization is
based on trigger parametre set in DM

Feature is developed for DCN1 and DCE11

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Mikita Lipski <Mikita.Lipski@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:22 -05:00
Harry Wentland
baef9a196f amdgpu/dm: Remove fb_location form fill_plane_attributes 
We no longer set the framebuffer address here so this is now
dead code.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:46 -05:00
Michel Dänzer
9817d5f52d drm/amd/display: Remove fb_location parameter from get_fb_info 
It's dead code.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:41 -05:00
Michel Dänzer
c8dd571564 drm/amd/display: Use real number of CRTCs and HPDs in set_irq_funcs 
Corresponding to the previous non-DC change.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:40 -05:00
Harry Wentland
b3734397a0 drm/amd/display: Move conn_state to header 
We'll need it in amdgpu_dm_mst_types.c as well.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:39 -05:00
Tony Cheng
2d7d273d22 drm/amd/display: dal 3.1.10 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:39 -05:00
Charlene Liu
603b83bae4 drm/amd/display: correct DP is always in full range or bt609 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:38 -05:00
Yue Hin Lau
75dbba34ae drm/amd/display: fix bug from last commit for hubbub 
fix memory leak

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:38 -05:00
Anthony Koo
56ef6ed9fa drm/amd/display: Move hdr_metadata from plane to stream 
Need to move HDR Metadata from Surface to Stream since there is only one
infoframe possible per stream.

Also cleaning up some duplicate definitions.

Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:37 -05:00
SivapiriyanKumarasamy
de4a296773 drm/amd/display: Apply VQ adjustments in MPO case 
Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:37 -05:00
Yue Hin Lau
c9ef081df0 drm/amd/display: create new structure for hubbub 
instantiating new structure hubbub in resource.c

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:37 -05:00
Tony Cheng
bcb40a670f drm/amd/display: dal 3.1.09 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:36 -05:00
Yongqiang Sun
1dbac201be drm/amd/display: Added disconnect dchub. 
Add disable ttu interface to dcn10, when remove
mpc, disable ttu as well.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:36 -05:00
Tony Cheng
d75aee4bbf drm/amd/display: dal 3.1.08 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:35 -05:00
Yongqiang Sun
74707de336 drm/amd/display: Not reset front end when program back end. 
Since front end is programmed before back end programming,
no need to reset front end in back end programming.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:35 -05:00
Yongqiang Sun
7a5086a71e drm/amd/display: Power down front end in init_hw. 
front end is initialized during init_hw, but not
power gated. There are some left over valuse and will
cause some diags test failed. Power gated all front
end pipes will make sure every test has same starting
point.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:35 -05:00
Andrew Jiang
00893681a0 drm/amd/display: Reject PPLib clock values if they are invalid 
We should be sticking with the default clock values if the values
obtained from PPLib are bogus.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:34 -05:00
Yue Hin Lau
62d591a8e0 drm/amd/display: create new files for hubbub functions 
moving hubbub functions to new file

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:34 -05:00
Leo (Sunpeng) Li
e1fc2dca12 drm/amd/display: Complete TODO item: use new DRM iterator 
Abandon new_crtcs array and use for_each_new iterator to acquire new
crtcs.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:33 -05:00
Leo (Sunpeng) Li
8b8f27f972 drm/amd/display: Fix styling of freesync code in commit_tail 
For better readability.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:33 -05:00
Leo (Sunpeng) Li
1c77d4eea7 drm/amd/display: Only add stream to freesync when modeset required 
This is a follow-up patch to:

Leo (Sunpeng) Li    Cleanup code that enables freesync

We should only add a stream to freesync if a modeset was requested, so
we don't fill the core freesync map with pointless streams.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:29 -05:00
Leo (Sunpeng) Li
f01a2cf0a6 drm/amd/display: Cleanup code that enables freesync 
This is a follow-up patch to:

Bhawanpreet Lakha    Atomic freesync ASSERT fix

Changes:
- Combine to use one iterator
- Use new DRM iterators.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:29 -05:00
Bhawanpreet Lakha
bfe1708c80 drm/amd/display: Atomic freesync ASSERT fix 
Changes to atomic set property for freesync.

Now In set property, just set the freesync variables and return 0.
Based on the variables call mod_freesync_set_user_enable() inside
commit_tail

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:28 -05:00
Alex Deucher
0858a8f204 drm/amd/display: add mod_freesync_user_enable to dm_connector_state 
We don't currently expose variable refresh rate, but add the state to the
connector state to make it easier to maintain the support for it from a
hw support perspective while we figure out the uapi for drm.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:15 -05:00
Anthony Koo
4952d4c584 drm/amd/display: DMCU FW loading from PSP 
Update the programming sequence to allow DMCU firmware to be loaded by
PSP. This code detects whether the firmware is loaded and does a check
to verify the expected interface version and checks for correct response
from micro controller.

Added registry key method to allow force loading of firmware from kernel
mode driver for test purposes. This is old method of firmware loading
without PSP.

Moved some init sequences into dc/dmcu.

Changed loading sequence to initialize IRAM after firmware completely
loaded. Firmware will now disable features that use IRAM
until initialized.

Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:33:23 -05:00
Yongqiang Sun
7d2638a61a drm/amd/display: Set cursor position as per address. 
In case of pipe split, cursor position should also be
programmed as per cursor address.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:33:23 -05:00
Harry Wentland
59c185ac4e drm/amd/display: Explicit casting for grph object ids 
C++ compilers don't like the implicit conversion

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:33:22 -05:00
Yue Hin Lau
c42c275ce3 drm/amd/display: cleaning up hubp for dcn 
removing duplicate functions, renaming struct mi_regs, etc.

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:33:22 -05:00