Potin Lai
|
244839d0fe
|
ARM: dts: aspeed: bletchley: add sample averaging for ADM1278
set number of sample averaging to 128 for both PWR_AVG and VI_AVG
Signed-off-by: Potin Lai <potin.lai@quantatw.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20220418094827.6185-1-potin.lai@quantatw.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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2022-05-19 17:05:19 +09:30 |
|
Potin Lai
|
8c9e374387
|
ARM: dts: aspeed: bletchley: add eeprom node on each sled
Add eeprom (24c26) on each sled for storing sled fru information.
Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-7-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
2022-05-19 16:57:45 +09:30 |
|
Potin Lai
|
9495c6d570
|
ARM: dts: aspeed: bletchley: add pca9536 node on each sled
Add an ioexp node on each sled baseed on DVT schematic, address at 0x41.
P0: SLEDX_SWD_MUX
P1: SLEDX_XRES_SWD_N
P2: SLEDX_CLKREQ_N
P3: SLEDX_PCIE_PWR_EN
Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-6-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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2022-05-19 16:57:45 +09:30 |
|
Potin Lai
|
60280a214a
|
ARM: dts: aspeed: bletchley: update gpio0 line names
Update GPIO line names based on DVT schematic
Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-5-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
2022-05-19 16:57:45 +09:30 |
|
Potin Lai
|
86ec3af52d
|
ARM: dts: aspeed: bletchley: Enable mdio0 bus
Enable mdio0 bus based on DVT schematic.
TODO: Add Marvell 88E6191 Switch
Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-4-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
2022-05-19 16:57:45 +09:30 |
|
Potin Lai
|
cc82dc2673
|
ARM: dts: aspeed: bletchley: switch spi2 driver to aspeed-smc
Due to DVT schematic has stable spi signal, switch back to aspeed-smc
driver for improving performance.
Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-3-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
2022-05-19 16:57:44 +09:30 |
|
Potin Lai
|
ad0e053b5b
|
ARM: dts: aspeed: bletchley: enable ehci0 device node
Enable ehci0 node for USB2 host feature
Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-2-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
2022-05-19 16:57:44 +09:30 |
|
Potin Lai
|
60170ec8ed
|
ARM: dts: aspeed: bletchley: Cleanup redundant nodes
Cleanup following nodes:
1. Remove redundant i2c1 node.
2. Disable in-chip rtc, use battery-backed external rtc (pcf85263)
instead.
Signed-off-by: Potin Lai <potin.lai@quantatw.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20220215163151.32252-11-potin.lai@quantatw.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
2022-02-16 15:37:53 +10:30 |
|
Potin Lai
|
4d84ae952c
|
ARM: dts: aspeed: bletchley: Enable mdio3 bus
Enable mdio3 bus based on EVT HW.
So far lack of c45 support in mdio-aspeed, at least can access mdio bus
by read/write register.
TODO: Add Marvell PHY 88X3310 and mdio-aspeed driver c45 support
Signed-off-by: Potin Lai <potin.lai@quantatw.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20220215163151.32252-10-potin.lai@quantatw.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
2022-02-16 15:37:24 +10:30 |
|
Potin Lai
|
98af9ffd17
|
ARM: dts: aspeed: bletchley: Add INA230 sensor on each sled
Add INA230 node on each sled based on EVT HW.
Signed-off-by: Potin Lai <potin.lai@quantatw.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20220215163151.32252-9-potin.lai@quantatw.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
2022-02-16 15:37:24 +10:30 |
|
Potin Lai
|
602c441c63
|
ARM: dts: aspeed: bletchley: Add shunt-resistor for ADM1278
Fix with correct shunt-resistor value base on EVT HW.
Signed-off-by: Potin Lai <potin.lai@quantatw.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20220215163151.32252-8-potin.lai@quantatw.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
2022-02-16 15:37:24 +10:30 |
|
Potin Lai
|
a567a03e36
|
ARM: dts: aspeed: bletchley: Add interrupt support for sled io expander
Enable interrupt support for all sledx_ioexp, so userspace can monitor
gpio from io expander by interrupt.
Signed-off-by: Potin Lai <potin.lai@quantatw.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20220215163151.32252-7-potin.lai@quantatw.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
2022-02-16 15:37:23 +10:30 |
|
Potin Lai
|
53713d5ab9
|
ARM: dts: aspeed: bletchley: Switch to spi-gpio for spi2
Switch spi2 to spi-gpio driver to avoid unstable signal issue with EVT
HW.
Remove spi2 node and create a new spi2_gpio node.
Signed-off-by: Potin Lai <potin.lai@quantatw.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20220215163151.32252-6-potin.lai@quantatw.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
2022-02-16 15:37:23 +10:30 |
|
Potin Lai
|
384aa4cb14
|
ARM: dts: aspeed: bletchley: Update fmc configurations
Add flash1 in fmc to support dual flash module.
Signed-off-by: Potin Lai <potin.lai@quantatw.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20220215163151.32252-5-potin.lai@quantatw.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
2022-02-16 15:37:23 +10:30 |
|
Potin Lai
|
7f3a795479
|
ARM: dts: aspeed: bletchley: Update gpio-line-names
Update gpio-line-names based on EVT HW schematic
- gpio0:
- BSM_FRU_WP (G0, out)
- PWRGD_P1V05_VDDCORE (G4, in)
- PWRGD_P1V5_VDD (G5, in)
- BSM_FLASH_WP_STATUS (I5, in)
- BMC_TPM_PRES (I6, in)
- BMC_RTC_INT (L5, in)
- BMC_HEARTBEAT (P7, out)
- PWRGD_CNS_PSU (V0, in)
- PSU_PRSNT (V3, in)
- BMC_SELF_HW_RST (Y0, out)
- BSM_PRSNT (Y1, in)
- sled1_led pca9522:
- SLED1_MD_REF_PWM (3, out)
- sled2_led pca9522:
- SLED2_MD_REF_PWM (3, out)
- sled3_led pca9522:
- SLED3_MD_REF_PWM (3, out)
- sled4_led pca9522:
- SLED4_MD_REF_PWM (3, out)
- sled5_led pca9522:
- SLED5_MD_REF_PWM (3, out)
- sled6_led pca9522:
- SLED6_MD_REF_PWM (3, out)
Signed-off-by: Potin Lai <potin.lai@quantatw.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20220215163151.32252-4-potin.lai@quantatw.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
2022-02-16 15:37:23 +10:30 |
|
Potin Lai
|
2cc3b80c32
|
ARM: dts: aspeed: bletchley: Separate leds into multiple groups
Separate gpio-leds by each io expander chip.
To avoid entire gpio-leds bind failed due to single chip not available
Signed-off-by: Potin Lai <potin.lai@quantatw.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20220215163151.32252-3-potin.lai@quantatw.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
2022-02-16 15:37:22 +10:30 |
|
Potin Lai
|
c98a3dcd25
|
ARM: dts: aspeed: bletchley: Switch sled numbering to 1-based
Switch sled to 1-based to meet OpenBMC multi-host numbering rule
Signed-off-by: Potin Lai <potin.lai@quantatw.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20220215163151.32252-2-potin.lai@quantatw.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
2022-02-16 15:37:22 +10:30 |
|
Howard Chiu
|
a8c729e966
|
ARM: dts: aspeed: Adding Facebook Bletchley BMC
Initial introduction of Facebook Bletchley equipped with
Aspeed 2600 BMC SoC.
Signed-off-by: Howard Chiu <howard.chiu@quantatw.com>
Link: https://lore.kernel.org/r/20211207094923.422422-1-howard.chiu@quantatw.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
2021-12-21 15:08:15 +10:30 |
|