Pull mailbox updates from Jassi Brar:
"api:
- hrtimer fix
qcom:
- log pending irq during resume
- minor cosmetic changes
omap:
- use pm_runtime_resume_and_get
imx:
- use pm_runtime_resume_and_get
- remove redundant initializer
mtk:
- added GCE header for MT8186
- enable support for MT8186
tegra:
- remove redundant NULL check
- added hsp_sm_ops for send/recv api
- support shared mailboxes
stm:
- remove unsupported "wakeup" irq
pcc:
- sanitize mbox allocated memory before use
misc:
- documentation fixes for arm_mhu and qcom-ipcc"
* tag 'mailbox-v5.19' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
mailbox: qcom-ipcc: Fix -Wunused-function with CONFIG_PM_SLEEP=n
mailbox: forward the hrtimer if not queued and under a lock
mailbox: qcom-ipcc: Log the pending interrupt during resume
mailbox: pcc: Fix an invalid-load caught by the address sanitizer
dt-bindings: mailbox: remove the IPCC "wakeup" IRQ
mailbox: correct kerneldoc
mailbox: omap: using pm_runtime_resume_and_get to simplify the code
mailbox:imx: using pm_runtime_resume_and_get
mailbox: mediatek: support mt8186 adsp mailbox
dt-bindings: mailbox: mtk,adsp-mbox: add mt8186 compatible name
mailbox: tegra-hsp: Add 128-bit shared mailbox support
dt-bindings: tegra186-hsp: add type for shared mailboxes
mailbox: tegra-hsp: Add tegra_hsp_sm_ops
dt-bindings: gce: add the GCE header file for MT8186
mailbox: remove an unneeded NULL check on list iterator
mailbox: imx: remove redundant initializer
dt-bindings: mailbox: qcom-ipcc: simplify the example
Tegra234 supports sending/receiving 32-bit and 128-bit data over
a shared mailbox. Based on the data size to be used, clients need
to specify the type of shared mailbox in the device tree.
Add a macro for 128-bit shared mailbox. Mailbox clients can use this
macro as a flag in device tree to enable 128-bit data support for a
shared mailbox.
Signed-off-by: Kartik <kkartik@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Consumer examples in the bindings of resource providers are trivial,
useless and duplicating code. Additionally the incomplete qcom,smp2p
example triggers DT schema warnings.
Cleanup the example by removing the consumer part and fixing the
indentation to DT schema convention.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Pull mailbox updates from Jassi Brar:
"qcom:
- add support for MSM8976
mtk:
- enable mt8186
- add ADSP controller driver
ti:
- use poll mode during suspend
tegra:
- fix tx channel flush
imx:
- add i.MX8 SECO MU support
- prepare for, and add iMX93 support"
* tag 'mailbox-v5.18' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
dt-bindings: mailbox: add definition for mt8186
mailbox: ti-msgmgr: Operate mailbox in polled mode during system suspend
mailbox: ti-msgmgr: Refactor message read during interrupt handler
mailbox: imx: support i.MX93 S401 MU
mailbox: imx: support dual interrupts
mailbox: imx: extend irq to an array
dt-bindings: mailbox: imx-mu: add i.MX93 S4 MU support
dt-bindings: mailbox: imx-mu: add i.MX93 MU
mailbox: imx: add i.MX8 SECO MU support
mailbox: imx: introduce rxdb callback
dt-bindings: mailbox: imx-mu: add i.MX8 SECO MU support
mailbox: imx: enlarge timeout while reading/writing messages to SCFW
mailbox: imx: fix crash in resume on i.mx8ulp
mailbox: imx: fix wakeup failure from freeze mode
mailbox: mediatek: add support for adsp mailbox controller
dt-bindings: mailbox: mtk,adsp-mbox: add mtk adsp-mbox document
mailbox: qcom-apcs-ipc: Add compatible for MSM8976 SoC
dt-bindings: mailbox: Add compatible for the MSM8976
mailbox: tegra-hsp: Flush whole channel
Similar to i.MX8ULP S4 MU, i.MX93 MU is dedicated for communication
between Sentinel and Cortex-A cores from hardware design, it could not be
reused for other purpose.
However i.MX93 S4 MU use separate tx/rx interrupt, so update
interrupts and add interrupt-names property.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Similar to i.MX8QM/QXP SCU, i.MX8 SECO MU is dedicated for
communication between SECO and Cortex-A cores from hardware design,
it could not be reused for other purpose. To use SECO MU more
effectivly, add "fsl,imx8-mu-seco" compatile to support fast IPC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
The Polarfire SoC is currently using two different compatible string
prefixes. Fix this by changing "polarfire-soc-*" strings to "mpfs-*" in
its system controller in order to match the compatible string used in
the soc binding and device tree
Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Pull devicetree updates from Rob Herring:
"Bindings:
- DT schema conversions for Samsung clocks, RNG bindings, Qcom
Command DB and rmtfs, gpio-restart, i2c-mux-gpio, i2c-mux-pinctl,
Tegra I2C and BPMP, pwm-vibrator, Arm DSU, and Cadence macb
- DT schema conversions for Broadcom platforms: interrupt
controllers, STB GPIO, STB waketimer, STB reset, iProc MDIO mux,
iProc PCIe, Cygnus PCIe PHY, PWM, USB BDC, BCM6328 LEDs, TMON,
SYSTEMPORT, AMAC, Northstar 2 PCIe PHY, GENET, moca PHY, GISB
arbiter, and SATA
- Add binding schemas for Tegra210 EMC table, TI DC-DC converters,
- Clean-ups of MDIO bus schemas to fix 'unevaluatedProperties' issues
- More fixes due to 'unevaluatedProperties' enabling
- Data type fixes and clean-ups of binding examples found in
preparation to move to validating DTB files directly (instead of
intermediate YAML representation.
- Vendor prefixes for T-Head Semiconductor, OnePlus, and Sunplus
- Add various new compatible strings
DT core:
- Silence a warning for overlapping reserved memory regions
- Reimplement unittest overlay tracking
- Fix stack frame size warning in unittest
- Clean-ups of early FDT scanning functions
- Fix handling of "linux,usable-memory-range" on EFI booted systems
- Add support for 'fail' status on CPU nodes
- Improve error message in of_phandle_iterator_next()
- kbuild: Disable duplicate unit-address warnings for disabled nodes"
* tag 'devicetree-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (114 commits)
dt-bindings: net: mdio: Drop resets/reset-names child properties
dt-bindings: clock: samsung: convert S5Pv210 to dtschema
dt-bindings: clock: samsung: convert Exynos5410 to dtschema
dt-bindings: clock: samsung: convert Exynos5260 to dtschema
dt-bindings: clock: samsung: extend Exynos7 bindings with UFS
dt-bindings: clock: samsung: convert Exynos7 to dtschema
dt-bindings: clock: samsung: convert Exynos5433 to dtschema
dt-bindings: i2c: maxim,max96712: Add bindings for Maxim Integrated MAX96712
dt-bindings: iio: adi,ltc2983: Fix 64-bit property sizes
dt-bindings: power: maxim,max17040: Fix incorrect type for 'maxim,rcomp'
dt-bindings: interrupt-controller: arm,gic-v3: Fix 'interrupts' cell size in example
dt-bindings: iio/magnetometer: yamaha,yas530: Fix invalid 'interrupts' in example
dt-bindings: clock: imx5: Drop clock consumer node from example
dt-bindings: Drop required 'interrupt-parent'
dt-bindings: net: ti,dp83869: Drop value on boolean 'ti,max-output-impedance'
dt-bindings: net: wireless: mt76: Fix 8-bit property sizes
dt-bindings: PCI: snps,dw-pcie-ep: Drop conflicting 'max-functions' schema
dt-bindings: i2c: st,stm32-i2c: Make each example a separate entry
dt-bindings: net: stm32-dwmac: Make each example a separate entry
dt-bindings: net: Cleanup MDIO node schemas
...
Much as we've done with other blocks, let's introduce generic
compatibles so drivers can bind to those and still work with future
SoCs, as long as the hardware remains the same. Also go ahead and add
compatibles for the new t600x SoCs (we group those as t6000).
Note that no DTs instantiate devices with this binding yet.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Add the compatible string for the HSP block found on the Tegra234 SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Convert the NVIDIA Tegra HSP bindings from the free-form text format to
json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This will bind to the PMGR pwrstate nodes that control power/clock
gating to SoC blocks. The mailbox driver doesn't do runtime-pm yet, so
initially this will just keep the domain on permanently.
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Pull devicetree updates from Rob Herring:
- Convert /reserved-memory bindings to schemas
- Convert a bunch of NFC bindings to schemas
- Convert bindings to schema: Xilinx USB, Freescale DDR controller, Arm
CCI-400, UBlox Neo-6M, 1-Wire GPIO, MSI controller, ASpeed LPC, OMAP
and Inside-Secure HWRNG, register-bit-led, OV5640, Silead GSL1680,
Elan ekth3000, Marvell bluetooth, TI wlcore, TI bluetooth, ESP
ESP8089, tlm,trusted-foundations, Microchip cap11xx, Ralink SoCs and
boards, and TI sysc
- New binding schemas for: msi-ranges, Aspeed UART routing controller,
palmbus, Xylon LogiCVC display controller, Mediatek's MT7621 SDRAM
memory controller, and Apple M1 PCIe host
- Run schema checks for %.dtb targets
- Improve build time when using DT_SCHEMA_FILES
- Improve error message when dtschema is not found
- Various doc reference fixes in MAINTAINERS
- Convert architectures to common CPU h/w ID parsing function
of_get_cpu_hwid().
- Allow for empty NUMA node IDs which may be hotplugged
- Cleanup of __fdt_scan_reserved_mem()
- Constify device_node parameters
- Update dtc to upstream v1.6.1-19-g0a3a9d3449c8. Adds new checks
'node_name_vs_property_name' and 'interrupt_map'.
- Enable dtc 'unit_address_format' warning by default
- Fix unittest EXPECT text for gpio hog errors
* tag 'devicetree-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (97 commits)
dt-bindings: net: ti,bluetooth: Document default max-speed
dt-bindings: pci: rcar-pci-ep: Document r8a7795
dt-bindings: net: qcom,ipa: IPA does support up to two iommus
of/fdt: Remove of_scan_flat_dt() usage for __fdt_scan_reserved_mem()
of: unittest: document intentional interrupt-map provider build warning
of: unittest: fix EXPECT text for gpio hog errors
of/unittest: Disable new dtc node_name_vs_property_name and interrupt_map warnings
scripts/dtc: Update to upstream version v1.6.1-19-g0a3a9d3449c8
dt-bindings: arm: firmware: tlm,trusted-foundations: Convert txt bindings to yaml
dt-bindings: display: tilcd: Fix endpoint addressing in example
dt-bindings: input: microchip,cap11xx: Convert txt bindings to yaml
dt-bindings: ufs: exynos-ufs: add exynosautov9 compatible
dt-bindings: ufs: exynos-ufs: add io-coherency property
dt-bindings: mips: convert Ralink SoCs and boards to schema
dt-bindings: display: xilinx: Fix example with psgtr
dt-bindings: net: nfc: nxp,pn544: Convert txt bindings to yaml
dt-bindings: Add a help message when dtschema tools are missing
dt-bindings: bus: ti-sysc: Update to use yaml binding
dt-bindings: sram: Allow numbers in sram region node name
dt-bindings: display: Document the Xylon LogiCVC display controller
...
Similar to i.MX8QM/QXP SCU, i.MX8ULP SCU MU is dedicated for
communication between S400 and Cortex-A cores from hardware design,
it could not be reused for other purpose. To use S400 MU more
effectivly, add "fsl,imx8ulp-mu-s4" compatile to support fast IPC.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Sivaprakash's codeaurora.org email address bounces. Before he comes
back with his new email, fill Jassi's address in there.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Pull mailbox updates from Jassi Brar:
- mtk:
- added support for mt8192 and mt8195
- minor fix regarding address shift
- qcom:
- added compatibles for MSM8953, SM6350 and SM6115
- enable loading IPCC as a module
- misc:
- change Altera maintainer
- fix sti kernel-doc warnings
* tag 'mailbox-v5.15' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
mailbox: cmdq: add multi-gce clocks support for mt8195
mailbox: cmdq: add mediatek mailbox support for mt8195
dt-bindings: gce: add gce header file for mt8195
dt-bindings: mailbox: add definition for mt8195
mailbox: qcom-apcs-ipc: Add compatible for MSM8953 SoC
dt-bindings: mailbox: Add compatible for the MSM8953
dt-bindings: mailbox: qcom-ipcc: Add compatible for SM6350
mailbox: qcom: Add support for SM6115 APCS IPC
dt-bindings: mailbox: qcom: Add SM6115 APCS compatible
soc: mediatek: cmdq: add address shift in jump
mailbox: cmdq: add mt8192 support
dt-binding: gce: add gce header file for mt8192
MAINTAINERS: Replace Ley Foon Tan as Altera Mailbox maintainer
mailbox: qcom-ipcc: Enable loading QCOM_IPCC as a module
mailbox: sti: quieten kernel-doc warnings
Pull devicetree updates from Rob Herring:
- Refine reserved memory nomap handling
- Merge some PCI and non-PCI address handling implementations
- Simplify of_address.h header ifdefs
- Improve printk handling of some 64-bit types
- Convert adi,adv7511, Arm ccree, Arm SCMI, Arm SCU, Arm TWD timer, Arm
VIC, arm,sbsa-gwdt, Arm/Amlogic SCPI, Aspeed I2C, Broadcom iProc PWM,
linaro,optee-tz, MDIO GPIO, Mediatek RNG, MTD physmap, NXP
pcf8563/pcf85263/pcf85363, Renesas TPU, renesas,emev2-smu,
renesas,r9a06g032-sysctrl, sysc-rmobile, Tegra20 EMC, TI AM56 PCI, TI
OMAP mailbox, TI SCI bindings, virtio-mmio, Zynq FPGA, and ZynqMP RTC
to DT schema
- Convert mux and mux controller bindings to schema. This includes MDIO
IIO, and I2C muxes.
- Add Arm PL031 RTC binding schema
- Add vendor prefixes for StarFive Technology Co. Ltd. and Insignal Ltd
- Fix some stale doc references
- Remove stale property-units.txt. Superseded by schema in dt-schema
repo.
- Fixes for 'unevaluatedProperties' handling (enabled with experimental
json-schema support)
- Drop redundant usage of minItems and maxItems across the tree
- Update some examples to use bindings with a schema
* tag 'devicetree-for-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (83 commits)
dt-bindings: Fix 'unevaluatedProperties' errors in DT graph users
dt-bindings: display: renesas,du: Fix 'ports' reference
dt-bindings: media: adv7180: Add missing video-interfaces.yaml reference
dt-bindings: crypto: ccree: Convert to json-schema
dt-bindings: fpga: zynq: convert bindings to YAML
dt-bindings: rtc: zynqmp: convert bindings to YAML
dt-bindings: interrupt-controller: Convert ARM VIC to json-schema
of: of_reserved_mem: mark nomap memory instead of removing
of: of_reserved_mem: only call memblock_free for normal reserved memory
dt-bindings: Drop redundant minItems/maxItems
dt-bindings: spmi: Correct 'reg' schema
of: reserved-memory: Add stub for RESERVEDMEM_OF_DECLARE()
dt-bindings: clk: vc5: Fix example
dt-bindings: timer: renesas,tmu: add r8a779a0 TMU support
dt-bindings: drm: bridge: adi,adv7511.txt: convert to yaml
dt-bindings: PCI: ti,am65: Convert PCIe host/endpoint mode dt-bindings to YAML
of: Remove superfluous casts when printing u64 values
of: Fix truncation of memory sizes on 32-bit platforms
dt-bindings: rtc: nxp,pcf8563: Absorb pcf85263/pcf85363 bindings
dt-bindings: pwm: Use examples with documented/matching schema
...
The register layout and bits definition of i.MX8ULP MU is different
compared with others, let's add the compatible for the new MU.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Currently the example provided in arm,mhuv2 schema complains as below:
Documentation/devicetree/bindings/mailbox/arm,mhuv2.example.dt.yaml :0:0:
/example-0/soc/scb@2e000000: failed to match any schema with compatible:
['fujitsu,mb86s70-scb-1.0']
Fix it by using an example with a matching schema that makes use of 4
mailboxes that is well suited to demonstrate Rx and Tx channels with both
doorbell and data transfer protocols.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Link: https://lore.kernel.org/r/20210604205710.1944363-7-sudeep.holla@arm.com
Signed-off-by: Rob Herring <robh@kernel.org>
Currently the example provided in arm,mhu schema complains as below:
Documentation/devicetree/bindings/mailbox/arm,mhu.example.dt.yaml :0:0:
/example-0/soc/scb@2e000000: failed to match any schema with compatible:
['fujitsu,mb86s70-scb-1.0']
Fix the same using examples based on Juno platform. The old SCPI firmware
used MHU with standard 32-bit data transfer protocol while the new SCMI
firmware uses MHU and expects to be used in doorbell mode. Update example
with SCPI and SCMI firmware nodes to demonstrate both 32-bit data transfer
and doorbell mode of MHU operations
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Link: https://lore.kernel.org/r/20210604205710.1944363-6-sudeep.holla@arm.com
Signed-off-by: Rob Herring <robh@kernel.org>
Once the arm,scpi binding is converted to YAML format, the following
errors will be seen when doing `make DT_CHECKER_FLAGS=-m dt_binding_check`
From schema: Documentation/devicetree/bindings/firmware/arm,scpi.yaml
Documentation/devicetree/bindings/mailbox/arm,mhu.example.dt.yaml:
scpi@2f000000: $nodename:0: 'scpi' was expected
Documentation/devicetree/bindings/mailbox/arm,mhu.example.dt.yaml:
scpi@2f000000: reg: [[0, 788529152, 0, 512]] is not of type 'object'
Documentation/devicetree/bindings/mailbox/arm,mhu.example.dt.yaml:
scpi@2f000000: 'shmem' is a required property
Fix those error following the SCPI bindings.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Link: https://lore.kernel.org/r/20210604205710.1944363-2-sudeep.holla@arm.com
Signed-off-by: Rob Herring <robh@kernel.org>
Convert the current OMAP Mailbox binding from text format to YAML
format/DT schema, and delete the legacy text binding file.
The new YAML binding conversion is an updated version compared to
the original. The descriptions for certain properties have been
improved to provide more clarity. Constraints are added to the
properties 'ti,mbox-num-users', 'ti,mbox-num-fifos' and 'interrupts'.
The 'ti,hwmods' is a legacy property and is retained only to reflect
the existing usage on some older OMAP2 and OMAP3 platforms.
All the existing examples have also been updated to reflect the
latest dts nodes (ti,hwmods removed from OMAP4 and AM33xx examples,
and interrupts value updated for AM65x SoCs).
Signed-off-by: Suman Anna <s-anna@ti.com>
[robh: Update ref in ti,omap-remoteproc.yaml]
Link: https://lore.kernel.org/r/20210520234348.4479-1-s-anna@ti.com
Signed-off-by: Rob Herring <robh@kernel.org>
