forked from Minki/linux
powerpc/eeh: Do probe on pci_dn
Originally, EEH core probes on device_node or pci_dev to populate EEH devices and PEs, which conflicts with the fact: SRIOV VFs are usually enabled and created by PF's driver and they don't have the corresponding device_nodes. Instead, SRIOV VFs have dynamically created pci_dn, which can be used for EEH probe. The patch reworks EEH probe for PowerNV and pSeries platforms to do probing based on pci_dn, instead of pci_dev or device_node any more. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
parent
e8e9b34cef
commit
ff57b454dd
@ -207,8 +207,7 @@ struct eeh_ops {
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char *name;
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int (*init)(void);
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int (*post_init)(void);
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void* (*of_probe)(struct device_node *dn, void *flag);
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int (*dev_probe)(struct pci_dev *dev, void *flag);
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void* (*probe)(struct pci_dn *pdn, void *data);
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int (*set_option)(struct eeh_pe *pe, int option);
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int (*get_pe_addr)(struct eeh_pe *pe);
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int (*get_state)(struct eeh_pe *pe, int *state);
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@ -287,8 +286,8 @@ int __exit eeh_ops_unregister(const char *name);
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int eeh_check_failure(const volatile void __iomem *token);
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int eeh_dev_check_failure(struct eeh_dev *edev);
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void eeh_addr_cache_build(void);
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void eeh_add_device_early(struct device_node *);
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void eeh_add_device_tree_early(struct device_node *);
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void eeh_add_device_early(struct pci_dn *);
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void eeh_add_device_tree_early(struct pci_dn *);
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void eeh_add_device_late(struct pci_dev *);
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void eeh_add_device_tree_late(struct pci_bus *);
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void eeh_add_sysfs_files(struct pci_bus *);
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@ -346,9 +345,9 @@ static inline int eeh_check_failure(const volatile void __iomem *token)
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static inline void eeh_addr_cache_build(void) { }
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static inline void eeh_add_device_early(struct device_node *dn) { }
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static inline void eeh_add_device_early(struct pci_dn *pdn) { }
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static inline void eeh_add_device_tree_early(struct device_node *dn) { }
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static inline void eeh_add_device_tree_early(struct pci_dn *pdn) { }
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static inline void eeh_add_device_late(struct pci_dev *dev) { }
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@ -969,7 +969,7 @@ static struct notifier_block eeh_reboot_nb = {
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int eeh_init(void)
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{
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struct pci_controller *hose, *tmp;
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struct device_node *phb;
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struct pci_dn *pdn;
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static int cnt = 0;
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int ret = 0;
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@ -1004,20 +1004,9 @@ int eeh_init(void)
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return ret;
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/* Enable EEH for all adapters */
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if (eeh_has_flag(EEH_PROBE_MODE_DEVTREE)) {
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list_for_each_entry_safe(hose, tmp,
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&hose_list, list_node) {
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phb = hose->dn;
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traverse_pci_devices(phb, eeh_ops->of_probe, NULL);
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}
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} else if (eeh_has_flag(EEH_PROBE_MODE_DEV)) {
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list_for_each_entry_safe(hose, tmp,
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&hose_list, list_node)
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pci_walk_bus(hose->bus, eeh_ops->dev_probe, NULL);
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} else {
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pr_warn("%s: Invalid probe mode %x",
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__func__, eeh_subsystem_flags);
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return -EINVAL;
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list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
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pdn = hose->pci_data;
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traverse_pci_dn(pdn, eeh_ops->probe, NULL);
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}
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/*
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@ -1043,7 +1032,7 @@ core_initcall_sync(eeh_init);
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/**
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* eeh_add_device_early - Enable EEH for the indicated device_node
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* @dn: device node for which to set up EEH
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* @pdn: PCI device node for which to set up EEH
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*
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* This routine must be used to perform EEH initialization for PCI
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* devices that were added after system boot (e.g. hotplug, dlpar).
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@ -1053,44 +1042,41 @@ core_initcall_sync(eeh_init);
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* on the CEC architecture, type of the device, on earlier boot
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* command-line arguments & etc.
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*/
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void eeh_add_device_early(struct device_node *dn)
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void eeh_add_device_early(struct pci_dn *pdn)
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{
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struct pci_controller *phb;
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struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
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/*
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* If we're doing EEH probe based on PCI device, we
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* would delay the probe until late stage because
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* the PCI device isn't available this moment.
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*/
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if (!eeh_has_flag(EEH_PROBE_MODE_DEVTREE))
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if (!edev)
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return;
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if (!of_node_to_eeh_dev(dn))
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return;
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phb = of_node_to_eeh_dev(dn)->phb;
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/* USB Bus children of PCI devices will not have BUID's */
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if (NULL == phb || 0 == phb->buid)
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phb = edev->phb;
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if (NULL == phb ||
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(eeh_has_flag(EEH_PROBE_MODE_DEVTREE) && 0 == phb->buid))
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return;
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eeh_ops->of_probe(dn, NULL);
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eeh_ops->probe(pdn, NULL);
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}
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/**
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* eeh_add_device_tree_early - Enable EEH for the indicated device
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* @dn: device node
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* @pdn: PCI device node
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*
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* This routine must be used to perform EEH initialization for the
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* indicated PCI device that was added after system boot (e.g.
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* hotplug, dlpar).
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*/
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void eeh_add_device_tree_early(struct device_node *dn)
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void eeh_add_device_tree_early(struct pci_dn *pdn)
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{
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struct device_node *sib;
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struct pci_dn *n;
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for_each_child_of_node(dn, sib)
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eeh_add_device_tree_early(sib);
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eeh_add_device_early(dn);
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if (!pdn)
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return;
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list_for_each_entry(n, &pdn->child_list, list)
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eeh_add_device_tree_early(n);
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eeh_add_device_early(pdn);
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}
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EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
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@ -1144,13 +1130,6 @@ void eeh_add_device_late(struct pci_dev *dev)
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edev->pdev = dev;
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dev->dev.archdata.edev = edev;
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/*
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* We have to do the EEH probe here because the PCI device
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* hasn't been created yet in the early stage.
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*/
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if (eeh_has_flag(EEH_PROBE_MODE_DEV))
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eeh_ops->dev_probe(dev, NULL);
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eeh_addr_cache_insert_dev(dev);
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}
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@ -72,7 +72,7 @@ static int of_pci_phb_probe(struct platform_device *dev)
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/* Register devices with EEH */
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if (dev->dev.of_node->child)
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eeh_add_device_tree_early(dev->dev.of_node);
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eeh_add_device_tree_early(PCI_DN(dev->dev.of_node));
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/* Scan the bus */
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pcibios_scan_phb(phb);
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@ -75,7 +75,7 @@ void pcibios_add_pci_devices(struct pci_bus * bus)
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struct pci_dev *dev;
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struct device_node *dn = pci_bus_to_OF_node(bus);
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eeh_add_device_tree_early(dn);
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eeh_add_device_tree_early(PCI_DN(dn));
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mode = PCI_PROBE_NORMAL;
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if (ppc_md.pci_probe_mode)
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@ -286,10 +286,82 @@ static int pnv_eeh_post_init(void)
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return ret;
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}
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static int pnv_eeh_cap_start(struct pci_dn *pdn)
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{
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u32 status;
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if (!pdn)
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return 0;
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pnv_pci_cfg_read(pdn, PCI_STATUS, 2, &status);
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if (!(status & PCI_STATUS_CAP_LIST))
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return 0;
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return PCI_CAPABILITY_LIST;
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}
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static int pnv_eeh_find_cap(struct pci_dn *pdn, int cap)
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{
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int pos = pnv_eeh_cap_start(pdn);
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int cnt = 48; /* Maximal number of capabilities */
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u32 id;
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if (!pos)
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return 0;
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while (cnt--) {
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pnv_pci_cfg_read(pdn, pos, 1, &pos);
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if (pos < 0x40)
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break;
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pos &= ~3;
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pnv_pci_cfg_read(pdn, pos + PCI_CAP_LIST_ID, 1, &id);
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if (id == 0xff)
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break;
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/* Found */
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if (id == cap)
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return pos;
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/* Next one */
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pos += PCI_CAP_LIST_NEXT;
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}
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return 0;
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}
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static int pnv_eeh_find_ecap(struct pci_dn *pdn, int cap)
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{
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struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
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u32 header;
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int pos = 256, ttl = (4096 - 256) / 8;
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if (!edev || !edev->pcie_cap)
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return 0;
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if (pnv_pci_cfg_read(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
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return 0;
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else if (!header)
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return 0;
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while (ttl-- > 0) {
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if (PCI_EXT_CAP_ID(header) == cap && pos)
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return pos;
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pos = PCI_EXT_CAP_NEXT(header);
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if (pos < 256)
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break;
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if (pnv_pci_cfg_read(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
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break;
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}
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return 0;
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}
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/**
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* pnv_eeh_dev_probe - Do probe on PCI device
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* @dev: PCI device
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* @flag: unused
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* pnv_eeh_probe - Do probe on PCI device
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* @pdn: PCI device node
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* @data: unused
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*
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* When EEH module is installed during system boot, all PCI devices
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* are checked one by one to see if it supports EEH. The function
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@ -303,12 +375,12 @@ static int pnv_eeh_post_init(void)
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* was possiblly triggered by EEH core, the binding between EEH device
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* and the PCI device isn't built yet.
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*/
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static int pnv_eeh_dev_probe(struct pci_dev *dev, void *flag)
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static void *pnv_eeh_probe(struct pci_dn *pdn, void *data)
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{
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struct pci_controller *hose = pci_bus_to_host(dev->bus);
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struct pci_controller *hose = pdn->phb;
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struct pnv_phb *phb = hose->private_data;
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struct device_node *dn = pci_device_to_OF_node(dev);
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struct eeh_dev *edev = of_node_to_eeh_dev(dn);
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struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
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uint32_t pcie_flags;
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int ret;
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/*
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@ -317,40 +389,42 @@ static int pnv_eeh_dev_probe(struct pci_dev *dev, void *flag)
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* the root bridge. So it's not reasonable to continue
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* the probing.
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*/
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if (!dn || !edev || edev->pe)
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return 0;
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if (!edev || edev->pe)
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return NULL;
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/* Skip for PCI-ISA bridge */
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if ((dev->class >> 8) == PCI_CLASS_BRIDGE_ISA)
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return 0;
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if ((pdn->class_code >> 8) == PCI_CLASS_BRIDGE_ISA)
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return NULL;
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/* Initialize eeh device */
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edev->class_code = dev->class;
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edev->class_code = pdn->class_code;
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edev->mode &= 0xFFFFFF00;
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if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE)
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edev->pcix_cap = pnv_eeh_find_cap(pdn, PCI_CAP_ID_PCIX);
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edev->pcie_cap = pnv_eeh_find_cap(pdn, PCI_CAP_ID_EXP);
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edev->aer_cap = pnv_eeh_find_ecap(pdn, PCI_EXT_CAP_ID_ERR);
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if ((edev->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) {
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edev->mode |= EEH_DEV_BRIDGE;
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edev->pcix_cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
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if (pci_is_pcie(dev)) {
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edev->pcie_cap = pci_pcie_cap(dev);
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if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
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edev->mode |= EEH_DEV_ROOT_PORT;
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else if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM)
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edev->mode |= EEH_DEV_DS_PORT;
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edev->aer_cap = pci_find_ext_capability(dev,
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PCI_EXT_CAP_ID_ERR);
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if (edev->pcie_cap) {
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pnv_pci_cfg_read(pdn, edev->pcie_cap + PCI_EXP_FLAGS,
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2, &pcie_flags);
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pcie_flags = (pcie_flags & PCI_EXP_FLAGS_TYPE) >> 4;
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if (pcie_flags == PCI_EXP_TYPE_ROOT_PORT)
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edev->mode |= EEH_DEV_ROOT_PORT;
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else if (pcie_flags == PCI_EXP_TYPE_DOWNSTREAM)
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edev->mode |= EEH_DEV_DS_PORT;
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}
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}
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edev->config_addr = ((dev->bus->number << 8) | dev->devfn);
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edev->pe_config_addr = phb->bdfn_to_pe(phb, dev->bus, dev->devfn & 0xff);
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edev->config_addr = (pdn->busno << 8) | (pdn->devfn);
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edev->pe_config_addr = phb->ioda.pe_rmap[edev->config_addr];
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/* Create PE */
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ret = eeh_add_to_parent_pe(edev);
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if (ret) {
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pr_warn("%s: Can't add PCI dev %s to parent PE (%d)\n",
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__func__, pci_name(dev), ret);
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return ret;
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pr_warn("%s: Can't add PCI dev %04x:%02x:%02x.%01x to parent PE (%d)\n",
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__func__, hose->global_number, pdn->busno,
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PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn), ret);
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return NULL;
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}
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/*
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@ -369,8 +443,10 @@ static int pnv_eeh_dev_probe(struct pci_dev *dev, void *flag)
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* Broadcom Austin 4-ports NICs (14e4:1657)
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* Broadcom Shiner 2-ports 10G NICs (14e4:168e)
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*/
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if ((dev->vendor == PCI_VENDOR_ID_BROADCOM && dev->device == 0x1657) ||
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(dev->vendor == PCI_VENDOR_ID_BROADCOM && dev->device == 0x168e))
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if ((pdn->vendor_id == PCI_VENDOR_ID_BROADCOM &&
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pdn->device_id == 0x1657) ||
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(pdn->vendor_id == PCI_VENDOR_ID_BROADCOM &&
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pdn->device_id == 0x168e))
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edev->pe->state |= EEH_PE_CFG_RESTRICTED;
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/*
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@ -380,7 +456,8 @@ static int pnv_eeh_dev_probe(struct pci_dev *dev, void *flag)
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* to PE reset.
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*/
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if (!edev->pe->bus)
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edev->pe->bus = dev->bus;
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edev->pe->bus = pci_find_bus(hose->global_number,
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pdn->busno);
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/*
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* Enable EEH explicitly so that we will do EEH check
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@ -391,7 +468,7 @@ static int pnv_eeh_dev_probe(struct pci_dev *dev, void *flag)
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/* Save memory bars */
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eeh_save_bars(edev);
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return 0;
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return NULL;
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}
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/**
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@ -1432,8 +1509,7 @@ static struct eeh_ops pnv_eeh_ops = {
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.name = "powernv",
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.init = pnv_eeh_init,
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.post_init = pnv_eeh_post_init,
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.of_probe = NULL,
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.dev_probe = pnv_eeh_dev_probe,
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.probe = pnv_eeh_probe,
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.set_option = pnv_eeh_set_option,
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.get_pe_addr = pnv_eeh_get_pe_addr,
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.get_state = pnv_eeh_get_state,
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@ -118,9 +118,8 @@ static int pseries_eeh_init(void)
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return 0;
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}
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static int pseries_eeh_cap_start(struct device_node *dn)
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static int pseries_eeh_cap_start(struct pci_dn *pdn)
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{
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struct pci_dn *pdn = PCI_DN(dn);
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u32 status;
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if (!pdn)
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@ -134,10 +133,9 @@ static int pseries_eeh_cap_start(struct device_node *dn)
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}
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static int pseries_eeh_find_cap(struct device_node *dn, int cap)
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static int pseries_eeh_find_cap(struct pci_dn *pdn, int cap)
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{
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struct pci_dn *pdn = PCI_DN(dn);
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int pos = pseries_eeh_cap_start(dn);
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int pos = pseries_eeh_cap_start(pdn);
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int cnt = 48; /* Maximal number of capabilities */
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u32 id;
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@ -160,10 +158,9 @@ static int pseries_eeh_find_cap(struct device_node *dn, int cap)
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return 0;
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}
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static int pseries_eeh_find_ecap(struct device_node *dn, int cap)
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static int pseries_eeh_find_ecap(struct pci_dn *pdn, int cap)
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{
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struct pci_dn *pdn = PCI_DN(dn);
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struct eeh_dev *edev = of_node_to_eeh_dev(dn);
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struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
|
||||
u32 header;
|
||||
int pos = 256;
|
||||
int ttl = (4096 - 256) / 8;
|
||||
@ -191,53 +188,44 @@ static int pseries_eeh_find_ecap(struct device_node *dn, int cap)
|
||||
}
|
||||
|
||||
/**
|
||||
* pseries_eeh_of_probe - EEH probe on the given device
|
||||
* @dn: OF node
|
||||
* @flag: Unused
|
||||
* pseries_eeh_probe - EEH probe on the given device
|
||||
* @pdn: PCI device node
|
||||
* @data: Unused
|
||||
*
|
||||
* When EEH module is installed during system boot, all PCI devices
|
||||
* are checked one by one to see if it supports EEH. The function
|
||||
* is introduced for the purpose.
|
||||
*/
|
||||
static void *pseries_eeh_of_probe(struct device_node *dn, void *flag)
|
||||
static void *pseries_eeh_probe(struct pci_dn *pdn, void *data)
|
||||
{
|
||||
struct eeh_dev *edev;
|
||||
struct eeh_pe pe;
|
||||
struct pci_dn *pdn = PCI_DN(dn);
|
||||
const __be32 *classp, *vendorp, *devicep;
|
||||
u32 class_code;
|
||||
const __be32 *regs;
|
||||
u32 pcie_flags;
|
||||
int enable = 0;
|
||||
int ret;
|
||||
|
||||
/* Retrieve OF node and eeh device */
|
||||
edev = of_node_to_eeh_dev(dn);
|
||||
if (edev->pe || !of_device_is_available(dn))
|
||||
edev = pdn_to_eeh_dev(pdn);
|
||||
if (!edev || edev->pe)
|
||||
return NULL;
|
||||
|
||||
/* Retrieve class/vendor/device IDs */
|
||||
classp = of_get_property(dn, "class-code", NULL);
|
||||
vendorp = of_get_property(dn, "vendor-id", NULL);
|
||||
devicep = of_get_property(dn, "device-id", NULL);
|
||||
|
||||
/* Skip for bad OF node or PCI-ISA bridge */
|
||||
if (!classp || !vendorp || !devicep)
|
||||
return NULL;
|
||||
if (dn->type && !strcmp(dn->type, "isa"))
|
||||
/* Check class/vendor/device IDs */
|
||||
if (!pdn->vendor_id || !pdn->device_id || !pdn->class_code)
|
||||
return NULL;
|
||||
|
||||
class_code = of_read_number(classp, 1);
|
||||
/* Skip for PCI-ISA bridge */
|
||||
if ((pdn->class_code >> 8) == PCI_CLASS_BRIDGE_ISA)
|
||||
return NULL;
|
||||
|
||||
/*
|
||||
* Update class code and mode of eeh device. We need
|
||||
* correctly reflects that current device is root port
|
||||
* or PCIe switch downstream port.
|
||||
*/
|
||||
edev->class_code = class_code;
|
||||
edev->pcix_cap = pseries_eeh_find_cap(dn, PCI_CAP_ID_PCIX);
|
||||
edev->pcie_cap = pseries_eeh_find_cap(dn, PCI_CAP_ID_EXP);
|
||||
edev->aer_cap = pseries_eeh_find_ecap(dn, PCI_EXT_CAP_ID_ERR);
|
||||
edev->class_code = pdn->class_code;
|
||||
edev->pcix_cap = pseries_eeh_find_cap(pdn, PCI_CAP_ID_PCIX);
|
||||
edev->pcie_cap = pseries_eeh_find_cap(pdn, PCI_CAP_ID_EXP);
|
||||
edev->aer_cap = pseries_eeh_find_ecap(pdn, PCI_EXT_CAP_ID_ERR);
|
||||
edev->mode &= 0xFFFFFF00;
|
||||
if ((edev->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) {
|
||||
edev->mode |= EEH_DEV_BRIDGE;
|
||||
@ -252,24 +240,16 @@ static void *pseries_eeh_of_probe(struct device_node *dn, void *flag)
|
||||
}
|
||||
}
|
||||
|
||||
/* Retrieve the device address */
|
||||
regs = of_get_property(dn, "reg", NULL);
|
||||
if (!regs) {
|
||||
pr_warn("%s: OF node property %s::reg not found\n",
|
||||
__func__, dn->full_name);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* Initialize the fake PE */
|
||||
memset(&pe, 0, sizeof(struct eeh_pe));
|
||||
pe.phb = edev->phb;
|
||||
pe.config_addr = of_read_number(regs, 1);
|
||||
pe.config_addr = (pdn->busno << 16) | (pdn->devfn << 8);
|
||||
|
||||
/* Enable EEH on the device */
|
||||
ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE);
|
||||
if (!ret) {
|
||||
edev->config_addr = of_read_number(regs, 1);
|
||||
/* Retrieve PE address */
|
||||
edev->config_addr = (pdn->busno << 16) | (pdn->devfn << 8);
|
||||
edev->pe_config_addr = eeh_ops->get_pe_addr(&pe);
|
||||
pe.addr = edev->pe_config_addr;
|
||||
|
||||
@ -285,16 +265,17 @@ static void *pseries_eeh_of_probe(struct device_node *dn, void *flag)
|
||||
eeh_add_flag(EEH_ENABLED);
|
||||
eeh_add_to_parent_pe(edev);
|
||||
|
||||
pr_debug("%s: EEH enabled on %s PHB#%d-PE#%x, config addr#%x\n",
|
||||
__func__, dn->full_name, pe.phb->global_number,
|
||||
pe.addr, pe.config_addr);
|
||||
} else if (dn->parent && of_node_to_eeh_dev(dn->parent) &&
|
||||
(of_node_to_eeh_dev(dn->parent))->pe) {
|
||||
pr_debug("%s: EEH enabled on %02x:%02x.%01x PHB#%d-PE#%x\n",
|
||||
__func__, pdn->busno, PCI_SLOT(pdn->devfn),
|
||||
PCI_FUNC(pdn->devfn), pe.phb->global_number,
|
||||
pe.addr);
|
||||
} else if (pdn->parent && pdn_to_eeh_dev(pdn->parent) &&
|
||||
(pdn_to_eeh_dev(pdn->parent))->pe) {
|
||||
/* This device doesn't support EEH, but it may have an
|
||||
* EEH parent, in which case we mark it as supported.
|
||||
*/
|
||||
edev->config_addr = of_node_to_eeh_dev(dn->parent)->config_addr;
|
||||
edev->pe_config_addr = of_node_to_eeh_dev(dn->parent)->pe_config_addr;
|
||||
edev->config_addr = pdn_to_eeh_dev(pdn->parent)->config_addr;
|
||||
edev->pe_config_addr = pdn_to_eeh_dev(pdn->parent)->pe_config_addr;
|
||||
eeh_add_to_parent_pe(edev);
|
||||
}
|
||||
}
|
||||
@ -707,8 +688,7 @@ static int pseries_eeh_write_config(struct device_node *dn, int where, int size,
|
||||
static struct eeh_ops pseries_eeh_ops = {
|
||||
.name = "pseries",
|
||||
.init = pseries_eeh_init,
|
||||
.of_probe = pseries_eeh_of_probe,
|
||||
.dev_probe = NULL,
|
||||
.probe = pseries_eeh_probe,
|
||||
.set_option = pseries_eeh_set_option,
|
||||
.get_pe_addr = pseries_eeh_get_pe_addr,
|
||||
.get_state = pseries_eeh_get_state,
|
||||
|
@ -82,7 +82,7 @@ struct pci_controller *init_phb_dynamic(struct device_node *dn)
|
||||
eeh_dev_phb_init_dynamic(phb);
|
||||
|
||||
if (dn->child)
|
||||
eeh_add_device_tree_early(dn);
|
||||
eeh_add_device_tree_early(PCI_DN(dn));
|
||||
|
||||
pcibios_scan_phb(phb);
|
||||
pcibios_finish_adding_to_bus(phb->bus);
|
||||
|
@ -146,7 +146,7 @@ static void dlpar_pci_add_bus(struct device_node *dn)
|
||||
struct pci_controller *phb = pdn->phb;
|
||||
struct pci_dev *dev = NULL;
|
||||
|
||||
eeh_add_device_tree_early(dn);
|
||||
eeh_add_device_tree_early(pdn);
|
||||
|
||||
/* Add EADS device to PHB bus, adding new entry to bus->devices */
|
||||
dev = of_create_pci_dev(dn, phb->bus, pdn->devfn);
|
||||
|
Loading…
Reference in New Issue
Block a user