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MIPS: Netlogic: Pass cpuid to early_init_secondary

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The cpuid was not passed into early_init_secondary even though the
comment indicated that it will be. Fix this.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4458
Signed-off-by: John Crispin <blogic@openwrt.org>
This commit is contained in:
Jayachandran C 2012-10-31 12:01:35 +00:00 committed by John Crispin
parent 862e509b7e
commit feddaf7d89
2 changed files with 4 additions and 2 deletions
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2
arch/mips/netlogic/common/smp.c
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@ -98,7 +98,7 @@ void nlm_early_init_secondary(int cpu)
change_c0_config(CONF_CM_CMASK, 0x3); change_c0_config(CONF_CM_CMASK, 0x3);
write_c0_ebase((uint32_t)nlm_common_ebase); write_c0_ebase((uint32_t)nlm_common_ebase);
#ifdef CONFIG_CPU_XLP #ifdef CONFIG_CPU_XLP
if (hard_smp_processor_id() % 4 == 0) if (cpu % 4 == 0)
xlp_mmu_init(); xlp_mmu_init();
#endif #endif
} }

4
arch/mips/netlogic/common/smpboot.S
View File

@ -186,7 +186,7 @@ EXPORT(nlm_boot_siblings)
* jump to the secondary wait function. * jump to the secondary wait function.
*/ */
mfc0 v0, CP0_EBASE, 1 mfc0 v0, CP0_EBASE, 1
andi v0, 0x7f /* v0 <- node/core */ andi v0, 0x3ff /* v0 <- node/core */
/* Init MMU in the first thread after changing THREAD_MODE /* Init MMU in the first thread after changing THREAD_MODE
* register (Ax Errata?) * register (Ax Errata?)
@ -263,6 +263,8 @@ NESTED(nlm_boot_secondary_cpus, 16, sp)
PTR_L gp, 0(t1) PTR_L gp, 0(t1)
/* a0 has the processor id */ /* a0 has the processor id */
mfc0 a0, CP0_EBASE, 1
andi a0, 0x3ff /* a0 <- node/core */
PTR_LA t0, nlm_early_init_secondary PTR_LA t0, nlm_early_init_secondary
jalr t0 jalr t0
nop nop