ARM: at91: add at91sam9g20 and Calao USB A9G20 DT support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com>
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119
arch/arm/boot/dts/at91sam9g20.dtsi
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119
arch/arm/boot/dts/at91sam9g20.dtsi
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/*
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* at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
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*
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* Copyright (C) 2011 Atmel,
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* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
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* 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/include/ "skeleton.dtsi"
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/ {
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model = "Atmel AT91SAM9G20 family SoC";
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compatible = "atmel,at91sam9g20";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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serial4 = &usart3;
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serial5 = &usart4;
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serial6 = &usart5;
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};
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cpus {
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cpu@0 {
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compatible = "arm,arm926ejs";
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};
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};
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memory@20000000 {
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reg = <0x20000000 0x08000000>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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aic: interrupt-controller@fffff000 {
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#interrupt-cells = <1>;
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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interrupt-parent;
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reg = <0xfffff000 0x200>;
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffff200 0x200>;
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interrupts = <1>;
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status = "disabled";
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};
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usart0: serial@fffb0000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffb0000 0x200>;
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interrupts = <6>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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usart1: serial@fffb4000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffb4000 0x200>;
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interrupts = <7>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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usart2: serial@fffb8000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffb8000 0x200>;
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interrupts = <8>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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usart3: serial@fffd0000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffd0000 0x200>;
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interrupts = <23>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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usart4: serial@fffd4000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffd4000 0x200>;
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interrupts = <24>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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usart5: serial@fffd8000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffd8000 0x200>;
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interrupts = <25>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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};
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};
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};
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30
arch/arm/boot/dts/usb_a9g20.dts
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30
arch/arm/boot/dts/usb_a9g20.dts
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/*
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* usb_a9g20.dts - Device Tree file for Caloa USB A9G20 board
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*
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* Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/dts-v1/;
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/include/ "at91sam9g20.dtsi"
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/ {
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model = "Calao USB A9G20";
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compatible = "calao,usb-a9g20", "atmel,at91sam9g20", "atmel,at91sam9";
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chosen {
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bootargs = "mem=64M console=ttyS0,115200 mtdparts=atmel_nand:128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data) root=/dev/mtdblock5 rw rootfstype=ubifs";
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};
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memory@20000000 {
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reg = <0x20000000 0x4000000>;
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};
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ahb {
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apb {
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dbgu: serial@fffff200 {
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status = "okay";
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};
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};
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};
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};
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@ -17,4 +17,4 @@ params_phys-y := 0x20000100
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initrd_phys-y := 0x20410000
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initrd_phys-y := 0x20410000
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endif
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endif
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dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9m10g45ek.dtb
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dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9m10g45ek.dtb usb_a9g20.dtb
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@ -199,6 +199,14 @@ static struct clk_lookup periph_clocks_lookups[] = {
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CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk),
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CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk),
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CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk),
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CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk),
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CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
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CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
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/* more usart lookup table for DT entries */
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CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
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CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
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CLKDEV_CON_DEV_ID("usart", "fffb4000.serial", &usart1_clk),
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CLKDEV_CON_DEV_ID("usart", "fffb8000.serial", &usart2_clk),
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CLKDEV_CON_DEV_ID("usart", "fffd0000.serial", &usart3_clk),
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CLKDEV_CON_DEV_ID("usart", "fffd4000.serial", &usart4_clk),
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CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk),
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};
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};
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static struct clk_lookup usart_clocks_lookups[] = {
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static struct clk_lookup usart_clocks_lookups[] = {
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@ -108,6 +108,7 @@ static void __init at91_dt_device_init(void)
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static const char *at91_dt_board_compat[] __initdata = {
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static const char *at91_dt_board_compat[] __initdata = {
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"atmel,at91sam9m10g45ek",
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"atmel,at91sam9m10g45ek",
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"calao,usb-a9g20",
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NULL
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NULL
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};
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};
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