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mlxsw: reg: Add Tunneling NVE QoS Configuration Register

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The register configures how QoS is set in Encapsulation into the
underlay network.

Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Reviewed-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Ido Schimmel 2018-10-11 07:48:04 +00:00 committed by David S. Miller
parent a77d5f0bde
commit fd6db27cac
1 changed files with 26 additions and 0 deletions
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26
drivers/net/ethernet/mellanox/mlxsw/reg.h
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@ -8566,6 +8566,31 @@ static inline void mlxsw_reg_tnumt_pack(char *payload,
mlxsw_reg_tnumt_record_size_set(payload, record_size); mlxsw_reg_tnumt_record_size_set(payload, record_size);
} }
/* TNQCR - Tunneling NVE QoS Configuration Register
* ------------------------------------------------
* The TNQCR register configures how QoS is set in encapsulation into the
* underlay network.
*/
#define MLXSW_REG_TNQCR_ID 0xA010
#define MLXSW_REG_TNQCR_LEN 0x0C
MLXSW_REG_DEFINE(tnqcr, MLXSW_REG_TNQCR_ID, MLXSW_REG_TNQCR_LEN);
/* reg_tnqcr_enc_set_dscp
* For encapsulation: How to set DSCP field:
* 0 - Copy the DSCP from the overlay (inner) IP header to the underlay
* (outer) IP header. If there is no IP header, use TNQDR.dscp
* 1 - Set the DSCP field as TNQDR.dscp
* Access: RW
*/
MLXSW_ITEM32(reg, tnqcr, enc_set_dscp, 0x04, 28, 1);
static inline void mlxsw_reg_tnqcr_pack(char *payload)
{
MLXSW_REG_ZERO(tnqcr, payload);
mlxsw_reg_tnqcr_enc_set_dscp_set(payload, 0);
}
/* TNEEM - Tunneling NVE Encapsulation ECN Mapping Register /* TNEEM - Tunneling NVE Encapsulation ECN Mapping Register
* -------------------------------------------------------- * --------------------------------------------------------
* The TNEEM register maps ECN of the IP header at the ingress to the * The TNEEM register maps ECN of the IP header at the ingress to the
@ -9248,6 +9273,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
MLXSW_REG(mgpc), MLXSW_REG(mgpc),
MLXSW_REG(tngcr), MLXSW_REG(tngcr),
MLXSW_REG(tnumt), MLXSW_REG(tnumt),
MLXSW_REG(tnqcr),
MLXSW_REG(tneem), MLXSW_REG(tneem),
MLXSW_REG(tndem), MLXSW_REG(tndem),
MLXSW_REG(tnpc), MLXSW_REG(tnpc),