diff --git a/drivers/clk/berlin/bg2.c b/drivers/clk/berlin/bg2.c index d8e57097518b..73153fc45ee9 100644 --- a/drivers/clk/berlin/bg2.c +++ b/drivers/clk/berlin/bg2.c @@ -508,10 +508,7 @@ static void __init berlin2_clock_setup(struct device_node *np) u8 avpll_flags = 0; int n; - if (of_device_is_compatible(parent_np, "syscon")) - np = parent_np; - - gbase = of_iomap(np, 0); + gbase = of_iomap(parent_np, 0); if (!gbase) return; @@ -689,9 +686,5 @@ static void __init berlin2_clock_setup(struct device_node *np) bg2_fail: iounmap(gbase); } -CLK_OF_DECLARE(berlin2_clock, "marvell,berlin2-chip-ctrl", - berlin2_clock_setup); -CLK_OF_DECLARE(berlin2cd_clock, "marvell,berlin2cd-chip-ctrl", - berlin2_clock_setup); CLK_OF_DECLARE(berlin2_clk, "marvell,berlin2-clk", berlin2_clock_setup); diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c index 638a649ebed7..221f40c2b850 100644 --- a/drivers/clk/berlin/bg2q.c +++ b/drivers/clk/berlin/bg2q.c @@ -295,17 +295,14 @@ static void __init berlin2q_clock_setup(struct device_node *np) struct clk *clk; int n; - if (of_device_is_compatible(parent_np, "syscon")) - np = parent_np; - - gbase = of_iomap(np, 0); + gbase = of_iomap(parent_np, 0); if (!gbase) { pr_err("%s: Unable to map global base\n", np->full_name); return; } /* BG2Q CPU PLL is not part of global registers */ - cpupll_base = of_iomap(np, 1); + cpupll_base = of_iomap(parent_np, 1); if (!cpupll_base) { pr_err("%s: Unable to map cpupll base\n", np->full_name); iounmap(gbase); @@ -388,7 +385,5 @@ bg2q_fail: iounmap(cpupll_base); iounmap(gbase); } -CLK_OF_DECLARE(berlin2q_clock, "marvell,berlin2q-chip-ctrl", - berlin2q_clock_setup); CLK_OF_DECLARE(berlin2q_clk, "marvell,berlin2q-clk", berlin2q_clock_setup);