forked from Minki/linux
drivers/gpu/drm: Update WARN uses
Coalesce long formats. Align arguments. Add missing newlines. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -276,7 +276,7 @@ static bool drm_encoder_crtc_ok(struct drm_encoder *encoder,
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struct drm_crtc *tmp;
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int crtc_mask = 1;
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WARN(!crtc, "checking null crtc?");
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WARN(!crtc, "checking null crtc?\n");
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dev = crtc->dev;
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@ -4065,8 +4065,7 @@ i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment)
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alignment = i915_gem_get_gtt_alignment(obj);
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if (obj_priv->gtt_offset & (alignment - 1)) {
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WARN(obj_priv->pin_count,
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"bo is already pinned with incorrect alignment:"
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" offset=%x, req.alignment=%x\n",
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"bo is already pinned with incorrect alignment: offset=%x, req.alignment=%x\n",
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obj_priv->gtt_offset, alignment);
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ret = i915_gem_object_unbind(obj);
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if (ret)
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@ -2033,7 +2033,7 @@ int evergreen_irq_set(struct radeon_device *rdev)
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u32 grbm_int_cntl = 0;
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if (!rdev->irq.installed) {
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WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
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WARN(1, "Can't enable IRQ/MSI because no handler is installed\n");
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return -EINVAL;
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}
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/* don't enable anything if the ih is disabled */
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@ -442,7 +442,7 @@ int r100_pci_gart_init(struct radeon_device *rdev)
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int r;
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if (rdev->gart.table.ram.ptr) {
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WARN(1, "R100 PCI GART already initialized.\n");
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WARN(1, "R100 PCI GART already initialized\n");
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return 0;
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}
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/* Initialize common gart structure */
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@ -516,7 +516,7 @@ int r100_irq_set(struct radeon_device *rdev)
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uint32_t tmp = 0;
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if (!rdev->irq.installed) {
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WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
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WARN(1, "Can't enable IRQ/MSI because no handler is installed\n");
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WREG32(R_000040_GEN_INT_CNTL, 0);
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return -EINVAL;
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}
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@ -91,7 +91,7 @@ int rv370_pcie_gart_init(struct radeon_device *rdev)
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int r;
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if (rdev->gart.table.vram.robj) {
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WARN(1, "RV370 PCIE GART already initialized.\n");
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WARN(1, "RV370 PCIE GART already initialized\n");
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return 0;
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}
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/* Initialize common gart structure */
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@ -919,7 +919,7 @@ int r600_pcie_gart_init(struct radeon_device *rdev)
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int r;
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if (rdev->gart.table.vram.robj) {
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WARN(1, "R600 PCIE GART already initialized.\n");
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WARN(1, "R600 PCIE GART already initialized\n");
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return 0;
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}
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/* Initialize common gart structure */
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@ -2995,7 +2995,7 @@ int r600_irq_set(struct radeon_device *rdev)
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u32 hdmi1, hdmi2;
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if (!rdev->irq.installed) {
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WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
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WARN(1, "Can't enable IRQ/MSI because no handler is installed\n");
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return -EINVAL;
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}
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/* don't enable anything if the ih is disabled */
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@ -240,7 +240,8 @@ retry:
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*/
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if (seq == rdev->fence_drv.last_seq && radeon_gpu_is_lockup(rdev)) {
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/* good news we believe it's a lockup */
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WARN(1, "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n", fence->seq, seq);
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WARN(1, "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n",
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fence->seq, seq);
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/* FIXME: what should we do ? marking everyone
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* as signaled for now
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*/
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@ -689,7 +689,8 @@ static int radeon_ttm_backend_bind(struct ttm_backend *backend,
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gtt = container_of(backend, struct radeon_ttm_backend, backend);
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gtt->offset = bo_mem->start << PAGE_SHIFT;
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if (!gtt->num_pages) {
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WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", gtt->num_pages, bo_mem, backend);
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WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
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gtt->num_pages, bo_mem, backend);
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}
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r = radeon_gart_bind(gtt->rdev, gtt->offset,
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gtt->num_pages, gtt->pages);
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@ -78,7 +78,7 @@ int rs400_gart_init(struct radeon_device *rdev)
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int r;
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if (rdev->gart.table.ram.ptr) {
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WARN(1, "RS400 GART already initialized.\n");
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WARN(1, "RS400 GART already initialized\n");
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return 0;
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}
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/* Check gart size */
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@ -375,7 +375,7 @@ int rs600_gart_init(struct radeon_device *rdev)
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int r;
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if (rdev->gart.table.vram.robj) {
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WARN(1, "RS600 GART already initialized.\n");
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WARN(1, "RS600 GART already initialized\n");
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return 0;
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}
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/* Initialize common gart structure */
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@ -505,7 +505,7 @@ int rs600_irq_set(struct radeon_device *rdev)
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~S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(1);
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if (!rdev->irq.installed) {
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WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
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WARN(1, "Can't enable IRQ/MSI because no handler is installed\n");
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WREG32(R_000040_GEN_INT_CNTL, 0);
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return -EINVAL;
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}
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