sparc32: refactor smp boot
Introduce a common smp_callin() function to call from trampoline_32.S. Add platform specific functions to handle the platform details. This is in preparation for a patch that will unify the smp boot stuff for all architectures. sparc32 was significantly different to warrant this patch in preparation. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: David S. Miller <davem@davemloft.net> Cc: "Srivatsa S. Bhat" <srivatsa.bhat@linux.vnet.ibm.com> Acked-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -48,6 +48,10 @@ extern void sun4m_init_IRQ(void);
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extern void sun4m_unmask_profile_irq(void);
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extern void sun4m_clear_profile_irq(int cpu);
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/* sun4m_smp.c */
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void sun4m_cpu_pre_starting(void *arg);
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void sun4m_cpu_pre_online(void *arg);
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/* sun4d_irq.c */
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extern spinlock_t sun4d_imsk_lock;
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@ -60,6 +64,14 @@ extern int show_sun4d_interrupts(struct seq_file *, void *);
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extern void sun4d_distribute_irqs(void);
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extern void sun4d_free_irq(unsigned int irq, void *dev_id);
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/* sun4d_smp.c */
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void sun4d_cpu_pre_starting(void *arg);
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void sun4d_cpu_pre_online(void *arg);
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/* leon_smp.c */
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void leon_cpu_pre_starting(void *arg);
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void leon_cpu_pre_online(void *arg);
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/* head_32.S */
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extern unsigned int t_nmi[];
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extern unsigned int linux_trap_ipi15_sun4d[];
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@ -69,31 +69,19 @@ static inline unsigned long do_swap(volatile unsigned long *ptr,
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return val;
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}
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void __cpuinit leon_callin(void)
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void __cpuinit leon_cpu_pre_starting(void *arg)
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{
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leon_configure_cache_smp();
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}
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void __cpuinit leon_cpu_pre_online(void *arg)
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{
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int cpuid = hard_smp_processor_id();
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local_ops->cache_all();
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local_ops->tlb_all();
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leon_configure_cache_smp();
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notify_cpu_starting(cpuid);
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/* Get our local ticker going. */
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register_percpu_ce(cpuid);
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calibrate_delay();
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smp_store_cpu_info(cpuid);
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local_ops->cache_all();
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local_ops->tlb_all();
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/*
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* Unblock the master CPU _only_ when the scheduler state
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* of all secondary CPUs will be up-to-date, so after
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* the SMP initialization the master will be just allowed
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* to call the scheduler code.
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* Allow master to continue.
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/* Allow master to continue. The master will then give us the
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* go-ahead by setting the smp_commenced_mask and will wait without
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* timeouts until our setup is completed fully (signified by
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* our bit being set in the cpu_online_mask).
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*/
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do_swap(&cpu_callin_map[cpuid], 1);
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@ -110,9 +98,6 @@ void __cpuinit leon_callin(void)
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while (!cpumask_test_cpu(cpuid, &smp_commenced_mask))
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mb();
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local_irq_enable();
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set_cpu_online(cpuid, true);
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}
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/*
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@ -20,6 +20,7 @@
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#include <linux/seq_file.h>
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#include <linux/cache.h>
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#include <linux/delay.h>
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#include <linux/cpu.h>
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#include <asm/ptrace.h>
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#include <linux/atomic.h>
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@ -32,8 +33,10 @@
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/cpudata.h>
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#include <asm/timer.h>
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#include <asm/leon.h>
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#include "kernel.h"
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#include "irq.h"
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volatile unsigned long cpu_callin_map[NR_CPUS] __cpuinitdata = {0,};
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@ -294,6 +297,89 @@ int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
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return ret;
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}
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void __cpuinit arch_cpu_pre_starting(void *arg)
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{
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local_ops->cache_all();
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local_ops->tlb_all();
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switch(sparc_cpu_model) {
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case sun4m:
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sun4m_cpu_pre_starting(arg);
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break;
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case sun4d:
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sun4d_cpu_pre_starting(arg);
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break;
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case sparc_leon:
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leon_cpu_pre_starting(arg);
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break;
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default:
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BUG();
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}
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}
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void __cpuinit arch_cpu_pre_online(void *arg)
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{
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unsigned int cpuid = hard_smp_processor_id();
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register_percpu_ce(cpuid);
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calibrate_delay();
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smp_store_cpu_info(cpuid);
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local_ops->cache_all();
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local_ops->tlb_all();
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switch(sparc_cpu_model) {
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case sun4m:
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sun4m_cpu_pre_online(arg);
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break;
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case sun4d:
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sun4d_cpu_pre_online(arg);
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break;
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case sparc_leon:
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leon_cpu_pre_online(arg);
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break;
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default:
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BUG();
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}
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}
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void __cpuinit sparc_start_secondary(void *arg)
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{
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unsigned int cpu;
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/*
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* SMP booting is extremely fragile in some architectures. So run
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* the cpu initialization code first before anything else.
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*/
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arch_cpu_pre_starting(arg);
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preempt_disable();
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cpu = smp_processor_id();
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/* Invoke the CPU_STARTING notifier callbacks */
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notify_cpu_starting(cpu);
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arch_cpu_pre_online(arg);
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/* Set the CPU in the cpu_online_mask */
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set_cpu_online(cpu, true);
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/* Enable local interrupts now */
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local_irq_enable();
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wmb();
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cpu_idle();
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/* We should never reach here! */
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BUG();
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}
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void __cpuinit smp_callin(void)
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{
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sparc_start_secondary(NULL);
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}
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void smp_bogo(struct seq_file *m)
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{
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int i;
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@ -50,10 +50,9 @@ static inline void show_leds(int cpuid)
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"i" (ASI_M_CTL));
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}
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void __cpuinit smp4d_callin(void)
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void __cpuinit sun4d_cpu_pre_starting(void *arg)
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{
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int cpuid = hard_smp_processor_id();
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unsigned long flags;
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/* Show we are alive */
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cpu_leds[cpuid] = 0x6;
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@ -61,26 +60,20 @@ void __cpuinit smp4d_callin(void)
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/* Enable level15 interrupt, disable level14 interrupt for now */
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cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
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}
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local_ops->cache_all();
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local_ops->tlb_all();
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void __cpuinit sun4d_cpu_pre_online(void *arg)
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{
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unsigned long flags;
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int cpuid;
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notify_cpu_starting(cpuid);
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/*
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* Unblock the master CPU _only_ when the scheduler state
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cpuid = hard_smp_processor_id();
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/* Unblock the master CPU _only_ when the scheduler state
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* of all secondary CPUs will be up-to-date, so after
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* the SMP initialization the master will be just allowed
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* to call the scheduler code.
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*/
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/* Get our local ticker going. */
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register_percpu_ce(cpuid);
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calibrate_delay();
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smp_store_cpu_info(cpuid);
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local_ops->cache_all();
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local_ops->tlb_all();
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/* Allow master to continue. */
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sun4d_swap((unsigned long *)&cpu_callin_map[cpuid], 1);
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local_ops->cache_all();
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local_ops->tlb_all();
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@ -106,16 +99,12 @@ void __cpuinit smp4d_callin(void)
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local_ops->cache_all();
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local_ops->tlb_all();
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local_irq_enable(); /* We don't allow PIL 14 yet */
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while (!cpumask_test_cpu(cpuid, &smp_commenced_mask))
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barrier();
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spin_lock_irqsave(&sun4d_imsk_lock, flags);
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cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
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spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
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set_cpu_online(cpuid, true);
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}
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/*
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@ -34,30 +34,19 @@ swap_ulong(volatile unsigned long *ptr, unsigned long val)
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return val;
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}
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void __cpuinit smp4m_callin(void)
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void __cpuinit sun4m_cpu_pre_starting(void *arg)
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{
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}
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void __cpuinit sun4m_cpu_pre_online(void *arg)
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{
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int cpuid = hard_smp_processor_id();
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local_ops->cache_all();
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local_ops->tlb_all();
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notify_cpu_starting(cpuid);
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register_percpu_ce(cpuid);
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calibrate_delay();
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smp_store_cpu_info(cpuid);
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local_ops->cache_all();
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local_ops->tlb_all();
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/*
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* Unblock the master CPU _only_ when the scheduler state
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* of all secondary CPUs will be up-to-date, so after
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* the SMP initialization the master will be just allowed
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* to call the scheduler code.
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/* Allow master to continue. The master will then give us the
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* go-ahead by setting the smp_commenced_mask and will wait without
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* timeouts until our setup is completed fully (signified by
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* our bit being set in the cpu_online_mask).
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*/
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/* Allow master to continue. */
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swap_ulong(&cpu_callin_map[cpuid], 1);
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/* XXX: What's up with all the flushes? */
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@ -75,10 +64,6 @@ void __cpuinit smp4m_callin(void)
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while (!cpumask_test_cpu(cpuid, &smp_commenced_mask))
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mb();
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local_irq_enable();
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set_cpu_online(cpuid, true);
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}
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/*
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nop
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/* Start this processor. */
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call smp4m_callin
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call smp_callin
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nop
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b,a smp_do_cpu_idle
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b,a smp_panic
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.text
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.align 4
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smp_do_cpu_idle:
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call cpu_idle
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mov 0, %o0
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smp_panic:
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call cpu_panic
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nop
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@ -144,10 +141,10 @@ sun4d_cpu_startup:
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nop
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/* Start this processor. */
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call smp4d_callin
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call smp_callin
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nop
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b,a smp_do_cpu_idle
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b,a smp_panic
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__CPUINIT
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.align 4
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@ -201,7 +198,7 @@ leon_smp_cpu_startup:
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nop
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/* Start this processor. */
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call leon_callin
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call smp_callin
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nop
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b,a smp_do_cpu_idle
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b,a smp_panic
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