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ssb: get alp clock from devices with PMU

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If there is a PMU in the device, get the alp clock from that part and
do not assume 20000000.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Hauke Mehrtens 2012-12-05 18:46:03 +01:00 committed by John W. Linville
parent a4855f39d4
commit f924e1e989
3 changed files with 37 additions and 6 deletions
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15
drivers/ssb/driver_chipcommon.c
View File

@ -280,6 +280,14 @@ static void calc_fast_powerup_delay(struct ssb_chipcommon *cc)
cc->fast_pwrup_delay = tmp; cc->fast_pwrup_delay = tmp;
} }
static u32 ssb_chipco_alp_clock(struct ssb_chipcommon *cc)
{
if (cc->capabilities & SSB_CHIPCO_CAP_PMU)
return ssb_pmu_get_alp_clock(cc);
return 20000000;
}
void ssb_chipcommon_init(struct ssb_chipcommon *cc) void ssb_chipcommon_init(struct ssb_chipcommon *cc)
{ {
if (!cc->dev) if (!cc->dev)
@ -473,12 +481,7 @@ int ssb_chipco_serial_init(struct ssb_chipcommon *cc,
chipco_read32(cc, SSB_CHIPCO_CORECTL) chipco_read32(cc, SSB_CHIPCO_CORECTL)
| SSB_CHIPCO_CORECTL_UARTCLK0); | SSB_CHIPCO_CORECTL_UARTCLK0);
} else if ((ccrev >= 11) && (ccrev != 15)) { } else if ((ccrev >= 11) && (ccrev != 15)) {
/* Fixed ALP clock */ baud_base = ssb_chipco_alp_clock(cc);
baud_base = 20000000;
if (cc->capabilities & SSB_CHIPCO_CAP_PMU) {
/* FIXME: baud_base is different for devices with a PMU */
SSB_WARN_ON(1);
}
div = 1; div = 1;
if (ccrev >= 21) { if (ccrev >= 21) {
/* Turn off UART clock before switching clocksource. */ /* Turn off UART clock before switching clocksource. */

27
drivers/ssb/driver_chipcommon_pmu.c
View File

@ -618,6 +618,33 @@ void ssb_pmu_set_ldo_paref(struct ssb_chipcommon *cc, bool on)
EXPORT_SYMBOL(ssb_pmu_set_ldo_voltage); EXPORT_SYMBOL(ssb_pmu_set_ldo_voltage);
EXPORT_SYMBOL(ssb_pmu_set_ldo_paref); EXPORT_SYMBOL(ssb_pmu_set_ldo_paref);
static u32 ssb_pmu_get_alp_clock_clk0(struct ssb_chipcommon *cc)
{
u32 crystalfreq;
const struct pmu0_plltab_entry *e = NULL;
crystalfreq = chipco_read32(cc, SSB_CHIPCO_PMU_CTL) &
SSB_CHIPCO_PMU_CTL_XTALFREQ >> SSB_CHIPCO_PMU_CTL_XTALFREQ_SHIFT;
e = pmu0_plltab_find_entry(crystalfreq);
BUG_ON(!e);
return e->freq * 1000;
}
u32 ssb_pmu_get_alp_clock(struct ssb_chipcommon *cc)
{
struct ssb_bus *bus = cc->dev->bus;
switch (bus->chip_id) {
case 0x5354:
ssb_pmu_get_alp_clock_clk0(cc);
default:
ssb_printk(KERN_ERR PFX
"ERROR: PMU alp clock unknown for device %04X\n",
bus->chip_id);
return 0;
}
}
u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc) u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc)
{ {
struct ssb_bus *bus = cc->dev->bus; struct ssb_bus *bus = cc->dev->bus;

1
drivers/ssb/ssb_private.h
View File

@ -210,5 +210,6 @@ static inline void b43_pci_ssb_bridge_exit(void)
/* driver_chipcommon_pmu.c */ /* driver_chipcommon_pmu.c */
extern u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc); extern u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc);
extern u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc); extern u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc);
extern u32 ssb_pmu_get_alp_clock(struct ssb_chipcommon *cc);
#endif /* LINUX_SSB_PRIVATE_H_ */ #endif /* LINUX_SSB_PRIVATE_H_ */