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drm/i915: make PCH_GMBUS* definitions private to gvt

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This is the only place that they are being used - the others use the
GMBUS* macros that rely on dev_priv being already properly initialized.

Cc: intel-gvt-dev@lists.freedesktop.org
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180727193647.8639-1-lucas.demarchi@intel.com
This commit is contained in:
Lucas De Marchi 2018-07-27 12:36:45 -07:00 committed by Rodrigo Vivi
parent 2cd9a689e9
commit f5133cca38
2 changed files with 7 additions and 7 deletions
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7
drivers/gpu/drm/i915/gvt/reg.h
View File

@ -77,4 +77,11 @@
#define _RING_CTL_BUF_SIZE(ctl) (((ctl) & RB_TAIL_SIZE_MASK) + \
I915_GTT_PAGE_SIZE)
#define PCH_GMBUS0 _MMIO(0xc5100)
#define PCH_GMBUS1 _MMIO(0xc5104)
#define PCH_GMBUS2 _MMIO(0xc5108)
#define PCH_GMBUS3 _MMIO(0xc510c)
#define PCH_GMBUS4 _MMIO(0xc5110)
#define PCH_GMBUS5 _MMIO(0xc5120)
#endif

7
drivers/gpu/drm/i915/i915_reg.h
View File

@ -7790,13 +7790,6 @@ enum {
#define PCH_GPIOE _MMIO(0xc5020)
#define PCH_GPIOF _MMIO(0xc5024)
#define PCH_GMBUS0 _MMIO(0xc5100)
#define PCH_GMBUS1 _MMIO(0xc5104)
#define PCH_GMBUS2 _MMIO(0xc5108)
#define PCH_GMBUS3 _MMIO(0xc510c)
#define PCH_GMBUS4 _MMIO(0xc5110)
#define PCH_GMBUS5 _MMIO(0xc5120)
#define _PCH_DPLL_A 0xc6014
#define _PCH_DPLL_B 0xc6018
#define PCH_DPLL(pll) _MMIO((pll) == 0 ? _PCH_DPLL_A : _PCH_DPLL_B)