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e1000e: clearing interrupt timers causes descriptors to get flushed

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Clearing the interrupt timers following an IMS clear has the unwanted
side-effect of flushing all descriptors immediately following a partial
write when interrupts are disabled.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Bruce Allan 2009-11-20 23:22:39 +00:00 committed by David S. Miller
parent f89271dda9
commit f4e2c6db7f
1 changed files with 0 additions and 2 deletions
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2
drivers/net/e1000e/netdev.c
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@ -2441,8 +2441,6 @@ static void e1000_configure_rx(struct e1000_adapter *adapter)
ew32(ITR, 1000000000 / (adapter->itr * 256));
ctrl_ext = er32(CTRL_EXT);
/* Reset delay timers after every interrupt */
ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
/* Auto-Mask interrupts upon ICR access */
ctrl_ext |= E1000_CTRL_EXT_IAME;
ew32(IAM, 0xffffffff);