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reset: socfpga: fix for 64-bit compilation

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The SoCFPGA Stratix10 reset controller has 32-bit registers. Thus, we
cannot use BITS_PER_LONG in computing the register and bit offset. Instead,
we should be using the width of the hardware register for the calculation.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
This commit is contained in:
Dinh Nguyen 2017-09-22 13:42:47 -05:00 committed by Philipp Zabel
parent 544e3bf4f0
commit f450f28e70
1 changed files with 10 additions and 7 deletions
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17
drivers/reset/reset-socfpga.c
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@ -40,8 +40,9 @@ static int socfpga_reset_assert(struct reset_controller_dev *rcdev,
struct socfpga_reset_data *data = container_of(rcdev, struct socfpga_reset_data *data = container_of(rcdev,
struct socfpga_reset_data, struct socfpga_reset_data,
rcdev); rcdev);
int bank = id / BITS_PER_LONG; int reg_width = sizeof(u32);
int offset = id % BITS_PER_LONG; int bank = id / (reg_width * BITS_PER_BYTE);
int offset = id % (reg_width * BITS_PER_BYTE);
unsigned long flags; unsigned long flags;
u32 reg; u32 reg;
@ -61,8 +62,9 @@ static int socfpga_reset_deassert(struct reset_controller_dev *rcdev,
struct socfpga_reset_data, struct socfpga_reset_data,
rcdev); rcdev);
int bank = id / BITS_PER_LONG; int reg_width = sizeof(u32);
int offset = id % BITS_PER_LONG; int bank = id / (reg_width * BITS_PER_BYTE);
int offset = id % (reg_width * BITS_PER_BYTE);
unsigned long flags; unsigned long flags;
u32 reg; u32 reg;
@ -81,8 +83,9 @@ static int socfpga_reset_status(struct reset_controller_dev *rcdev,
{ {
struct socfpga_reset_data *data = container_of(rcdev, struct socfpga_reset_data *data = container_of(rcdev,
struct socfpga_reset_data, rcdev); struct socfpga_reset_data, rcdev);
int bank = id / BITS_PER_LONG; int reg_width = sizeof(u32);
int offset = id % BITS_PER_LONG; int bank = id / (reg_width * BITS_PER_BYTE);
int offset = id % (reg_width * BITS_PER_BYTE);
u32 reg; u32 reg;
reg = readl(data->membase + (bank * BANK_INCREMENT)); reg = readl(data->membase + (bank * BANK_INCREMENT));
@ -132,7 +135,7 @@ static int socfpga_reset_probe(struct platform_device *pdev)
spin_lock_init(&data->lock); spin_lock_init(&data->lock);
data->rcdev.owner = THIS_MODULE; data->rcdev.owner = THIS_MODULE;
data->rcdev.nr_resets = NR_BANKS * BITS_PER_LONG; data->rcdev.nr_resets = NR_BANKS * (sizeof(u32) * BITS_PER_BYTE);
data->rcdev.ops = &socfpga_reset_ops; data->rcdev.ops = &socfpga_reset_ops;
data->rcdev.of_node = pdev->dev.of_node; data->rcdev.of_node = pdev->dev.of_node;