Reset controller changes for v4.13, part 2
- Add reset manager offsets for Stratix10 - Use kref for reset contol reference counting - Add new TI SCI reset driver for TI Keystone SoCs -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEBsBxhV1FaKwXuCOBUMKIHHCeYOsFAlk499YXHHAuemFiZWxA cGVuZ3V0cm9uaXguZGUACgkQUMKIHHCeYOtSBA//ZFwrHSs4o/N0ilrYDxXJnlkz 0wMjE1LPWUmE+vfHHxYbm/ROKWtcezc9vWc36XRSoNxgekutynUzgdMWnn+oE1gy +Uc0nl08w1ZLnSx+fF84Ihi/aspA63AZHS7HVOxwKRTDSRqippL3GZyiAIglHD8K hQTY4xNz0Y71Xr75AeoLopo18fXd8ux659jPQQBNmZ7o2To576pHiNFPNlzMCIV4 zUglgqWHtZvRwSq7rvY4W7PV955p9SBYDjEvgPzbrx7i0x6X5dl2+xgstntol3Ie QlbI6wOQlre546X9swVmv2XQDDtRrRGc8+vdD8UPFX81Ju2GhE0cMOYFTaWxVeVS aaEInlVlJ5S2vOpEilJefpGQDDhR8DjH3p53bDPZ6GC1F44gaheOfnzncNb9H9uS UnkACygpGLAkCEFrvxxdKY9ru+bze+EVdK5vP3BDiOeejIbmPK5v1s2dRQnzuAe/ xeVmsblO9eve+lf2s181G76rfsi9J0sc/uawLopKqW/2kSdYYD89JcDzG1F42czX cngjCoJdt5xhDlgLCzTFMWXVJxLSPU4h4uXzitu6Yzf7uG6snlUsPuzl3u6p5725 9xdvNCWa1SIhMPtBKFfIHx0lQcZR5dbnE4VBe2iY5Vgcbcr6VJW/7IimvmoH7PFS oKvHVwTceDEghpE3mMg= =H1aE -----END PGP SIGNATURE----- Merge tag 'reset-for-4.13-2' of git://git.pengutronix.de/git/pza/linux into next/drivers Reset controller changes for v4.13, part 2 - Add reset manager offsets for Stratix10 - Use kref for reset contol reference counting - Add new TI SCI reset driver for TI Keystone SoCs * tag 'reset-for-4.13-2' of git://git.pengutronix.de/git/pza/linux: reset: Add the TI SCI reset driver dt-bindings: reset: Add TI SCI reset binding reset: use kref for reference counting dt-bindings: reset: Add reset manager offsets for Stratix10 Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
f44a12dcd9
62
Documentation/devicetree/bindings/reset/ti,sci-reset.txt
Normal file
62
Documentation/devicetree/bindings/reset/ti,sci-reset.txt
Normal file
@ -0,0 +1,62 @@
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Texas Instruments System Control Interface (TI-SCI) Reset Controller
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=====================================================================
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Some TI SoCs contain a system controller (like the Power Management Micro
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Controller (PMMC) on Keystone 66AK2G SoC) that are responsible for controlling
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the state of the various hardware modules present on the SoC. Communication
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between the host processor running an OS and the system controller happens
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through a protocol called TI System Control Interface (TI-SCI protocol).
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For TI SCI details, please refer to the document,
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Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
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TI-SCI Reset Controller Node
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============================
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This reset controller node uses the TI SCI protocol to perform the reset
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management of various hardware modules present on the SoC. Must be a child
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node of the associated TI-SCI system controller node.
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Required properties:
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--------------------
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- compatible : Should be "ti,sci-reset"
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- #reset-cells : Should be 2. Please see the reset consumer node below for
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usage details.
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TI-SCI Reset Consumer Nodes
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===========================
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Each of the reset consumer nodes should have the following properties,
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in addition to their own properties.
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Required properties:
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--------------------
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- resets : A phandle and reset specifier pair, one pair for each reset
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signal that affects the device, or that the device manages.
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The phandle should point to the TI-SCI reset controller node,
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and the reset specifier should have 2 cell-values. The first
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cell should contain the device ID. The second cell should
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contain the reset mask value used by system controller.
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Please refer to the protocol documentation for these values
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to be used for different devices,
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http://processors.wiki.ti.com/index.php/TISCI#66AK2G02_Data
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Please also refer to Documentation/devicetree/bindings/reset/reset.txt for
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common reset controller usage by consumers.
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Example:
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--------
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The following example demonstrates both a TI-SCI reset controller node and a
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consumer (a DSP device) on the 66AK2G SoC.
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pmmc: pmmc {
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compatible = "ti,k2g-sci";
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k2g_reset: reset-controller {
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compatible = "ti,sci-reset";
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#reset-cells = <2>;
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};
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};
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dsp0: dsp@10800000 {
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...
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resets = <&k2g_reset 0x0046 0x1>;
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...
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};
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@ -12633,6 +12633,8 @@ F: include/linux/soc/ti/ti_sci_protocol.h
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F: Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
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F: include/dt-bindings/genpd/k2g.h
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F: drivers/soc/ti/ti_sci_pm_domains.c
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F: Documentation/devicetree/bindings/reset/ti,sci-reset.txt
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F: drivers/reset/reset-ti-sci.c
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THANKO'S RAREMONO AM/FM/SW RADIO RECEIVER USB DRIVER
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M: Hans Verkuil <hverkuil@xs4all.nl>
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@ -87,6 +87,14 @@ config RESET_SUNXI
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help
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This enables the reset driver for Allwinner SoCs.
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config RESET_TI_SCI
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tristate "TI System Control Interface (TI-SCI) reset driver"
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depends on TI_SCI_PROTOCOL
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help
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This enables the reset driver support over TI System Control Interface
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available on some new TI's SoCs. If you wish to use reset resources
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managed by the TI System Controller, say Y here. Otherwise, say N.
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config RESET_TI_SYSCON
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tristate "TI SYSCON Reset Driver"
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depends on HAS_IOMEM
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@ -14,6 +14,7 @@ obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
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obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
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obj-$(CONFIG_RESET_STM32) += reset-stm32.o
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obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
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obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
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obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o
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obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
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obj-$(CONFIG_RESET_ZX2967) += reset-zx2967.o
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@ -13,6 +13,7 @@
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#include <linux/err.h>
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#include <linux/export.h>
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#include <linux/kernel.h>
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#include <linux/kref.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/reset.h>
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@ -40,7 +41,7 @@ struct reset_control {
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struct reset_controller_dev *rcdev;
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struct list_head list;
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unsigned int id;
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unsigned int refcnt;
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struct kref refcnt;
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bool shared;
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atomic_t deassert_count;
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atomic_t triggered_count;
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@ -288,7 +289,7 @@ static struct reset_control *__reset_control_get_internal(
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if (WARN_ON(!rstc->shared || !shared))
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return ERR_PTR(-EBUSY);
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rstc->refcnt++;
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kref_get(&rstc->refcnt);
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return rstc;
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}
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}
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@ -302,23 +303,30 @@ static struct reset_control *__reset_control_get_internal(
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rstc->rcdev = rcdev;
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list_add(&rstc->list, &rcdev->reset_control_head);
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rstc->id = index;
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rstc->refcnt = 1;
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kref_init(&rstc->refcnt);
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rstc->shared = shared;
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return rstc;
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}
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static void __reset_control_release(struct kref *kref)
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{
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struct reset_control *rstc = container_of(kref, struct reset_control,
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refcnt);
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lockdep_assert_held(&reset_list_mutex);
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module_put(rstc->rcdev->owner);
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list_del(&rstc->list);
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kfree(rstc);
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}
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static void __reset_control_put_internal(struct reset_control *rstc)
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{
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lockdep_assert_held(&reset_list_mutex);
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if (--rstc->refcnt)
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return;
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module_put(rstc->rcdev->owner);
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list_del(&rstc->list);
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kfree(rstc);
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kref_put(&rstc->refcnt, __reset_control_release);
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}
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struct reset_control *__of_reset_control_get(struct device_node *node,
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@ -400,7 +408,6 @@ EXPORT_SYMBOL_GPL(__reset_control_get);
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* reset_control_put - free the reset controller
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* @rstc: reset controller
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*/
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void reset_control_put(struct reset_control *rstc)
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{
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if (IS_ERR_OR_NULL(rstc))
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269
drivers/reset/reset-ti-sci.c
Normal file
269
drivers/reset/reset-ti-sci.c
Normal file
@ -0,0 +1,269 @@
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/*
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* Texas Instrument's System Control Interface (TI-SCI) reset driver
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*
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* Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
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* Andrew F. Davis <afd@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/idr.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/reset-controller.h>
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#include <linux/soc/ti/ti_sci_protocol.h>
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/**
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* struct ti_sci_reset_control - reset control structure
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* @dev_id: SoC-specific device identifier
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* @reset_mask: reset mask to use for toggling reset
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* @lock: synchronize reset_mask read-modify-writes
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*/
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struct ti_sci_reset_control {
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u32 dev_id;
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u32 reset_mask;
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struct mutex lock;
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};
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/**
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* struct ti_sci_reset_data - reset controller information structure
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* @rcdev: reset controller entity
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* @dev: reset controller device pointer
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* @sci: TI SCI handle used for communication with system controller
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* @idr: idr structure for mapping ids to reset control structures
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*/
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struct ti_sci_reset_data {
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struct reset_controller_dev rcdev;
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struct device *dev;
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const struct ti_sci_handle *sci;
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struct idr idr;
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};
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#define to_ti_sci_reset_data(p) \
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container_of((p), struct ti_sci_reset_data, rcdev)
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/**
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* ti_sci_reset_set() - program a device's reset
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* @rcdev: reset controller entity
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* @id: ID of the reset to toggle
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* @assert: boolean flag to indicate assert or deassert
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*
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* This is a common internal function used to assert or deassert a device's
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* reset using the TI SCI protocol. The device's reset is asserted if the
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* @assert argument is true, or deasserted if @assert argument is false.
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* The mechanism itself is a read-modify-write procedure, the current device
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* reset register is read using a TI SCI device operation, the new value is
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* set or un-set using the reset's mask, and the new reset value written by
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* using another TI SCI device operation.
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*
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* Return: 0 for successful request, else a corresponding error value
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*/
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static int ti_sci_reset_set(struct reset_controller_dev *rcdev,
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unsigned long id, bool assert)
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{
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struct ti_sci_reset_data *data = to_ti_sci_reset_data(rcdev);
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const struct ti_sci_handle *sci = data->sci;
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const struct ti_sci_dev_ops *dev_ops = &sci->ops.dev_ops;
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struct ti_sci_reset_control *control;
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u32 reset_state;
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int ret;
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control = idr_find(&data->idr, id);
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if (!control)
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return -EINVAL;
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mutex_lock(&control->lock);
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ret = dev_ops->get_device_resets(sci, control->dev_id, &reset_state);
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if (ret)
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goto out;
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if (assert)
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reset_state |= control->reset_mask;
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else
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reset_state &= ~control->reset_mask;
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ret = dev_ops->set_device_resets(sci, control->dev_id, reset_state);
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out:
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mutex_unlock(&control->lock);
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return ret;
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}
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/**
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* ti_sci_reset_assert() - assert device reset
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* @rcdev: reset controller entity
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* @id: ID of the reset to be asserted
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*
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* This function implements the reset driver op to assert a device's reset
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* using the TI SCI protocol. This invokes the function ti_sci_reset_set()
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* with the corresponding parameters as passed in, but with the @assert
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* argument set to true for asserting the reset.
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*
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* Return: 0 for successful request, else a corresponding error value
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*/
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static int ti_sci_reset_assert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return ti_sci_reset_set(rcdev, id, true);
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}
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/**
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* ti_sci_reset_deassert() - deassert device reset
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* @rcdev: reset controller entity
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* @id: ID of the reset to be deasserted
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*
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* This function implements the reset driver op to deassert a device's reset
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* using the TI SCI protocol. This invokes the function ti_sci_reset_set()
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* with the corresponding parameters as passed in, but with the @assert
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* argument set to false for deasserting the reset.
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*
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* Return: 0 for successful request, else a corresponding error value
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*/
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static int ti_sci_reset_deassert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return ti_sci_reset_set(rcdev, id, false);
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}
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/**
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* ti_sci_reset_status() - check device reset status
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* @rcdev: reset controller entity
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* @id: ID of reset to be checked
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*
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* This function implements the reset driver op to return the status of a
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* device's reset using the TI SCI protocol. The reset register value is read
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* by invoking the TI SCI device operation .get_device_resets(), and the
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* status of the specific reset is extracted and returned using this reset's
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* reset mask.
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*
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* Return: 0 if reset is deasserted, or a non-zero value if reset is asserted
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*/
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static int ti_sci_reset_status(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct ti_sci_reset_data *data = to_ti_sci_reset_data(rcdev);
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const struct ti_sci_handle *sci = data->sci;
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const struct ti_sci_dev_ops *dev_ops = &sci->ops.dev_ops;
|
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struct ti_sci_reset_control *control;
|
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u32 reset_state;
|
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int ret;
|
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|
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control = idr_find(&data->idr, id);
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||||
if (!control)
|
||||
return -EINVAL;
|
||||
|
||||
ret = dev_ops->get_device_resets(sci, control->dev_id, &reset_state);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
return reset_state & control->reset_mask;
|
||||
}
|
||||
|
||||
static const struct reset_control_ops ti_sci_reset_ops = {
|
||||
.assert = ti_sci_reset_assert,
|
||||
.deassert = ti_sci_reset_deassert,
|
||||
.status = ti_sci_reset_status,
|
||||
};
|
||||
|
||||
/**
|
||||
* ti_sci_reset_of_xlate() - translate a set of OF arguments to a reset ID
|
||||
* @rcdev: reset controller entity
|
||||
* @reset_spec: OF reset argument specifier
|
||||
*
|
||||
* This function performs the translation of the reset argument specifier
|
||||
* values defined in a reset consumer device node. The function allocates a
|
||||
* reset control structure for that device reset, and will be used by the
|
||||
* driver for performing any reset functions on that reset. An idr structure
|
||||
* is allocated and used to map to the reset control structure. This idr
|
||||
* is used by the driver to do reset lookups.
|
||||
*
|
||||
* Return: 0 for successful request, else a corresponding error value
|
||||
*/
|
||||
static int ti_sci_reset_of_xlate(struct reset_controller_dev *rcdev,
|
||||
const struct of_phandle_args *reset_spec)
|
||||
{
|
||||
struct ti_sci_reset_data *data = to_ti_sci_reset_data(rcdev);
|
||||
struct ti_sci_reset_control *control;
|
||||
|
||||
if (WARN_ON(reset_spec->args_count != rcdev->of_reset_n_cells))
|
||||
return -EINVAL;
|
||||
|
||||
control = devm_kzalloc(data->dev, sizeof(*control), GFP_KERNEL);
|
||||
if (!control)
|
||||
return -ENOMEM;
|
||||
|
||||
control->dev_id = reset_spec->args[0];
|
||||
control->reset_mask = reset_spec->args[1];
|
||||
mutex_init(&control->lock);
|
||||
|
||||
return idr_alloc(&data->idr, control, 0, 0, GFP_KERNEL);
|
||||
}
|
||||
|
||||
static const struct of_device_id ti_sci_reset_of_match[] = {
|
||||
{ .compatible = "ti,sci-reset", },
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, ti_sci_reset_of_match);
|
||||
|
||||
static int ti_sci_reset_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct ti_sci_reset_data *data;
|
||||
|
||||
if (!pdev->dev.of_node)
|
||||
return -ENODEV;
|
||||
|
||||
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
|
||||
if (!data)
|
||||
return -ENOMEM;
|
||||
|
||||
data->sci = devm_ti_sci_get_handle(&pdev->dev);
|
||||
if (IS_ERR(data->sci))
|
||||
return PTR_ERR(data->sci);
|
||||
|
||||
data->rcdev.ops = &ti_sci_reset_ops;
|
||||
data->rcdev.owner = THIS_MODULE;
|
||||
data->rcdev.of_node = pdev->dev.of_node;
|
||||
data->rcdev.of_reset_n_cells = 2;
|
||||
data->rcdev.of_xlate = ti_sci_reset_of_xlate;
|
||||
data->dev = &pdev->dev;
|
||||
idr_init(&data->idr);
|
||||
|
||||
platform_set_drvdata(pdev, data);
|
||||
|
||||
return reset_controller_register(&data->rcdev);
|
||||
}
|
||||
|
||||
static int ti_sci_reset_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct ti_sci_reset_data *data = platform_get_drvdata(pdev);
|
||||
|
||||
reset_controller_unregister(&data->rcdev);
|
||||
|
||||
idr_destroy(&data->idr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver ti_sci_reset_driver = {
|
||||
.probe = ti_sci_reset_probe,
|
||||
.remove = ti_sci_reset_remove,
|
||||
.driver = {
|
||||
.name = "ti-sci-reset",
|
||||
.of_match_table = ti_sci_reset_of_match,
|
||||
},
|
||||
};
|
||||
module_platform_driver(ti_sci_reset_driver);
|
||||
|
||||
MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
|
||||
MODULE_DESCRIPTION("TI System Control Interface (TI SCI) Reset driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
108
include/dt-bindings/reset/altr,rst-mgr-s10.h
Normal file
108
include/dt-bindings/reset/altr,rst-mgr-s10.h
Normal file
@ -0,0 +1,108 @@
|
||||
/*
|
||||
* Copyright (C) 2016 Intel Corporation. All rights reserved
|
||||
* Copyright (C) 2016 Altera Corporation. All rights reserved
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
* derived from Steffen Trumtrar's "altr,rst-mgr-a10.h"
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_S10_H
|
||||
#define _DT_BINDINGS_RESET_ALTR_RST_MGR_S10_H
|
||||
|
||||
/* MPUMODRST */
|
||||
#define CPU0_RESET 0
|
||||
#define CPU1_RESET 1
|
||||
#define CPU2_RESET 2
|
||||
#define CPU3_RESET 3
|
||||
|
||||
/* PER0MODRST */
|
||||
#define EMAC0_RESET 32
|
||||
#define EMAC1_RESET 33
|
||||
#define EMAC2_RESET 34
|
||||
#define USB0_RESET 35
|
||||
#define USB1_RESET 36
|
||||
#define NAND_RESET 37
|
||||
/* 38 is empty */
|
||||
#define SDMMC_RESET 39
|
||||
#define EMAC0_OCP_RESET 40
|
||||
#define EMAC1_OCP_RESET 41
|
||||
#define EMAC2_OCP_RESET 42
|
||||
#define USB0_OCP_RESET 43
|
||||
#define USB1_OCP_RESET 44
|
||||
#define NAND_OCP_RESET 45
|
||||
/* 46 is empty */
|
||||
#define SDMMC_OCP_RESET 47
|
||||
#define DMA_RESET 48
|
||||
#define SPIM0_RESET 49
|
||||
#define SPIM1_RESET 50
|
||||
#define SPIS0_RESET 51
|
||||
#define SPIS1_RESET 52
|
||||
#define DMA_OCP_RESET 53
|
||||
#define EMAC_PTP_RESET 54
|
||||
/* 55 is empty*/
|
||||
#define DMAIF0_RESET 56
|
||||
#define DMAIF1_RESET 57
|
||||
#define DMAIF2_RESET 58
|
||||
#define DMAIF3_RESET 59
|
||||
#define DMAIF4_RESET 60
|
||||
#define DMAIF5_RESET 61
|
||||
#define DMAIF6_RESET 62
|
||||
#define DMAIF7_RESET 63
|
||||
|
||||
/* PER1MODRST */
|
||||
#define WATCHDOG0_RESET 64
|
||||
#define WATCHDOG1_RESET 65
|
||||
#define WATCHDOG2_RESET 66
|
||||
#define WATCHDOG3_RESET 67
|
||||
#define L4SYSTIMER0_RESET 68
|
||||
#define L4SYSTIMER1_RESET 69
|
||||
#define SPTIMER0_RESET 70
|
||||
#define SPTIMER1_RESET 71
|
||||
#define I2C0_RESET 72
|
||||
#define I2C1_RESET 73
|
||||
#define I2C2_RESET 74
|
||||
#define I2C3_RESET 75
|
||||
#define I2C4_RESET 76
|
||||
/* 77-79 is empty */
|
||||
#define UART0_RESET 80
|
||||
#define UART1_RESET 81
|
||||
/* 82-87 is empty */
|
||||
#define GPIO0_RESET 88
|
||||
#define GPIO1_RESET 89
|
||||
|
||||
/* BRGMODRST */
|
||||
#define SOC2FPGA_RESET 96
|
||||
#define LWHPS2FPGA_RESET 97
|
||||
#define FPGA2SOC_RESET 98
|
||||
#define F2SSDRAM0_RESET 99
|
||||
#define F2SSDRAM1_RESET 100
|
||||
#define F2SSDRAM2_RESET 101
|
||||
#define DDRSCH_RESET 102
|
||||
|
||||
/* COLDMODRST */
|
||||
#define CPUPO0_RESET 160
|
||||
#define CPUPO1_RESET 161
|
||||
#define CPUPO2_RESET 162
|
||||
#define CPUPO3_RESET 163
|
||||
/* 164-167 is empty */
|
||||
#define L2_RESET 168
|
||||
|
||||
/* DBGMODRST */
|
||||
#define DBG_RESET 224
|
||||
#define CSDAP_RESET 225
|
||||
|
||||
/* TAPMODRST */
|
||||
#define TAP_RESET 256
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user