drm/i915: Enable the overlay right after primary and cursor planes
Again follow the same sequence for all generations, because doing otherwise just doesn't make sense. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -3622,11 +3622,11 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
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intel_enable_plane(dev_priv, plane, pipe);
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intel_crtc_update_cursor(crtc, true);
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intel_update_fbc(dev);
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/* Give the overlay scaler a chance to enable if it's on this pipe */
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intel_crtc_dpms_overlay(intel_crtc, true);
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intel_update_fbc(dev);
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mutex_unlock(&dev_priv->dpio_lock);
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}
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@ -3664,11 +3664,11 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
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if (IS_G4X(dev))
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g4x_fixup_plane(dev_priv, pipe);
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intel_update_fbc(dev);
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/* Give the overlay scaler a chance to enable if it's on this pipe */
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intel_crtc_dpms_overlay(intel_crtc, true);
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intel_update_fbc(dev);
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for_each_encoder_on_crtc(dev, crtc, encoder)
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encoder->enable(encoder);
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}
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