ARM: dts: imx: add cooling-cells for cpufreq cooling device
Add #cooling-cells for i.MX6/7 SoCs for cpufreq cooling device usage. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Bastian Stender <bst@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@@ -33,6 +33,7 @@
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396000 1175000
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>;
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clock-latency = <61036>; /* two CLK32 periods */
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#cooling-cells = <2>;
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clocks = <&clks IMX6QDL_CLK_ARM>,
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<&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
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<&clks IMX6QDL_CLK_STEP>,
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@@ -38,6 +38,7 @@
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396000 1175000
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>;
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clock-latency = <61036>; /* two CLK32 periods */
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#cooling-cells = <2>;
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clocks = <&clks IMX6QDL_CLK_ARM>,
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<&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
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<&clks IMX6QDL_CLK_STEP>,
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@@ -60,6 +60,7 @@
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396000 1175000
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>;
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clock-latency = <61036>; /* two CLK32 periods */
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#cooling-cells = <2>;
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clocks = <&clks IMX6SL_CLK_ARM>, <&clks IMX6SL_CLK_PLL2_PFD2>,
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<&clks IMX6SL_CLK_STEP>, <&clks IMX6SL_CLK_PLL1_SW>,
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<&clks IMX6SL_CLK_PLL1_SYS>;
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@@ -79,6 +79,7 @@
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198000 1175000
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>;
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clock-latency = <61036>; /* two CLK32 periods */
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#cooling-cells = <2>;
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clocks = <&clks IMX6SX_CLK_ARM>,
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<&clks IMX6SX_CLK_PLL2_PFD2>,
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<&clks IMX6SX_CLK_STEP>,
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@@ -62,6 +62,7 @@
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device_type = "cpu";
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reg = <0>;
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clock-latency = <61036>; /* two CLK32 periods */
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#cooling-cells = <2>;
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operating-points = <
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/* kHz uV */
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696000 1275000
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@@ -11,6 +11,7 @@
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cpu0: cpu@0 {
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clock-frequency = <996000000>;
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operating-points-v2 = <&cpu0_opp_table>;
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#cooling-cells = <2>;
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};
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cpu1: cpu@1 {
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