forked from Minki/linux
[media] cx88: added support for Leadtek WinFast DTV2000 H Plus
This patch implements support for the Leadtek WinFast DTV2000 H Plus card with XC4000 tuner (107d:6f42). Signed-off-by: Istvan Varga <istvan_v@mailbox.hu> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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c21973e8aa
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@ -2120,6 +2120,58 @@ static const struct cx88_board cx88_boards[] = {
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},
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.mpeg = CX88_MPEG_DVB,
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},
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[CX88_BOARD_WINFAST_DTV2000H_PLUS] = {
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.name = "Leadtek WinFast DTV2000 H PLUS",
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.tuner_type = TUNER_XC4000,
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.radio_type = TUNER_XC4000,
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.tuner_addr = 0x61,
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.radio_addr = 0x61,
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/*
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* GPIO
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* 2: 1: mute audio
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* 12: 0: reset XC4000
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* 13: 1: audio input is line in (0: tuner)
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* 14: 0: FM radio
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* 16: 0: RF input is cable
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*/
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.input = {{
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.type = CX88_VMUX_TELEVISION,
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.vmux = 0,
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.gpio0 = 0x0403,
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.gpio1 = 0xF0D7,
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.gpio2 = 0x0101,
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.gpio3 = 0x0000,
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}, {
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.type = CX88_VMUX_CABLE,
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.vmux = 0,
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.gpio0 = 0x0403,
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.gpio1 = 0xF0D7,
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.gpio2 = 0x0100,
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.gpio3 = 0x0000,
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}, {
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.type = CX88_VMUX_COMPOSITE1,
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.vmux = 1,
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.gpio0 = 0x0403, /* was 0x0407 */
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.gpio1 = 0xF0F7,
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.gpio2 = 0x0101,
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.gpio3 = 0x0000,
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}, {
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.type = CX88_VMUX_SVIDEO,
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.vmux = 2,
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.gpio0 = 0x0403, /* was 0x0407 */
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.gpio1 = 0xF0F7,
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.gpio2 = 0x0101,
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.gpio3 = 0x0000,
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}},
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.radio = {
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.type = CX88_RADIO,
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.gpio0 = 0x0403,
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.gpio1 = 0xF097,
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.gpio2 = 0x0100,
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.gpio3 = 0x0000,
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},
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.mpeg = CX88_MPEG_DVB,
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},
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[CX88_BOARD_PROF_7301] = {
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.name = "Prof 7301 DVB-S/S2",
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.tuner_type = UNSET,
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@ -2581,6 +2633,10 @@ static const struct cx88_subid cx88_subids[] = {
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.subvendor = 0x107d,
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.subdevice = 0x6654,
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.card = CX88_BOARD_WINFAST_DTV1800H,
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}, {
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.subvendor = 0x107d,
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.subdevice = 0x6f42,
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.card = CX88_BOARD_WINFAST_DTV2000H_PLUS,
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}, {
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/* PVR2000 PAL Model [107d:6630] */
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.subvendor = 0x107d,
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@ -2847,6 +2903,23 @@ static int cx88_xc3028_winfast1800h_callback(struct cx88_core *core,
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return -EINVAL;
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}
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static int cx88_xc4000_winfast2000h_plus_callback(struct cx88_core *core,
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int command, int arg)
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{
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switch (command) {
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case XC4000_TUNER_RESET:
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/* GPIO 12 (xc4000 tuner reset) */
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cx_set(MO_GP1_IO, 0x1010);
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mdelay(50);
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cx_clear(MO_GP1_IO, 0x10);
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mdelay(75);
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cx_set(MO_GP1_IO, 0x10);
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mdelay(75);
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return 0;
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}
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return -EINVAL;
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}
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/* ------------------------------------------------------------------- */
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/* some Divco specific stuff */
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static int cx88_pv_8000gt_callback(struct cx88_core *core,
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@ -2954,6 +3027,9 @@ static int cx88_xc4000_tuner_callback(struct cx88_core *core,
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{
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/* Board-specific callbacks */
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switch (core->boardnr) {
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case CX88_BOARD_WINFAST_DTV2000H_PLUS:
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return cx88_xc4000_winfast2000h_plus_callback(core,
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command, arg);
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}
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return -EINVAL;
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}
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@ -3131,6 +3207,11 @@ static void cx88_card_setup_pre_i2c(struct cx88_core *core)
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mdelay(50);
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break;
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case CX88_BOARD_WINFAST_DTV2000H_PLUS:
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cx88_xc4000_winfast2000h_plus_callback(core,
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XC4000_TUNER_RESET, 0);
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break;
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case CX88_BOARD_TWINHAN_VP1027_DVBS:
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cx_write(MO_GP0_IO, 0x00003230);
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cx_write(MO_GP0_IO, 0x00003210);
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@ -1328,7 +1328,24 @@ static int dvb_register(struct cx8802_dev *dev)
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goto frontend_detach;
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}
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break;
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case CX88_BOARD_GENIATECH_X8000_MT:
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case CX88_BOARD_WINFAST_DTV2000H_PLUS:
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fe0->dvb.frontend = dvb_attach(zl10353_attach,
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&cx88_pinnacle_hybrid_pctv,
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&core->i2c_adap);
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if (fe0->dvb.frontend) {
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struct xc4000_config cfg = {
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.i2c_address = 0x61,
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.default_pm = 0,
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.dvb_amplitude = 134,
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.set_smoothedcvbs = 1,
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.if_khz = 4560
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};
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fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
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if (attach_xc4000(dev, &cfg) < 0)
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goto frontend_detach;
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}
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break;
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case CX88_BOARD_GENIATECH_X8000_MT:
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dev->ts_gen_cntrl = 0x00;
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fe0->dvb.frontend = dvb_attach(zl10353_attach,
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@ -1611,6 +1628,11 @@ static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
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udelay(1000);
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break;
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case CX88_BOARD_WINFAST_DTV2000H_PLUS:
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/* set RF input to AIR for DVB-T (GPIO 16) */
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cx_write(MO_GP2_IO, 0x0101);
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break;
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default:
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err = -ENODEV;
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}
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@ -100,6 +100,7 @@ static void cx88_ir_handle_key(struct cx88_IR *ir)
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break;
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case CX88_BOARD_WINFAST_DTV1000:
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case CX88_BOARD_WINFAST_DTV1800H:
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case CX88_BOARD_WINFAST_DTV2000H_PLUS:
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case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL:
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gpio = (gpio & 0x6ff) | ((cx_read(MO_GP1_IO) << 8) & 0x900);
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auxgpio = gpio;
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@ -289,6 +290,7 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
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case CX88_BOARD_WINFAST_DTV2000H:
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case CX88_BOARD_WINFAST_DTV2000H_J:
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case CX88_BOARD_WINFAST_DTV1800H:
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case CX88_BOARD_WINFAST_DTV2000H_PLUS:
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ir_codes = RC_MAP_WINFAST;
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ir->gpio_addr = MO_GP0_IO;
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ir->mask_keycode = 0x8f8;
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@ -242,6 +242,7 @@ extern const struct sram_channel const cx88_sram_channels[];
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#define CX88_BOARD_SAMSUNG_SMT_7020 84
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#define CX88_BOARD_TWINHAN_VP1027_DVBS 85
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#define CX88_BOARD_TEVII_S464 86
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#define CX88_BOARD_WINFAST_DTV2000H_PLUS 87
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enum cx88_itype {
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CX88_VMUX_COMPOSITE1 = 1,
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