ARM: OMAP2+: CM: make clkdm_hwsup operations static

These are not accessed outside the cm*.c files themselves, so make them
static.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tero Kristo 2014-10-27 08:39:24 -07:00 committed by Tony Lindgren
parent a8ae5afa5c
commit f2650d6e4f
8 changed files with 18 additions and 39 deletions

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@ -53,7 +53,7 @@ static void _write_clktrctrl(u8 c, s16 module, u32 mask)
omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL); omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL);
} }
bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask) static bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
{ {
u32 v; u32 v;
@ -64,12 +64,12 @@ bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
return (v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0; return (v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0;
} }
void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask) static void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
{ {
_write_clktrctrl(OMAP24XX_CLKSTCTRL_ENABLE_AUTO, module, mask); _write_clktrctrl(OMAP24XX_CLKSTCTRL_ENABLE_AUTO, module, mask);
} }
void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask) static void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
{ {
_write_clktrctrl(OMAP24XX_CLKSTCTRL_DISABLE_AUTO, module, mask); _write_clktrctrl(OMAP24XX_CLKSTCTRL_DISABLE_AUTO, module, mask);
} }

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@ -46,9 +46,6 @@
#ifndef __ASSEMBLER__ #ifndef __ASSEMBLER__
extern void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask);
extern void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask);
extern void omap2xxx_cm_set_dpll_disable_autoidle(void); extern void omap2xxx_cm_set_dpll_disable_autoidle(void);
extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void); extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void);
@ -57,7 +54,6 @@ extern void omap2xxx_cm_set_apll54_auto_low_power_stop(void);
extern void omap2xxx_cm_set_apll96_disable_autoidle(void); extern void omap2xxx_cm_set_apll96_disable_autoidle(void);
extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void); extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id, int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
u8 idlest_shift); u8 idlest_shift);
extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,

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@ -156,7 +156,7 @@ static void _clktrctrl_write(u8 c, u16 inst, u16 cdoffs)
* Returns true if the clockdomain referred to by (@inst, @cdoffs) * Returns true if the clockdomain referred to by (@inst, @cdoffs)
* is in hardware-supervised idle mode, or 0 otherwise. * is in hardware-supervised idle mode, or 0 otherwise.
*/ */
bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs) static bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs)
{ {
u32 v; u32 v;
@ -175,7 +175,7 @@ bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs)
* Put a clockdomain referred to by (@inst, @cdoffs) into * Put a clockdomain referred to by (@inst, @cdoffs) into
* hardware-supervised idle mode. No return value. * hardware-supervised idle mode. No return value.
*/ */
void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs) static void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs)
{ {
_clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, inst, cdoffs); _clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, inst, cdoffs);
} }
@ -189,7 +189,7 @@ void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs)
* software-supervised idle mode, i.e., controlled manually by the * software-supervised idle mode, i.e., controlled manually by the
* Linux OMAP clockdomain code. No return value. * Linux OMAP clockdomain code. No return value.
*/ */
void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs) static void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs)
{ {
_clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, inst, cdoffs); _clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, inst, cdoffs);
} }
@ -202,7 +202,7 @@ void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs)
* Put a clockdomain referred to by (@inst, @cdoffs) into idle * Put a clockdomain referred to by (@inst, @cdoffs) into idle
* No return value. * No return value.
*/ */
void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs) static void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs)
{ {
_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, inst, cdoffs); _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, inst, cdoffs);
} }
@ -215,7 +215,7 @@ void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs)
* Take a clockdomain referred to by (@inst, @cdoffs) out of idle, * Take a clockdomain referred to by (@inst, @cdoffs) out of idle,
* waking it up. No return value. * waking it up. No return value.
*/ */
void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs) static void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
{ {
_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, inst, cdoffs); _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, inst, cdoffs);
} }

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@ -374,11 +374,6 @@
#ifndef __ASSEMBLER__ #ifndef __ASSEMBLER__
bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs);
void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs);
void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs);
void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);
void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
int am33xx_cm_init(void); int am33xx_cm_init(void);
#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX) #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)

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@ -42,7 +42,7 @@ static void _write_clktrctrl(u8 c, s16 module, u32 mask)
omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL); omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL);
} }
bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask) static bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
{ {
u32 v; u32 v;
@ -53,22 +53,22 @@ bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
return (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0; return (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0;
} }
void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask) static void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
{ {
_write_clktrctrl(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, module, mask); _write_clktrctrl(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, module, mask);
} }
void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask) static void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
{ {
_write_clktrctrl(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, module, mask); _write_clktrctrl(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, module, mask);
} }
void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask) static void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask)
{ {
_write_clktrctrl(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, module, mask); _write_clktrctrl(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, module, mask);
} }
void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask) static void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask)
{ {
_write_clktrctrl(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, module, mask); _write_clktrctrl(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, module, mask);
} }

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@ -68,13 +68,6 @@
#ifndef __ASSEMBLER__ #ifndef __ASSEMBLER__
extern void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask);
extern void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask);
extern void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask);
extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask);
extern bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg, extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
s16 *prcm_inst, u8 *idlest_reg_id); s16 *prcm_inst, u8 *idlest_reg_id);

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@ -198,7 +198,7 @@ static void _clktrctrl_write(u8 c, u8 part, u16 inst, u16 cdoffs)
* Returns true if the clockdomain referred to by (@part, @inst, @cdoffs) * Returns true if the clockdomain referred to by (@part, @inst, @cdoffs)
* is in hardware-supervised idle mode, or 0 otherwise. * is in hardware-supervised idle mode, or 0 otherwise.
*/ */
bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs) static bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs)
{ {
u32 v; u32 v;
@ -218,7 +218,7 @@ bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs)
* Put a clockdomain referred to by (@part, @inst, @cdoffs) into * Put a clockdomain referred to by (@part, @inst, @cdoffs) into
* hardware-supervised idle mode. No return value. * hardware-supervised idle mode. No return value.
*/ */
void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs) static void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs)
{ {
_clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, part, inst, cdoffs); _clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, part, inst, cdoffs);
} }
@ -233,7 +233,7 @@ void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs)
* software-supervised idle mode, i.e., controlled manually by the * software-supervised idle mode, i.e., controlled manually by the
* Linux OMAP clockdomain code. No return value. * Linux OMAP clockdomain code. No return value.
*/ */
void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs) static void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs)
{ {
_clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, part, inst, cdoffs); _clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, part, inst, cdoffs);
} }
@ -247,7 +247,7 @@ void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs)
* Take a clockdomain referred to by (@part, @inst, @cdoffs) out of idle, * Take a clockdomain referred to by (@part, @inst, @cdoffs) out of idle,
* waking it up. No return value. * waking it up. No return value.
*/ */
void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs) static void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs)
{ {
_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, part, inst, cdoffs); _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, part, inst, cdoffs);
} }
@ -256,7 +256,7 @@ void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs)
* *
*/ */
void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs) static void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
{ {
_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs); _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs);
} }

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@ -11,11 +11,6 @@
#ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H #ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
#define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H #define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs);
void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs);
void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs);
void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs);
void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs);
extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs, extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
u16 clkctrl_offs); u16 clkctrl_offs);
extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,