leandrof/linux
1
0
Fork 0
forked from Minki/linux
Code Issues Pull Requests Packages Projects Releases Wiki Activity

ARM: S3C24XX: Add HSSPI setup callback for s3c64xx-spi driver

Browse Source 
This lets the s3c64xx-spi driver know the specifics of the controller-
variant and also setups the gpios and the misccr bit.

This setup is valid for all S3C24XX SoCs containing a HSSPI controller
(i.e. S3C2416/2450 and S3C2443)

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Heiko Stuebner 2012-04-24 18:07:10 -07:00 committed by Kukjin Kim
parent 5c2f291716
commit f03eb25e22
3 changed files with 45 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
arch/arm/mach-s3c24xx/Kconfig
View File

@ -518,6 +518,11 @@ config S3C2443_DMA
help
Internal config node for S3C2443 DMA support
config S3C2443_SETUP_SPI
bool
help
Common setup code for SPI GPIO configurations
endif # CPU_S3C2443 || CPU_S3C2416
if CPU_S3C2443

1
arch/arm/mach-s3c24xx/Makefile
View File

@ -91,5 +91,6 @@ obj-$(CONFIG_MACH_OSIRIS_DVS) += mach-osiris-dvs.o
# device setup
obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
obj-$(CONFIG_S3C2443_SETUP_SPI) += setup-spi.o
obj-$(CONFIG_ARCH_S3C24XX) += setup-i2c.o
obj-$(CONFIG_S3C24XX_SETUP_TS) += setup-ts.o

39
arch/arm/mach-s3c24xx/setup-spi.c Normal file
View File

@ -0,0 +1,39 @@
/*
* HS-SPI device setup for S3C2443/S3C2416
*
* Copyright (C) 2011 Samsung Electronics Ltd.
* http://www.samsung.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <plat/gpio-cfg.h>
#include <plat/s3c64xx-spi.h>
#include <mach/hardware.h>
#include <mach/regs-gpio.h>
#ifdef CONFIG_S3C64XX_DEV_SPI0
struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
.fifo_lvl_mask = 0x7f,
.rx_lvl_offset = 13,
.tx_st_done = 21,
.high_speed = 1,
};
int s3c64xx_spi0_cfg_gpio(struct platform_device *pdev)
{
/* enable hsspi bit in misccr */
s3c2410_modify_misccr(S3C2416_MISCCR_HSSPI_EN2, 1);
s3c_gpio_cfgall_range(S3C2410_GPE(11), 3,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
return 0;
}
#endif