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Merge master.kernel.org:/home/rmk/linux-2.6-arm

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* master.kernel.org:/home/rmk/linux-2.6-arm: (28 commits)
  [ARM] 5562/2: at91: add gpio button support for at91sam9g20ek
  [ARM] 5563/1: at91: at91sam9rlek lcd interface correction
  [ARM] 5565/2: Use PAGE_SIZE and RO_DATA() in link script
  [ARM] 5560/1: Avoid buffer overrun in case of an invalid IRQ
  [ARM] GTA02: build fixes (s3c2410_nand_set usage)
  [ARM] MINI2440: Add missing flash_bbt flat to NAND
  [ARM] s3c2410_defconfig: add MINI2440 machine to build
  [ARM] S3C: Fix S3C24XX build to not include s3c64xx IIS devices
  [ARM] S3C24XX: Fix missing s3c_iis_device.
  [ARM] MINI2440: remove duplicated #include
  [ARM] S3C24XX: Fix spi-bus configuration build errors
  OMAP: Fix IOMEM macro for assembly
  [ARM] S3C: Remove unused CONFIG_DEBUG_S3C_PORT
  [ARM] S3C24XX: Fix use of CONFIG_S3C24XX_PWM
  OMAP2/3: Initialize gpio debounce register
  OMAP: IOMMU: function flush_iotlb_page is not flushing correct entry
  OMAP3: RX51: Use OneNAND sync read / write
  OMAP2/3: gpmc-onenand: correct use of async timings
  OMAP3: DMA: Enable idlemodes for DMA OCP
  OMAP3: SRAM size fix for HS/EMU devices
  ...
This commit is contained in:
Linus Torvalds 2009-06-29 16:18:19 -07:00
commit ec9c45d456
31 changed files with 232 additions and 71 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

43
MAINTAINERS
View File

@ -867,12 +867,22 @@ M: alex@shark-linux.de
W: http://www.shark-linux.de/shark.html
S: Maintained
ARM/SAMSUNG ARM ARCHITECTURES
P: Ben Dooks
M: ben-linux@fluff.org
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
W: http://www.fluff.org/ben/linux/
S: Maintained
F: arch/arm/plat-s3c/
F: arch/arm/plat-s3c24xx/
ARM/S3C2410 ARM ARCHITECTURE
P: Ben Dooks
M: ben-linux@fluff.org
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
W: http://www.fluff.org/ben/linux/
S: Maintained
F: arch/arm/mach-s3c2410/
ARM/S3C2440 ARM ARCHITECTURE
P: Ben Dooks
@ -880,6 +890,39 @@ M: ben-linux@fluff.org
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
W: http://www.fluff.org/ben/linux/
S: Maintained
F: arch/arm/mach-s3c2440/
ARM/S3C2442 ARM ARCHITECTURE
P: Ben Dooks
M: ben-linux@fluff.org
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
W: http://www.fluff.org/ben/linux/
S: Maintained
F: arch/arm/mach-s3c2442/
ARM/S3C2443 ARM ARCHITECTURE
P: Ben Dooks
M: ben-linux@fluff.org
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
W: http://www.fluff.org/ben/linux/
S: Maintained
F: arch/arm/mach-s3c2443/
ARM/S3C6400 ARM ARCHITECTURE
P: Ben Dooks
M: ben-linux@fluff.org
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
W: http://www.fluff.org/ben/linux/
S: Maintained
F: arch/arm/mach-s3c6400/
ARM/S3C6410 ARM ARCHITECTURE
P: Ben Dooks
M: ben-linux@fluff.org
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
W: http://www.fluff.org/ben/linux/
S: Maintained
F: arch/arm/mach-s3c6410/
ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT
P: Lennert Buytenhek

8
arch/arm/Kconfig.debug
View File

@ -99,14 +99,6 @@ config DEBUG_CLPS711X_UART2
output to the second serial port on these devices. Saying N will
cause the debug messages to appear on the first serial port.
config DEBUG_S3C_PORT
depends on DEBUG_LL && PLAT_S3C
bool "Kernel low-level debugging messages via S3C UART"
help
Say Y here if you want debug print routines to go to one of the
S3C internal UARTs. The chosen UART must have been configured
before it is used.
config DEBUG_S3C_UART
depends on PLAT_S3C
int "S3C UART to use for low-level debug"

2
arch/arm/configs/s3c2410_defconfig
View File

@ -260,6 +260,7 @@ CONFIG_MACH_NEXCODER_2440=y
CONFIG_SMDK2440_CPU2440=y
CONFIG_MACH_AT2440EVB=y
CONFIG_CPU_S3C2442=y
CONFIG_MACH_MINI2440=y
#
# S3C2442 Machines
@ -2298,7 +2299,6 @@ CONFIG_DEBUG_ERRORS=y
# CONFIG_DEBUG_STACK_USAGE is not set
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set
CONFIG_DEBUG_S3C_PORT=y
CONFIG_DEBUG_S3C_UART=0
#

1
arch/arm/configs/s3c6400_defconfig
View File

@ -816,7 +816,6 @@ CONFIG_DEBUG_ERRORS=y
# CONFIG_DEBUG_STACK_USAGE is not set
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set
CONFIG_DEBUG_S3C_PORT=y
CONFIG_DEBUG_S3C_UART=0
#

1
arch/arm/configs/tct_hammer_defconfig
View File

@ -857,7 +857,6 @@ CONFIG_DEBUG_ERRORS=y
# CONFIG_DEBUG_STACK_USAGE is not set
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set
# CONFIG_DEBUG_S3C_PORT is not set
CONFIG_DEBUG_S3C_UART=0
#

2
arch/arm/include/asm/page.h
View File

@ -12,7 +12,7 @@
/* PAGE_SHIFT determines the page size */
#define PAGE_SHIFT 12
#define PAGE_SIZE (1UL << PAGE_SHIFT)
#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
#define PAGE_MASK (~(PAGE_SIZE-1))
#ifndef __ASSEMBLY__

24
arch/arm/kernel/irq.c
View File

@ -98,17 +98,6 @@ unlock:
return 0;
}
/* Handle bad interrupts */
static struct irq_desc bad_irq_desc = {
.handle_irq = handle_bad_irq,
.lock = __SPIN_LOCK_UNLOCKED(bad_irq_desc.lock),
};
#ifdef CONFIG_CPUMASK_OFFSTACK
/* We are not allocating bad_irq_desc.affinity or .pending_mask */
#error "ARM architecture does not support CONFIG_CPUMASK_OFFSTACK."
#endif
/*
* do_IRQ handles all hardware IRQ's. Decoded IRQs should not
* come via this function. Instead, they should provide their
@ -124,10 +113,13 @@ asmlinkage void __exception asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
* Some hardware gives randomly wrong interrupts. Rather
* than crashing, do something sensible.
*/
if (irq >= NR_IRQS)
handle_bad_irq(irq, &bad_irq_desc);
else
if (unlikely(irq >= NR_IRQS)) {
if (printk_ratelimit())
printk(KERN_WARNING "Bad IRQ%u\n", irq);
ack_bad_irq(irq);
} else {
generic_handle_irq(irq);
}
/* AT91 specific workaround */
irq_finish(irq);
@ -165,10 +157,6 @@ void __init init_IRQ(void)
for (irq = 0; irq < NR_IRQS; irq++)
irq_desc[irq].status |= IRQ_NOREQUEST | IRQ_NOPROBE;
#ifdef CONFIG_SMP
cpumask_setall(bad_irq_desc.affinity);
bad_irq_desc.node = smp_processor_id();
#endif
init_arch_irq();
}

15
arch/arm/kernel/vmlinux.lds.S
View File

@ -6,6 +6,7 @@
#include <asm-generic/vmlinux.lds.h>
#include <asm/thread_info.h>
#include <asm/memory.h>
#include <asm/page.h>
OUTPUT_ARCH(arm)
ENTRY(stext)
@ -63,7 +64,7 @@ SECTIONS
usr/built-in.o(.init.ramfs)
__initramfs_end = .;
#endif
. = ALIGN(4096);
. = ALIGN(PAGE_SIZE);
__per_cpu_load = .;
__per_cpu_start = .;
*(.data.percpu.page_aligned)
@ -73,7 +74,7 @@ SECTIONS
#ifndef CONFIG_XIP_KERNEL
__init_begin = _stext;
INIT_DATA
. = ALIGN(4096);
. = ALIGN(PAGE_SIZE);
__init_end = .;
#endif
}
@ -118,7 +119,7 @@ SECTIONS
*(.got) /* Global offset table */
}
RODATA
RO_DATA(PAGE_SIZE)
_etext = .; /* End of text and rodata section */
@ -158,17 +159,17 @@ SECTIONS
*(.data.init_task)
#ifdef CONFIG_XIP_KERNEL
. = ALIGN(4096);
. = ALIGN(PAGE_SIZE);
__init_begin = .;
INIT_DATA
. = ALIGN(4096);
. = ALIGN(PAGE_SIZE);
__init_end = .;
#endif
. = ALIGN(4096);
. = ALIGN(PAGE_SIZE);
__nosave_begin = .;
*(.data.nosave)
. = ALIGN(4096);
. = ALIGN(PAGE_SIZE);
__nosave_end = .;
/*

54
arch/arm/mach-at91/board-sam9g20ek.c
View File

@ -24,6 +24,8 @@
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/spi/at73c213.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/clk.h>
#include <mach/hardware.h>
@ -218,6 +220,56 @@ static struct gpio_led ek_leds[] = {
}
};
/*
* GPIO Buttons
*/
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
static struct gpio_keys_button ek_buttons[] = {
{
.gpio = AT91_PIN_PA30,
.code = BTN_3,
.desc = "Button 3",
.active_low = 1,
.wakeup = 1,
},
{
.gpio = AT91_PIN_PA31,
.code = BTN_4,
.desc = "Button 4",
.active_low = 1,
.wakeup = 1,
}
};
static struct gpio_keys_platform_data ek_button_data = {
.buttons = ek_buttons,
.nbuttons = ARRAY_SIZE(ek_buttons),
};
static struct platform_device ek_button_device = {
.name = "gpio-keys",
.id = -1,
.num_resources = 0,
.dev = {
.platform_data = &ek_button_data,
}
};
static void __init ek_add_device_buttons(void)
{
at91_set_gpio_input(AT91_PIN_PA30, 1); /* btn3 */
at91_set_deglitch(AT91_PIN_PA30, 1);
at91_set_gpio_input(AT91_PIN_PA31, 1); /* btn4 */
at91_set_deglitch(AT91_PIN_PA31, 1);
platform_device_register(&ek_button_device);
}
#else
static void __init ek_add_device_buttons(void) {}
#endif
static struct i2c_board_info __initdata ek_i2c_devices[] = {
{
I2C_BOARD_INFO("24c512", 0x50),
@ -245,6 +297,8 @@ static void __init ek_board_init(void)
at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
/* LEDs */
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
/* Push Buttons */
ek_add_device_buttons();
/* PCK0 provides MCLK to the WM8731 */
at91_set_B_periph(AT91_PIN_PC1, 0);
/* SSC (for WM8731) */

6
arch/arm/mach-at91/board-sam9rlek.c
View File

@ -186,19 +186,21 @@ static struct fb_monspecs at91fb_default_monspecs = {
static void at91_lcdc_power_control(int on)
{
if (on)
at91_set_gpio_value(AT91_PIN_PA30, 0); /* power up */
at91_set_gpio_value(AT91_PIN_PC1, 0); /* power up */
else
at91_set_gpio_value(AT91_PIN_PA30, 1); /* power down */
at91_set_gpio_value(AT91_PIN_PC1, 1); /* power down */
}
/* Driver datas */
static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
.lcdcon_is_backlight = true,
.default_bpp = 16,
.default_dmacon = ATMEL_LCDC_DMAEN,
.default_lcdcon2 = AT91SAM9RL_DEFAULT_LCDCON2,
.default_monspecs = &at91fb_default_monspecs,
.atmel_lcdfb_power_control = at91_lcdc_power_control,
.guard_time = 1,
.lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB,
};
#else

3
arch/arm/mach-omap1/board-nokia770.c
View File

@ -36,7 +36,6 @@
#include <mach/hwa742.h>
#include <mach/lcd_mipid.h>
#include <mach/mmc.h>
#include <mach/usb.h>
#include <mach/clock.h>
#define ADS7846_PENDOWN_GPIO 15
@ -205,9 +204,11 @@ static int nokia770_mmc_get_cover_state(struct device *dev, int slot)
static struct omap_mmc_platform_data nokia770_mmc2_data = {
.nr_slots = 1,
.dma_mask = 0xffffffff,
.max_freq = 12000000,
.slots[0] = {
.set_power = nokia770_mmc_set_power,
.get_cover_state = nokia770_mmc_get_cover_state,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.name = "mmcblk",
},
};

2
arch/arm/mach-omap1/mailbox.c
View File

@ -203,5 +203,5 @@ module_exit(omap1_mbox_exit);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("omap mailbox: omap1 architecture specific functions");
MODULE_AUTHOR("Hiroshi DOYU" <Hiroshi.DOYU@nokia.com>);
MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>");
MODULE_ALIAS("platform:omap1-mailbox");

1
arch/arm/mach-omap2/board-rx51-peripherals.c
View File

@ -362,6 +362,7 @@ static struct omap_onenand_platform_data board_onenand_data = {
.gpio_irq = 65,
.parts = onenand_partitions,
.nr_parts = ARRAY_SIZE(onenand_partitions),
.flags = ONENAND_SYNC_READWRITE,
};
static void __init board_onenand_init(void)

21
arch/arm/mach-omap2/gpmc-onenand.c
View File

@ -31,6 +31,8 @@ static struct platform_device gpmc_onenand_device = {
static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
{
struct gpmc_timings t;
u32 reg;
int err;
const int t_cer = 15;
const int t_avdp = 12;
@ -43,6 +45,11 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
const int t_wpl = 40;
const int t_wph = 30;
/* Ensure sync read and sync write are disabled */
reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
reg &= ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE;
writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
memset(&t, 0, sizeof(t));
t.sync_clk = 0;
t.cs_on = 0;
@ -74,7 +81,16 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
GPMC_CONFIG1_DEVICESIZE_16 |
GPMC_CONFIG1_MUXADDDATA);
return gpmc_cs_set_timings(cs, &t);
err = gpmc_cs_set_timings(cs, &t);
if (err)
return err;
/* Ensure sync read and sync write are disabled */
reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
reg &= ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE;
writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
return 0;
}
static void set_onenand_cfg(void __iomem *onenand_base, int latency,
@ -124,7 +140,8 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
} else if (cfg->flags & ONENAND_SYNC_READWRITE) {
sync_read = 1;
sync_write = 1;
}
} else
return omap2_onenand_set_async_mode(cs, onenand_base);
if (!freq) {
/* Very first call freq is not known */

22
arch/arm/mach-omap2/id.c
View File

@ -48,6 +48,28 @@ int omap_chip_is(struct omap_chip_id oci)
}
EXPORT_SYMBOL(omap_chip_is);
int omap_type(void)
{
u32 val = 0;
if (cpu_is_omap24xx())
val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
else if (cpu_is_omap34xx())
val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
else {
pr_err("Cannot detect omap type!\n");
goto out;
}
val &= OMAP2_DEVICETYPE_MASK;
val >>= 8;
out:
return val;
}
EXPORT_SYMBOL(omap_type);
/*----------------------------------------------------------------------------*/
#define OMAP_TAP_IDCODE 0x0204

6
arch/arm/mach-omap2/mailbox.c
View File

@ -282,12 +282,12 @@ static int __devinit omap2_mbox_probe(struct platform_device *pdev)
return -ENOMEM;
/* DSP or IVA2 IRQ */
mbox_dsp_info.irq = platform_get_irq(pdev, 0);
if (mbox_dsp_info.irq < 0) {
ret = platform_get_irq(pdev, 0);
if (ret < 0) {
dev_err(&pdev->dev, "invalid irq resource\n");
ret = -ENODEV;
goto err_dsp;
}
mbox_dsp_info.irq = ret;
ret = omap_mbox_register(&pdev->dev, &mbox_dsp_info);
if (ret)

13
arch/arm/mach-omap2/mmc-twl4030.c
View File

@ -263,8 +263,19 @@ static int twl_mmc1_set_power(struct device *dev, int slot, int power_on,
static int twl_mmc23_set_power(struct device *dev, int slot, int power_on, int vdd)
{
int ret = 0;
struct twl_mmc_controller *c = &hsmmc[1];
struct twl_mmc_controller *c = NULL;
struct omap_mmc_platform_data *mmc = dev->platform_data;
int i;
for (i = 1; i < ARRAY_SIZE(hsmmc); i++) {
if (mmc == hsmmc[i].mmc) {
c = &hsmmc[i];
break;
}
}
if (c == NULL)
return -ENODEV;
/* If we don't see a Vcc regulator, assume it's a fixed
* voltage always-on regulator.

3
arch/arm/mach-s3c2440/mach-mini2440.c
View File

@ -48,8 +48,6 @@
#include <plat/mci.h>
#include <plat/udc.h>
#include <plat/regs-serial.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/nand_ecc.h>
@ -275,6 +273,7 @@ static struct s3c2410_nand_set mini2440_nand_sets[] __initdata = {
.nr_chips = 1,
.nr_partitions = ARRAY_SIZE(mini2440_default_nand_part),
.partitions = mini2440_default_nand_part,
.flash_bbt = 1, /* we use u-boot to create a BBT */
},
};

3
arch/arm/mach-s3c2442/mach-gta02.c
View File

@ -433,8 +433,7 @@ static struct s3c2410_nand_set gta02_nand_sets[] = {
*/
.name = "neo1973-nand",
.nr_chips = 1,
.use_bbt = 1,
.force_soft_ecc = 1,
.flash_bbt = 1,
},
};

13
arch/arm/plat-omap/dma.c
View File

@ -2457,6 +2457,19 @@ static int __init omap_init_dma(void)
setup_irq(irq, &omap24xx_dma_irq);
}
/* Enable smartidle idlemodes and autoidle */
if (cpu_is_omap34xx()) {
u32 v = dma_read(OCP_SYSCONFIG);
v &= ~(DMA_SYSCONFIG_MIDLEMODE_MASK |
DMA_SYSCONFIG_SIDLEMODE_MASK |
DMA_SYSCONFIG_AUTOIDLE);
v |= (DMA_SYSCONFIG_MIDLEMODE(DMA_IDLEMODE_SMARTIDLE) |
DMA_SYSCONFIG_SIDLEMODE(DMA_IDLEMODE_SMARTIDLE) |
DMA_SYSCONFIG_AUTOIDLE);
dma_write(v , OCP_SYSCONFIG);
}
/* FIXME: Update LCD DMA to work on 24xx */
if (cpu_class_is_omap1()) {
r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0,

1
arch/arm/plat-omap/gpio.c
View File

@ -1585,6 +1585,7 @@ static int __init _omap_gpio_init(void)
__raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1);
__raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1);
__raw_writew(0x0015, bank->base + OMAP24XX_GPIO_SYSCONFIG);
__raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_DEBOUNCE_EN);
/* Initialize interface clock ungated, module enabled */
__raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);

22
arch/arm/plat-omap/include/mach/cpu.h
View File

@ -30,6 +30,17 @@
#ifndef __ASM_ARCH_OMAP_CPU_H
#define __ASM_ARCH_OMAP_CPU_H
/*
* Omap device type i.e. EMU/HS/TST/GP/BAD
*/
#define OMAP2_DEVICE_TYPE_TEST 0
#define OMAP2_DEVICE_TYPE_EMU 1
#define OMAP2_DEVICE_TYPE_SEC 2
#define OMAP2_DEVICE_TYPE_GP 3
#define OMAP2_DEVICE_TYPE_BAD 4
int omap_type(void);
struct omap_chip_id {
u8 oc;
u8 type;
@ -424,17 +435,6 @@ IS_OMAP_TYPE(3430, 0x3430)
int omap_chip_is(struct omap_chip_id oci);
int omap_type(void);
/*
* Macro to detect device type i.e. EMU/HS/TST/GP/BAD
*/
#define OMAP2_DEVICE_TYPE_TEST 0
#define OMAP2_DEVICE_TYPE_EMU 1
#define OMAP2_DEVICE_TYPE_SEC 2
#define OMAP2_DEVICE_TYPE_GP 3
#define OMAP2_DEVICE_TYPE_BAD 4
void omap2_check_revision(void);
#endif /* defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) */

15
arch/arm/plat-omap/include/mach/dma.h
View File

@ -389,6 +389,21 @@
#define DMA_THREAD_FIFO_25 (0x02 << 14)
#define DMA_THREAD_FIFO_50 (0x03 << 14)
/* DMA4_OCP_SYSCONFIG bits */
#define DMA_SYSCONFIG_MIDLEMODE_MASK (3 << 12)
#define DMA_SYSCONFIG_CLOCKACTIVITY_MASK (3 << 8)
#define DMA_SYSCONFIG_EMUFREE (1 << 5)
#define DMA_SYSCONFIG_SIDLEMODE_MASK (3 << 3)
#define DMA_SYSCONFIG_SOFTRESET (1 << 2)
#define DMA_SYSCONFIG_AUTOIDLE (1 << 0)
#define DMA_SYSCONFIG_MIDLEMODE(n) ((n) << 12)
#define DMA_SYSCONFIG_SIDLEMODE(n) ((n) << 3)
#define DMA_IDLEMODE_SMARTIDLE 0x2
#define DMA_IDLEMODE_NO_IDLE 0x1
#define DMA_IDLEMODE_FORCE_IDLE 0x0
/* Chaining modes*/
#ifndef CONFIG_ARCH_OMAP1
#define OMAP_DMA_STATIC_CHAIN 0x1

2
arch/arm/plat-omap/include/mach/io.h
View File

@ -201,7 +201,7 @@
#define OMAP2_IO_ADDRESS(pa) IOMEM(__OMAP2_IO_ADDRESS(pa))
#ifdef __ASSEMBLER__
#define IOMEM(x) x
#define IOMEM(x) (x)
#else
#define IOMEM(x) ((void __force __iomem *)(x))

2
arch/arm/plat-omap/iommu.c
View File

@ -298,7 +298,7 @@ void flush_iotlb_page(struct iommu *obj, u32 da)
if ((start <= da) && (da < start + bytes)) {
dev_dbg(obj->dev, "%s: %08x<=%08x(%x)\n",
__func__, start, da, bytes);
iotlb_load_cr(obj, &cr);
iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
}
}

7
arch/arm/plat-omap/sram.c
View File

@ -133,7 +133,12 @@ void __init omap_detect_sram(void)
if (cpu_is_omap34xx()) {
omap_sram_base = OMAP3_SRAM_PUB_VA;
omap_sram_start = OMAP3_SRAM_PUB_PA;
omap_sram_size = 0x8000; /* 32K */
if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
(omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
omap_sram_size = 0x7000; /* 28K */
} else {
omap_sram_size = 0x8000; /* 32K */
}
} else {
omap_sram_base = OMAP2_SRAM_PUB_VA;
omap_sram_start = OMAP2_SRAM_PUB_PA;

2
arch/arm/plat-s3c/Makefile
View File

@ -34,7 +34,7 @@ obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o
obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o
obj-y += dev-i2c0.o
obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
obj-$(CONFIG_SND_S3C24XX_SOC) += dev-audio.o
obj-$(CONFIG_SND_S3C64XX_SOC_I2S) += dev-audio.o
obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o
obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o
obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o

1
arch/arm/plat-s3c/include/plat/devs.h
View File

@ -37,6 +37,7 @@ extern struct platform_device s3c_device_i2c1;
extern struct platform_device s3c_device_rtc;
extern struct platform_device s3c_device_adc;
extern struct platform_device s3c_device_sdi;
extern struct platform_device s3c_device_iis;
extern struct platform_device s3c_device_hwmon;
extern struct platform_device s3c_device_hsmmc0;
extern struct platform_device s3c_device_hsmmc1;

2
arch/arm/plat-s3c24xx/Makefile
View File

@ -29,7 +29,7 @@ obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o
obj-$(CONFIG_PM) += pm.o
obj-$(CONFIG_PM) += irq-pm.o
obj-$(CONFIG_PM) += sleep.o
obj-$(CONFIG_HAVE_PWM) += pwm.o
obj-$(CONFIG_S3C24XX_PWM) += pwm.o
obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o
obj-$(CONFIG_S3C2410_DMA) += dma.o
obj-$(CONFIG_S3C24XX_ADC) += adc.o

3
arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
View File

@ -12,8 +12,7 @@
*/
#include <linux/kernel.h>
#include <mach/hardware.h>
#include <linux/gpio.h>
#include <mach/spi.h>
#include <mach/regs-gpio.h>

3
arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c
View File

@ -12,8 +12,7 @@
*/
#include <linux/kernel.h>
#include <mach/hardware.h>
#include <linux/gpio.h>
#include <mach/spi.h>
#include <mach/regs-gpio.h>