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clk: qcom: SDHCI enablement on Nexus 5X / 6P

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Add missing clock branch to enable onboard storage
for msm899(2/4).

Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This commit is contained in:
Jeremy McNicoll 2017-01-27 01:10:00 -08:00 committed by Stephen Boyd
parent 6eeaf8ff2f
commit eaff16bc49
1 changed files with 18 additions and 0 deletions
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18
drivers/clk/qcom/gcc-msm8994.c
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@ -1888,6 +1888,23 @@ static struct clk_branch gcc_sdcc1_apps_clk = {
},
};
static struct clk_branch gcc_sdcc1_ahb_clk = {
.halt_reg = 0x04c8,
.clkr = {
.enable_reg = 0x04c8,
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data)
{
.name = "gcc_sdcc1_ahb_clk",
.parent_names = (const char *[]){
"periph_noc_clk_src",
},
.num_parents = 1,
.ops = &clk_branch2_ops,
},
},
};
static struct clk_branch gcc_sdcc2_apps_clk = {
.halt_reg = 0x0504,
.clkr = {
@ -2231,6 +2248,7 @@ static struct clk_regmap *gcc_msm8994_clocks[] = {
[GCC_SDCC2_APPS_CLK] = &gcc_sdcc2_apps_clk.clkr,
[GCC_SDCC3_APPS_CLK] = &gcc_sdcc3_apps_clk.clkr,
[GCC_SDCC4_APPS_CLK] = &gcc_sdcc4_apps_clk.clkr,
[GCC_SDCC1_AHB_CLK] = &gcc_sdcc1_ahb_clk.clkr,
[GCC_SYS_NOC_UFS_AXI_CLK] = &gcc_sys_noc_ufs_axi_clk.clkr,
[GCC_SYS_NOC_USB3_AXI_CLK] = &gcc_sys_noc_usb3_axi_clk.clkr,
[GCC_TSIF_REF_CLK] = &gcc_tsif_ref_clk.clkr,