forked from Minki/linux
drm/nve0/fb/gddr5: found LP3 setting
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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971372eac1
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@ -29,7 +29,7 @@ int
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nouveau_gddr5_calc(struct nouveau_ram *ram, bool nuts)
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{
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struct nouveau_bios *bios = nouveau_bios(ram);
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int pd, lf, xd, vh, vr, vo;
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int pd, lf, xd, vh, vr, vo, l3;
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int WL, CL, WR, at[2], dt, ds;
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int rq = ram->freq < 1000000; /* XXX */
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@ -41,6 +41,7 @@ nouveau_gddr5_calc(struct nouveau_ram *ram, bool nuts)
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vh = (nv_ro08(bios, ram->ramcfg.data + 0x02) & 0x10) >> 4;
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vr = (nv_ro08(bios, ram->ramcfg.data + 0x02) & 0x04) >> 2;
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vo = nv_ro08(bios, ram->ramcfg.data + 0x06) & 0xff;
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l3 = !(nv_ro08(bios, ram->ramcfg.data + 0x07) & 0x02);
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break;
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default:
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return -ENOSYS;
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@ -88,8 +89,8 @@ nouveau_gddr5_calc(struct nouveau_ram *ram, bool nuts)
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ram->mr[3] &= ~0x020;
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ram->mr[3] |= (rq & 0x01) << 5;
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/*XXX: LP3, where's the bit? Let's hardcode to off for now */
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ram->mr[5] &= ~0x004;
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ram->mr[5] |= (l3 << 2);
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if (!vo)
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vo = (ram->mr[6] & 0xff0) >> 4;
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@ -638,16 +638,16 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
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data = 0xa40e0000;
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}
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nve0_ram_train(fuc, 0xbc0f0000, data);
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ram_nsec(fuc, 1000);
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if (1) /* XXX: not always? */
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ram_nsec(fuc, 1000);
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if (ram->mode == 2) { /*XXX*/
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ram_mask(fuc, 0x10f800, 0x00000004, 0x00000004);
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}
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/* MR5: (re)enable LP3 if necessary
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* XXX: need to find the switch, keeping off for now
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*/
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ram_mask(fuc, mr[5], 0xfff, ram->base.mr[5]);
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/* LP3 */
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if (ram_mask(fuc, mr[5], 0x004, ram->base.mr[5]) != ram->base.mr[5])
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ram_nsec(fuc, 1000);
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if (ram->mode != 2) {
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ram_mask(fuc, 0x10f830, 0x01000000, 0x01000000);
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