forked from Minki/linux
drm/i915/sdvo: Fix GMBUSification
Besides a couple of bugs when writing more than a single byte along the GMBUS, SDVO was completely failing whilst trying to use GMBUS, so use bit banging instead. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
parent
a56ba56c27
commit
e957d7720a
@ -132,10 +132,12 @@ struct drm_i915_fence_reg {
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};
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struct sdvo_device_mapping {
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u8 initialized;
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u8 dvo_port;
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u8 slave_addr;
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u8 dvo_wiring;
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u8 initialized;
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u8 i2c_pin;
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u8 i2c_speed;
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u8 ddc_pin;
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};
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@ -248,8 +250,8 @@ typedef struct drm_i915_private {
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struct intel_gmbus {
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struct i2c_adapter adapter;
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struct i2c_adapter *force_bitbanging;
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int pin;
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struct i2c_adapter *force_bit;
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u32 reg0;
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} *gmbus;
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struct pci_dev *bridge_dev;
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@ -1104,6 +1106,8 @@ extern int i915_restore_state(struct drm_device *dev);
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/* intel_i2c.c */
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extern int intel_setup_gmbus(struct drm_device *dev);
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extern void intel_teardown_gmbus(struct drm_device *dev);
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extern void intel_gmbus_set_speed(struct i2c_adapter *adapter, int speed);
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extern void intel_gmbus_force_bit(struct i2c_adapter *adapter, bool force_bit);
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extern void intel_i2c_reset(struct drm_device *dev);
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/* intel_opregion.c */
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@ -369,7 +369,16 @@ parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
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p_mapping->slave_addr = p_child->slave_addr;
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p_mapping->dvo_wiring = p_child->dvo_wiring;
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p_mapping->ddc_pin = p_child->ddc_pin;
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p_mapping->i2c_pin = p_child->i2c_pin;
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p_mapping->i2c_speed = p_child->i2c_speed;
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p_mapping->initialized = 1;
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DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d, i2c_speed=%d\n",
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p_mapping->dvo_port,
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p_mapping->slave_addr,
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p_mapping->dvo_wiring,
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p_mapping->ddc_pin,
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p_mapping->i2c_pin,
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p_mapping->i2c_speed);
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} else {
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DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
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"two SDVO device.\n");
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@ -197,7 +197,8 @@ struct bdb_general_features {
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struct child_device_config {
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u16 handle;
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u16 device_type;
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u8 device_id[10]; /* See DEVICE_TYPE_* above */
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u8 i2c_speed;
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u8 rsvd[9];
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u16 addin_offset;
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u8 dvo_port; /* See Device_PORT_* above */
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u8 i2c_pin;
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@ -38,6 +38,12 @@
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#define I2C_RISEFALL_TIME 20
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static inline struct intel_gmbus *
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to_intel_gmbus(struct i2c_adapter *i2c)
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{
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return container_of(i2c, struct intel_gmbus, adapter);
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}
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struct intel_gpio {
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struct i2c_adapter adapter;
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struct i2c_algo_bit_data algo;
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@ -71,10 +77,27 @@ static void intel_i2c_quirk_set(struct drm_i915_private *dev_priv, bool enable)
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I915_WRITE(DSPCLK_GATE_D, val);
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}
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static u32 get_reserved(struct intel_gpio *gpio)
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{
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struct drm_i915_private *dev_priv = gpio->dev_priv;
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struct drm_device *dev = dev_priv->dev;
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u32 reserved = 0;
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/* On most chips, these bits must be preserved in software. */
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if (!IS_I830(dev) && !IS_845G(dev))
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reserved = I915_READ(gpio->reg) & (GPIO_DATA_PULLUP_DISABLE |
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GPIO_CLOCK_PULLUP_DISABLE);
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return reserved;
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}
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static int get_clock(void *data)
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{
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struct intel_gpio *gpio = data;
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struct drm_i915_private *dev_priv = gpio->dev_priv;
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u32 reserved = get_reserved(gpio);
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I915_WRITE(gpio->reg, reserved | GPIO_CLOCK_DIR_MASK);
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I915_WRITE(gpio->reg, reserved);
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return (I915_READ(gpio->reg) & GPIO_CLOCK_VAL_IN) != 0;
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}
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@ -82,6 +105,9 @@ static int get_data(void *data)
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{
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struct intel_gpio *gpio = data;
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struct drm_i915_private *dev_priv = gpio->dev_priv;
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u32 reserved = get_reserved(gpio);
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I915_WRITE(gpio->reg, reserved | GPIO_DATA_DIR_MASK);
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I915_WRITE(gpio->reg, reserved);
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return (I915_READ(gpio->reg) & GPIO_DATA_VAL_IN) != 0;
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}
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@ -89,13 +115,8 @@ static void set_clock(void *data, int state_high)
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{
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struct intel_gpio *gpio = data;
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struct drm_i915_private *dev_priv = gpio->dev_priv;
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struct drm_device *dev = dev_priv->dev;
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u32 reserved = 0, clock_bits;
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/* On most chips, these bits must be preserved in software. */
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if (!IS_I830(dev) && !IS_845G(dev))
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reserved = I915_READ(gpio->reg) & (GPIO_DATA_PULLUP_DISABLE |
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GPIO_CLOCK_PULLUP_DISABLE);
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u32 reserved = get_reserved(gpio);
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u32 clock_bits;
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if (state_high)
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clock_bits = GPIO_CLOCK_DIR_IN | GPIO_CLOCK_DIR_MASK;
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@ -111,13 +132,8 @@ static void set_data(void *data, int state_high)
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{
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struct intel_gpio *gpio = data;
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struct drm_i915_private *dev_priv = gpio->dev_priv;
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struct drm_device *dev = dev_priv->dev;
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u32 reserved = 0, data_bits;
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/* On most chips, these bits must be preserved in software. */
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if (!IS_I830(dev) && !IS_845G(dev))
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reserved = I915_READ(gpio->reg) & (GPIO_DATA_PULLUP_DISABLE |
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GPIO_CLOCK_PULLUP_DISABLE);
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u32 reserved = get_reserved(gpio);
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u32 data_bits;
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if (state_high)
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data_bits = GPIO_DATA_DIR_IN | GPIO_DATA_DIR_MASK;
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@ -155,7 +171,7 @@ intel_gpio_create(struct drm_i915_private *dev_priv, u32 pin)
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gpio->reg += PCH_GPIOA - GPIOA;
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gpio->dev_priv = dev_priv;
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snprintf(gpio->adapter.name, I2C_NAME_SIZE, "GPIO %d", pin);
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snprintf(gpio->adapter.name, I2C_NAME_SIZE, "GPIO%c", "?BACDEF?"[pin]);
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gpio->adapter.owner = THIS_MODULE;
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gpio->adapter.algo_data = &gpio->algo;
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gpio->adapter.dev.parent = &dev_priv->dev->pdev->dev;
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@ -170,16 +186,6 @@ intel_gpio_create(struct drm_i915_private *dev_priv, u32 pin)
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if (i2c_bit_add_bus(&gpio->adapter))
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goto out_free;
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intel_i2c_reset(dev_priv->dev);
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/* JJJ: raise SCL and SDA? */
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intel_i2c_quirk_set(dev_priv, true);
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set_data(gpio, 1);
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udelay(I2C_RISEFALL_TIME);
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set_clock(gpio, 1);
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udelay(I2C_RISEFALL_TIME);
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intel_i2c_quirk_set(dev_priv, false);
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return &gpio->adapter;
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out_free:
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@ -188,17 +194,27 @@ out_free:
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}
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static int
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quirk_i2c_transfer(struct drm_i915_private *dev_priv,
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intel_i2c_quirk_xfer(struct drm_i915_private *dev_priv,
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struct i2c_adapter *adapter,
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struct i2c_msg *msgs,
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int num)
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{
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struct intel_gpio *gpio = container_of(adapter,
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struct intel_gpio,
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adapter);
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int ret;
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intel_i2c_reset(dev_priv->dev);
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intel_i2c_quirk_set(dev_priv, true);
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ret = i2c_transfer(adapter, msgs, num);
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set_data(gpio, 1);
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set_clock(gpio, 1);
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udelay(I2C_RISEFALL_TIME);
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ret = adapter->algo->master_xfer(adapter, msgs, num);
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set_data(gpio, 1);
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set_clock(gpio, 1);
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intel_i2c_quirk_set(dev_priv, false);
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return ret;
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@ -213,21 +229,15 @@ gmbus_xfer(struct i2c_adapter *adapter,
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struct intel_gmbus,
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adapter);
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struct drm_i915_private *dev_priv = adapter->algo_data;
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int i, speed, reg_offset;
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int i, reg_offset;
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if (bus->force_bitbanging)
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return quirk_i2c_transfer(dev_priv, bus->force_bitbanging, msgs, num);
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if (bus->force_bit)
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return intel_i2c_quirk_xfer(dev_priv,
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bus->force_bit, msgs, num);
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reg_offset = HAS_PCH_SPLIT(dev_priv->dev) ? PCH_GMBUS0 - GMBUS0 : 0;
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speed = GMBUS_RATE_100KHZ;
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if (INTEL_INFO(dev_priv->dev)->gen > 4 || IS_G4X(dev_priv->dev)) {
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if (bus->pin == GMBUS_PORT_DPB) /* SDVO only? */
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speed = GMBUS_RATE_1MHZ;
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else
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speed = GMBUS_RATE_400KHZ;
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}
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I915_WRITE(GMBUS0 + reg_offset, speed | bus->pin);
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I915_WRITE(GMBUS0 + reg_offset, bus->reg0);
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for (i = 0; i < num; i++) {
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u16 len = msgs[i].len;
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@ -239,6 +249,7 @@ gmbus_xfer(struct i2c_adapter *adapter,
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(len << GMBUS_BYTE_COUNT_SHIFT) |
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(msgs[i].addr << GMBUS_SLAVE_ADDR_SHIFT) |
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GMBUS_SLAVE_READ | GMBUS_SW_RDY);
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POSTING_READ(GMBUS2+reg_offset);
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do {
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u32 val, loop = 0;
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@ -254,20 +265,35 @@ gmbus_xfer(struct i2c_adapter *adapter,
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} while (--len && ++loop < 4);
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} while (len);
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} else {
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u32 val = 0, loop = 0;
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BUG_ON(msgs[i].len > 4);
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u32 val, loop;
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val = loop = 0;
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do {
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val |= *buf++ << (loop*8);
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} while (--len && +loop < 4);
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val |= *buf++ << (8 * loop);
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} while (--len && ++loop < 4);
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I915_WRITE(GMBUS3 + reg_offset, val);
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I915_WRITE(GMBUS1 + reg_offset,
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(i + 1 == num ? GMBUS_CYCLE_STOP : GMBUS_CYCLE_WAIT ) |
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(i + 1 == num ? GMBUS_CYCLE_STOP : GMBUS_CYCLE_WAIT) |
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(msgs[i].len << GMBUS_BYTE_COUNT_SHIFT) |
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(msgs[i].addr << GMBUS_SLAVE_ADDR_SHIFT) |
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GMBUS_SLAVE_WRITE | GMBUS_SW_RDY);
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POSTING_READ(GMBUS2+reg_offset);
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while (len) {
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if (wait_for(I915_READ(GMBUS2 + reg_offset) & (GMBUS_SATOER | GMBUS_HW_RDY), 50))
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goto timeout;
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if (I915_READ(GMBUS2 + reg_offset) & GMBUS_SATOER)
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return 0;
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val = loop = 0;
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do {
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val |= *buf++ << (8 * loop);
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} while (--len && ++loop < 4);
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I915_WRITE(GMBUS3 + reg_offset, val);
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POSTING_READ(GMBUS2+reg_offset);
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}
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}
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if (i + 1 < num && wait_for(I915_READ(GMBUS2 + reg_offset) & (GMBUS_SATOER | GMBUS_HW_WAIT_PHASE), 50))
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@ -279,17 +305,25 @@ gmbus_xfer(struct i2c_adapter *adapter,
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return num;
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timeout:
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DRM_INFO("GMBUS timed out, falling back to bit banging on pin %d\n", bus->pin);
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DRM_INFO("GMBUS timed out, falling back to bit banging on pin %d [%s]\n",
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bus->reg0 & 0xff, bus->adapter.name);
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/* Hardware may not support GMBUS over these pins? Try GPIO bitbanging instead. */
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bus->force_bitbanging = intel_gpio_create(dev_priv, bus->pin);
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if (!bus->force_bitbanging)
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bus->force_bit = intel_gpio_create(dev_priv, bus->reg0 & 0xff);
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if (!bus->force_bit)
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return -ENOMEM;
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return quirk_i2c_transfer(dev_priv, bus->force_bitbanging, msgs, num);
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return intel_i2c_quirk_xfer(dev_priv, bus->force_bit, msgs, num);
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}
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static u32 gmbus_func(struct i2c_adapter *adapter)
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{
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struct intel_gmbus *bus = container_of(adapter,
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struct intel_gmbus,
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adapter);
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if (bus->force_bit)
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bus->force_bit->algo->functionality(bus->force_bit);
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return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
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/* I2C_FUNC_10BIT_ADDR | */
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I2C_FUNC_SMBUS_READ_BLOCK_DATA |
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@ -307,15 +341,15 @@ static const struct i2c_algorithm gmbus_algorithm = {
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*/
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int intel_setup_gmbus(struct drm_device *dev)
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{
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static const char *names[] = {
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static const char *names[GMBUS_NUM_PORTS] = {
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"disabled",
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"ssc",
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"vga",
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"panel",
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"dpc",
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"dpb",
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"dpd",
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"reserved"
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"dpd",
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};
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struct drm_i915_private *dev_priv = dev->dev_private;
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int ret, i;
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@ -343,7 +377,8 @@ int intel_setup_gmbus(struct drm_device *dev)
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if (ret)
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goto err;
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bus->pin = i;
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/* By default use a conservative clock rate */
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bus->reg0 = i | GMBUS_RATE_100KHZ;
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}
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intel_i2c_reset(dev_priv->dev);
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@ -360,6 +395,38 @@ err:
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return ret;
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}
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void intel_gmbus_set_speed(struct i2c_adapter *adapter, int speed)
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{
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struct intel_gmbus *bus = to_intel_gmbus(adapter);
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/* speed:
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* 0x0 = 100 KHz
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* 0x1 = 50 KHz
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* 0x2 = 400 KHz
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* 0x3 = 1000 Khz
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*/
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bus->reg0 = (bus->reg0 & ~(0x3 << 8)) | (speed << 8);
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}
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void intel_gmbus_force_bit(struct i2c_adapter *adapter, bool force_bit)
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{
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struct intel_gmbus *bus = to_intel_gmbus(adapter);
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if (force_bit) {
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if (bus->force_bit == NULL) {
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struct drm_i915_private *dev_priv = adapter->algo_data;
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bus->force_bit = intel_gpio_create(dev_priv,
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bus->reg0 & 0xff);
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}
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} else {
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if (bus->force_bit) {
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i2c_del_adapter(bus->force_bit);
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kfree(bus->force_bit);
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bus->force_bit = NULL;
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}
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}
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}
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void intel_teardown_gmbus(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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@ -370,9 +437,9 @@ void intel_teardown_gmbus(struct drm_device *dev)
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for (i = 0; i < GMBUS_NUM_PORTS; i++) {
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struct intel_gmbus *bus = &dev_priv->gmbus[i];
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if (bus->force_bitbanging) {
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i2c_del_adapter(bus->force_bitbanging);
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kfree(bus->force_bitbanging);
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if (bus->force_bit) {
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i2c_del_adapter(bus->force_bit);
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kfree(bus->force_bit);
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}
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i2c_del_adapter(&bus->adapter);
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}
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@ -68,6 +68,8 @@ struct intel_sdvo {
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struct i2c_adapter *i2c;
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u8 slave_addr;
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struct i2c_adapter ddc;
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/* Register for the SDVO device: SDVOB or SDVOC */
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int sdvo_reg;
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@ -247,49 +249,29 @@ static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
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static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
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{
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u8 out_buf[2] = { addr, 0 };
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u8 buf[2];
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struct i2c_msg msgs[] = {
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{
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.addr = intel_sdvo->slave_addr >> 1,
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.addr = intel_sdvo->slave_addr,
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.flags = 0,
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.len = 1,
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.buf = out_buf,
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.buf = &addr,
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},
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{
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.addr = intel_sdvo->slave_addr >> 1,
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.addr = intel_sdvo->slave_addr,
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.flags = I2C_M_RD,
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.len = 1,
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.buf = buf,
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.buf = ch,
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}
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};
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int ret;
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if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
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{
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||||
*ch = buf[0];
|
||||
return true;
|
||||
}
|
||||
|
||||
DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
|
||||
return false;
|
||||
}
|
||||
|
||||
static bool intel_sdvo_write_byte(struct intel_sdvo *intel_sdvo, int addr, u8 ch)
|
||||
{
|
||||
u8 out_buf[2] = { addr, ch };
|
||||
struct i2c_msg msgs[] = {
|
||||
{
|
||||
.addr = intel_sdvo->slave_addr >> 1,
|
||||
.flags = 0,
|
||||
.len = 2,
|
||||
.buf = out_buf,
|
||||
}
|
||||
};
|
||||
|
||||
return i2c_transfer(intel_sdvo->i2c, msgs, 1) == 1;
|
||||
}
|
||||
|
||||
#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
|
||||
/** Mapping of command numbers to names, for debug output */
|
||||
static const struct _sdvo_cmd_name {
|
||||
@ -434,22 +416,6 @@ static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
|
||||
DRM_LOG_KMS("\n");
|
||||
}
|
||||
|
||||
static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
|
||||
const void *args, int args_len)
|
||||
{
|
||||
int i;
|
||||
|
||||
intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
|
||||
|
||||
for (i = 0; i < args_len; i++) {
|
||||
if (!intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_ARG_0 - i,
|
||||
((u8*)args)[i]))
|
||||
return false;
|
||||
}
|
||||
|
||||
return intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_OPCODE, cmd);
|
||||
}
|
||||
|
||||
static const char *cmd_status_names[] = {
|
||||
"Power on",
|
||||
"Success",
|
||||
@ -460,6 +426,70 @@ static const char *cmd_status_names[] = {
|
||||
"Scaling not supported"
|
||||
};
|
||||
|
||||
static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
|
||||
const void *args, int args_len)
|
||||
{
|
||||
u8 buf[args_len*2 + 2], status;
|
||||
struct i2c_msg msgs[args_len + 3];
|
||||
int i, ret;
|
||||
|
||||
intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
|
||||
|
||||
for (i = 0; i < args_len; i++) {
|
||||
msgs[i].addr = intel_sdvo->slave_addr;
|
||||
msgs[i].flags = 0;
|
||||
msgs[i].len = 2;
|
||||
msgs[i].buf = buf + 2 *i;
|
||||
buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
|
||||
buf[2*i + 1] = ((u8*)args)[i];
|
||||
}
|
||||
msgs[i].addr = intel_sdvo->slave_addr;
|
||||
msgs[i].flags = 0;
|
||||
msgs[i].len = 2;
|
||||
msgs[i].buf = buf + 2*i;
|
||||
buf[2*i + 0] = SDVO_I2C_OPCODE;
|
||||
buf[2*i + 1] = cmd;
|
||||
|
||||
/* the following two are to read the response */
|
||||
status = SDVO_I2C_CMD_STATUS;
|
||||
msgs[i+1].addr = intel_sdvo->slave_addr;
|
||||
msgs[i+1].flags = 0;
|
||||
msgs[i+1].len = 1;
|
||||
msgs[i+1].buf = &status;
|
||||
|
||||
msgs[i+2].addr = intel_sdvo->slave_addr;
|
||||
msgs[i+2].flags = I2C_M_RD;
|
||||
msgs[i+2].len = 1;
|
||||
msgs[i+2].buf = &status;
|
||||
|
||||
ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
|
||||
if (ret < 0) {
|
||||
DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
|
||||
return false;
|
||||
}
|
||||
if (ret != i+3) {
|
||||
/* failure in I2C transfer */
|
||||
DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
|
||||
return false;
|
||||
}
|
||||
|
||||
i = 3;
|
||||
while (status == SDVO_CMD_STATUS_PENDING && i--) {
|
||||
if (!intel_sdvo_read_byte(intel_sdvo,
|
||||
SDVO_I2C_CMD_STATUS,
|
||||
&status))
|
||||
return false;
|
||||
}
|
||||
if (status != SDVO_CMD_STATUS_SUCCESS) {
|
||||
DRM_DEBUG_KMS("command returns response %s [%d]\n",
|
||||
status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP ? cmd_status_names[status] : "???",
|
||||
status);
|
||||
return false;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
|
||||
void *response, int response_len)
|
||||
{
|
||||
@ -497,13 +527,9 @@ static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
|
||||
SDVO_I2C_RETURN_0 + i,
|
||||
&((u8 *)response)[i]))
|
||||
goto log_fail;
|
||||
DRM_LOG_KMS("%02X ", ((u8 *)response)[i]);
|
||||
DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
|
||||
}
|
||||
|
||||
for (; i < 8; i++)
|
||||
DRM_LOG_KMS(" ");
|
||||
DRM_LOG_KMS("\n");
|
||||
|
||||
return true;
|
||||
|
||||
log_fail:
|
||||
@ -521,75 +547,17 @@ static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
|
||||
return 4;
|
||||
}
|
||||
|
||||
/**
|
||||
* Try to read the response after issuie the DDC switch command. But it
|
||||
* is noted that we must do the action of reading response and issuing DDC
|
||||
* switch command in one I2C transaction. Otherwise when we try to start
|
||||
* another I2C transaction after issuing the DDC bus switch, it will be
|
||||
* switched to the internal SDVO register.
|
||||
*/
|
||||
static int intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
|
||||
u8 target)
|
||||
static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
|
||||
u8 ddc_bus)
|
||||
{
|
||||
u8 out_buf[2], cmd_buf[2], ret_value[2], ret;
|
||||
struct i2c_msg msgs[] = {
|
||||
{
|
||||
.addr = intel_sdvo->slave_addr >> 1,
|
||||
.flags = 0,
|
||||
.len = 2,
|
||||
.buf = out_buf,
|
||||
},
|
||||
/* the following two are to read the response */
|
||||
{
|
||||
.addr = intel_sdvo->slave_addr >> 1,
|
||||
.flags = 0,
|
||||
.len = 1,
|
||||
.buf = cmd_buf,
|
||||
},
|
||||
{
|
||||
.addr = intel_sdvo->slave_addr >> 1,
|
||||
.flags = I2C_M_RD,
|
||||
.len = 1,
|
||||
.buf = ret_value,
|
||||
},
|
||||
};
|
||||
|
||||
intel_sdvo_debug_write(intel_sdvo, SDVO_CMD_SET_CONTROL_BUS_SWITCH,
|
||||
&target, 1);
|
||||
/* write the DDC switch command argument */
|
||||
if (!intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_ARG_0, target))
|
||||
return -EIO;
|
||||
|
||||
out_buf[0] = SDVO_I2C_OPCODE;
|
||||
out_buf[1] = SDVO_CMD_SET_CONTROL_BUS_SWITCH;
|
||||
cmd_buf[0] = SDVO_I2C_CMD_STATUS;
|
||||
cmd_buf[1] = 0;
|
||||
ret_value[0] = 0;
|
||||
ret_value[1] = 0;
|
||||
|
||||
ret = i2c_transfer(intel_sdvo->i2c, msgs, 3);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
if (ret != 3) {
|
||||
/* failure in I2C transfer */
|
||||
DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
|
||||
return -EIO;
|
||||
}
|
||||
if (ret_value[0] != SDVO_CMD_STATUS_SUCCESS) {
|
||||
DRM_DEBUG_KMS("DDC switch command returns response %d\n",
|
||||
ret_value[0]);
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
return 0;
|
||||
return intel_sdvo_write_cmd(intel_sdvo,
|
||||
SDVO_CMD_SET_CONTROL_BUS_SWITCH,
|
||||
&ddc_bus, 1);
|
||||
}
|
||||
|
||||
static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
|
||||
{
|
||||
if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
|
||||
return false;
|
||||
|
||||
return intel_sdvo_read_response(intel_sdvo, NULL, 0);
|
||||
return intel_sdvo_write_cmd(intel_sdvo, cmd, data, len);
|
||||
}
|
||||
|
||||
static bool
|
||||
@ -1272,7 +1240,38 @@ static int intel_sdvo_mode_valid(struct drm_connector *connector,
|
||||
|
||||
static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
|
||||
{
|
||||
return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DEVICE_CAPS, caps, sizeof(*caps));
|
||||
if (!intel_sdvo_get_value(intel_sdvo,
|
||||
SDVO_CMD_GET_DEVICE_CAPS,
|
||||
caps, sizeof(*caps)))
|
||||
return false;
|
||||
|
||||
DRM_DEBUG_KMS("SDVO capabilities:\n"
|
||||
" vendor_id: %d\n"
|
||||
" device_id: %d\n"
|
||||
" device_rev_id: %d\n"
|
||||
" sdvo_version_major: %d\n"
|
||||
" sdvo_version_minor: %d\n"
|
||||
" sdvo_inputs_mask: %d\n"
|
||||
" smooth_scaling: %d\n"
|
||||
" sharp_scaling: %d\n"
|
||||
" up_scaling: %d\n"
|
||||
" down_scaling: %d\n"
|
||||
" stall_support: %d\n"
|
||||
" output_flags: %d\n",
|
||||
caps->vendor_id,
|
||||
caps->device_id,
|
||||
caps->device_rev_id,
|
||||
caps->sdvo_version_major,
|
||||
caps->sdvo_version_minor,
|
||||
caps->sdvo_inputs_mask,
|
||||
caps->smooth_scaling,
|
||||
caps->sharp_scaling,
|
||||
caps->up_scaling,
|
||||
caps->down_scaling,
|
||||
caps->stall_support,
|
||||
caps->output_flags);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/* No use! */
|
||||
@ -1377,16 +1376,10 @@ intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
|
||||
}
|
||||
|
||||
static struct edid *
|
||||
intel_sdvo_get_edid(struct drm_connector *connector, int ddc)
|
||||
intel_sdvo_get_edid(struct drm_connector *connector)
|
||||
{
|
||||
struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
|
||||
int ret;
|
||||
|
||||
ret = intel_sdvo_set_control_bus_switch(intel_sdvo, ddc);
|
||||
if (ret)
|
||||
return NULL;
|
||||
|
||||
return drm_get_edid(connector, intel_sdvo->i2c);
|
||||
struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
|
||||
return drm_get_edid(connector, &sdvo->ddc);
|
||||
}
|
||||
|
||||
static struct drm_connector *
|
||||
@ -1447,26 +1440,27 @@ intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
|
||||
enum drm_connector_status status;
|
||||
struct edid *edid;
|
||||
|
||||
edid = intel_sdvo_get_edid(connector, intel_sdvo->ddc_bus);
|
||||
edid = intel_sdvo_get_edid(connector);
|
||||
|
||||
if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
|
||||
u8 ddc;
|
||||
u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
|
||||
|
||||
/*
|
||||
* Don't use the 1 as the argument of DDC bus switch to get
|
||||
* the EDID. It is used for SDVO SPD ROM.
|
||||
*/
|
||||
for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
|
||||
edid = intel_sdvo_get_edid(connector, ddc);
|
||||
if (edid) {
|
||||
intel_sdvo->ddc_bus = ddc;
|
||||
edid = intel_sdvo_get_edid(connector);
|
||||
if (edid)
|
||||
break;
|
||||
}
|
||||
/*
|
||||
* If we found the EDID on the other bus,
|
||||
* assume that is the correct DDC bus.
|
||||
*/
|
||||
intel_sdvo->ddc_bus = ddc;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (edid == NULL)
|
||||
intel_sdvo->ddc_bus = saved_ddc;
|
||||
}
|
||||
|
||||
/*
|
||||
@ -1508,7 +1502,9 @@ intel_sdvo_detect(struct drm_connector *connector, bool force)
|
||||
if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
|
||||
return connector_status_unknown;
|
||||
|
||||
DRM_DEBUG_KMS("SDVO response %d %d\n", response & 0xff, response >> 8);
|
||||
DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
|
||||
response & 0xff, response >> 8,
|
||||
intel_sdvo_connector->output_flag);
|
||||
|
||||
if (response == 0)
|
||||
return connector_status_disconnected;
|
||||
@ -1541,11 +1537,10 @@ intel_sdvo_detect(struct drm_connector *connector, bool force)
|
||||
|
||||
static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
|
||||
{
|
||||
struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
|
||||
struct edid *edid;
|
||||
|
||||
/* set the bus switch and get the modes */
|
||||
edid = intel_sdvo_get_edid(connector, intel_sdvo->ddc_bus);
|
||||
edid = intel_sdvo_get_edid(connector);
|
||||
|
||||
/*
|
||||
* Mac mini hack. On this device, the DVI-I connector shares one DDC
|
||||
@ -1647,7 +1642,8 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
|
||||
return;
|
||||
|
||||
BUILD_BUG_ON(sizeof(tv_res) != 3);
|
||||
if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
|
||||
if (!intel_sdvo_write_cmd(intel_sdvo,
|
||||
SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
|
||||
&tv_res, sizeof(tv_res)))
|
||||
return;
|
||||
if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
|
||||
@ -1924,6 +1920,7 @@ static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
|
||||
drm_mode_destroy(encoder->dev,
|
||||
intel_sdvo->sdvo_lvds_fixed_mode);
|
||||
|
||||
i2c_del_adapter(&intel_sdvo->ddc);
|
||||
intel_encoder_destroy(encoder);
|
||||
}
|
||||
|
||||
@ -1991,6 +1988,30 @@ intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
|
||||
intel_sdvo_guess_ddc_bus(sdvo);
|
||||
}
|
||||
|
||||
static void
|
||||
intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
|
||||
struct intel_sdvo *sdvo, u32 reg)
|
||||
{
|
||||
struct sdvo_device_mapping *mapping;
|
||||
u8 pin, speed;
|
||||
|
||||
if (IS_SDVOB(reg))
|
||||
mapping = &dev_priv->sdvo_mappings[0];
|
||||
else
|
||||
mapping = &dev_priv->sdvo_mappings[1];
|
||||
|
||||
pin = GMBUS_PORT_DPB;
|
||||
speed = GMBUS_RATE_1MHZ >> 8;
|
||||
if (mapping->initialized) {
|
||||
pin = mapping->i2c_pin;
|
||||
speed = mapping->i2c_speed;
|
||||
}
|
||||
|
||||
sdvo->i2c = &dev_priv->gmbus[pin].adapter;
|
||||
intel_gmbus_set_speed(sdvo->i2c, speed);
|
||||
intel_gmbus_force_bit(sdvo->i2c, true);
|
||||
}
|
||||
|
||||
static bool
|
||||
intel_sdvo_get_digital_encoding_mode(struct intel_sdvo *intel_sdvo, int device)
|
||||
{
|
||||
@ -2504,7 +2525,43 @@ static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
|
||||
return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
|
||||
else
|
||||
return true;
|
||||
}
|
||||
|
||||
static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
|
||||
struct i2c_msg *msgs,
|
||||
int num)
|
||||
{
|
||||
struct intel_sdvo *sdvo = adapter->algo_data;
|
||||
|
||||
if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
|
||||
return -EIO;
|
||||
|
||||
return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
|
||||
}
|
||||
|
||||
static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
|
||||
{
|
||||
struct intel_sdvo *sdvo = adapter->algo_data;
|
||||
return sdvo->i2c->algo->functionality(sdvo->i2c);
|
||||
}
|
||||
|
||||
static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
|
||||
.master_xfer = intel_sdvo_ddc_proxy_xfer,
|
||||
.functionality = intel_sdvo_ddc_proxy_func
|
||||
};
|
||||
|
||||
static bool
|
||||
intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
|
||||
struct drm_device *dev)
|
||||
{
|
||||
sdvo->ddc.owner = THIS_MODULE;
|
||||
sdvo->ddc.class = I2C_CLASS_DDC;
|
||||
snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
|
||||
sdvo->ddc.dev.parent = &dev->pdev->dev;
|
||||
sdvo->ddc.algo_data = sdvo;
|
||||
sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
|
||||
|
||||
return i2c_add_adapter(&sdvo->ddc) == 0;
|
||||
}
|
||||
|
||||
bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
|
||||
@ -2518,6 +2575,11 @@ bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
|
||||
if (!intel_sdvo)
|
||||
return false;
|
||||
|
||||
if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
|
||||
kfree(intel_sdvo);
|
||||
return false;
|
||||
}
|
||||
|
||||
intel_sdvo->sdvo_reg = sdvo_reg;
|
||||
|
||||
intel_encoder = &intel_sdvo->base;
|
||||
@ -2525,9 +2587,8 @@ bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
|
||||
/* encoder type will be decided later */
|
||||
drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
|
||||
|
||||
intel_sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
|
||||
|
||||
intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg);
|
||||
intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
|
||||
intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
|
||||
|
||||
/* Read the regs to test if we can talk to the device */
|
||||
for (i = 0; i < 0x40; i++) {
|
||||
@ -2589,6 +2650,7 @@ bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
|
||||
|
||||
err:
|
||||
drm_encoder_cleanup(&intel_encoder->base);
|
||||
i2c_del_adapter(&intel_sdvo->ddc);
|
||||
kfree(intel_sdvo);
|
||||
|
||||
return false;
|
||||
|
Loading…
Reference in New Issue
Block a user