forked from Minki/linux
arm: vt8500: Add pinctrl driver for arch-vt8500
This series adds support for the pinctrl/gpio module on all arch-vt8500 supported SoCs. As part of the review process, some tidy up is also done to drivers/of/base.c to remove some code that is being constantly duplicated. Also, a patch for the bcm2835 pinctrl driver is included to take advantage of the new of/base.c code. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJRXQtJAAoJEAKiPfwuf9N/a/8H/3qun+1PnkDIGmC0amZDDrXD tF8pruxccwOjh4Wug+UUzAwsBgej4NB193/ljFc35em9yFlZAcXBo0tLUd1gTxSd nOkNWjYtFCK3hdmsE29Le9bRkCxn7g07uEkOKWSw79aYWrTRy63FDnr0p45YZvih C4+ry92c50SJoW5kp+L6lS0aQjeBGXRCRcvuRBdwGPLYQXX/gEJfJrvU40ZrPByr KJqhNOPoNS99OaVMPWDP4HCjCd/XVHBqd8Qz6M2uEIo2EBS0DnOt5IGoaRfTvEXM Qx/y769v8/ndcdLAXFdPo+1ZgrrCXm7SozJhwAtMm3ruCxIN8u9LB6ZjMV2uaBo= =+Y/Z -----END PGP SIGNATURE----- Merge tag 'vt8500/pinctrl' of git://server.prisktech.co.nz/git/linuxwmt into next/drivers From Tony Prisk <linux@prisktech.co.nz>: arm: vt8500: Add pinctrl driver for arch-vt8500 This series adds support for the pinctrl/gpio module on all arch-vt8500 supported SoCs. As part of the review process, some tidy up is also done to drivers/of/base.c to remove some code that is being constantly duplicated. Also, a patch for the bcm2835 pinctrl driver is included to take advantage of the new of/base.c code. * tag 'vt8500/pinctrl' of git://server.prisktech.co.nz/git/linuxwmt: (606 commits) pinctrl: bcm2835: make use of of_property_read_u32_index() gpio: vt8500: Remove arch-vt8500 gpio driver arm: vt8500: Remove gpio devicetree nodes arm: dts: vt8500: Update Wondermedia SoC dtsi files for pinctrl driver pinctrl: gpio: vt8500: Add pincontrol driver for arch-vt8500 arm: vt8500: Increase available GPIOs on arch-vt8500 of: Remove duplicated code for validating property and value of: Add support for reading a u32 from a multi-value property. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
e9069cf8b7
8
CREDITS
8
CREDITS
@ -1510,6 +1510,14 @@ D: Natsemi ethernet
|
||||
D: Cobalt Networks (x86) support
|
||||
D: This-and-That
|
||||
|
||||
N: Mark M. Hoffman
|
||||
E: mhoffman@lightlink.com
|
||||
D: asb100, lm93 and smsc47b397 hardware monitoring drivers
|
||||
D: hwmon subsystem core
|
||||
D: hwmon subsystem maintainer
|
||||
D: i2c-sis96x and i2c-stub SMBus drivers
|
||||
S: USA
|
||||
|
||||
N: Dirk Hohndel
|
||||
E: hohndel@suse.de
|
||||
D: The XFree86[tm] Project
|
||||
|
@ -1,24 +0,0 @@
|
||||
VIA/Wondermedia VT8500 GPIO Controller
|
||||
-----------------------------------------------------
|
||||
|
||||
Required properties:
|
||||
- compatible : "via,vt8500-gpio", "wm,wm8505-gpio"
|
||||
or "wm,wm8650-gpio" depending on your SoC
|
||||
- reg : Should contain 1 register range (address and length)
|
||||
- #gpio-cells : should be <3>.
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||||
1) bank
|
||||
2) pin number
|
||||
3) flags - should be 0
|
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|
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Example:
|
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|
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gpio: gpio-controller@d8110000 {
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compatible = "via,vt8500-gpio";
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gpio-controller;
|
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reg = <0xd8110000 0x10000>;
|
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#gpio-cells = <3>;
|
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};
|
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|
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vibrate {
|
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gpios = <&gpio 0 1 0>; /* Bank 0, Pin 1, No flags */
|
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};
|
@ -13,9 +13,6 @@ Required parent device properties:
|
||||
4 = active high level-sensitive
|
||||
8 = active low level-sensitive
|
||||
|
||||
Optional parent device properties:
|
||||
- reg : contains the PRCMU mailbox address for the AB8500 i2c port
|
||||
|
||||
The AB8500 consists of a large and varied group of sub-devices:
|
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|
||||
Device IRQ Names Supply Names Description
|
||||
@ -86,9 +83,8 @@ Non-standard child device properties:
|
||||
- stericsson,amic2-bias-vamic1 : Analoge Mic wishes to use a non-standard Vamic
|
||||
- stericsson,earpeice-cmv : Earpeice voltage (only: 950 | 1100 | 1270 | 1580)
|
||||
|
||||
ab8500@5 {
|
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ab8500 {
|
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compatible = "stericsson,ab8500";
|
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reg = <5>; /* mailbox 5 is i2c */
|
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interrupts = <0 40 0x4>;
|
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interrupt-controller;
|
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#interrupt-cells = <2>;
|
||||
|
57
Documentation/devicetree/bindings/pinctrl/pinctrl-vt8500.txt
Normal file
57
Documentation/devicetree/bindings/pinctrl/pinctrl-vt8500.txt
Normal file
@ -0,0 +1,57 @@
|
||||
VIA VT8500 and Wondermedia WM8xxx-series pinmux/gpio controller
|
||||
|
||||
These SoCs contain a combined Pinmux/GPIO module. Each pin may operate as
|
||||
either a GPIO in, GPIO out or as an alternate function (I2C, SPI etc).
|
||||
|
||||
Required properties:
|
||||
- compatible: "via,vt8500-pinctrl", "wm,wm8505-pinctrl", "wm,wm8650-pinctrl",
|
||||
"wm8750-pinctrl" or "wm,wm8850-pinctrl"
|
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- reg: Should contain the physical address of the module's registers.
|
||||
- interrupt-controller: Marks the device node as an interrupt controller.
|
||||
- #interrupt-cells: Should be two.
|
||||
- gpio-controller: Marks the device node as a GPIO controller.
|
||||
- #gpio-cells : Should be two. The first cell is the pin number and the
|
||||
second cell is used to specify optional parameters.
|
||||
bit 0 - active low
|
||||
|
||||
Please refer to ../gpio/gpio.txt for a general description of GPIO bindings.
|
||||
|
||||
Please refer to pinctrl-bindings.txt in this directory for details of the
|
||||
common pinctrl bindings used by client devices, including the meaning of the
|
||||
phrase "pin configuration node".
|
||||
|
||||
Each pin configuration node lists the pin(s) to which it applies, and one or
|
||||
more of the mux functions to select on those pin(s), and pull-up/down
|
||||
configuration. Each subnode only affects those parameters that are explicitly
|
||||
listed. In other words, a subnode that lists only a mux function implies no
|
||||
information about any pull configuration. Similarly, a subnode that lists only
|
||||
a pull parameter implies no information about the mux function.
|
||||
|
||||
Required subnode-properties:
|
||||
- wm,pins: An array of cells. Each cell contains the ID of a pin.
|
||||
|
||||
Optional subnode-properties:
|
||||
- wm,function: Integer, containing the function to mux to the pin(s):
|
||||
0: GPIO in
|
||||
1: GPIO out
|
||||
2: alternate
|
||||
|
||||
- wm,pull: Integer, representing the pull-down/up to apply to the pin(s):
|
||||
0: none
|
||||
1: down
|
||||
2: up
|
||||
|
||||
Each of wm,function and wm,pull may contain either a single value which
|
||||
will be applied to all pins in wm,pins, or one value for each entry in
|
||||
wm,pins.
|
||||
|
||||
Example:
|
||||
|
||||
pinctrl: pinctrl {
|
||||
compatible = "wm,wm8505-pinctrl";
|
||||
reg = <0xD8110000 0x10000>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
@ -11,6 +11,9 @@ Required properties:
|
||||
- "nvidia,tegra20-uart"
|
||||
- "nxp,lpc3220-uart"
|
||||
- "ibm,qpace-nwp-serial"
|
||||
- "altr,16550-FIFO32"
|
||||
- "altr,16550-FIFO64"
|
||||
- "altr,16550-FIFO128"
|
||||
- "serial" if the port type is unknown.
|
||||
- reg : offset and length of the register set for the device.
|
||||
- interrupts : should contain uart interrupt.
|
||||
|
@ -23,7 +23,7 @@ Supported chips:
|
||||
Datasheet: Publicly available at the Maxim website
|
||||
http://www.maxim-ic.com/
|
||||
* Microchip (TelCom) TCN75
|
||||
Prefix: 'lm75'
|
||||
Prefix: 'tcn75'
|
||||
Addresses scanned: none
|
||||
Datasheet: Publicly available at the Microchip website
|
||||
http://www.microchip.com/
|
||||
|
@ -5,7 +5,7 @@ Supported adapters:
|
||||
Documentation:
|
||||
http://www.diolan.com/i2c/u2c12.html
|
||||
|
||||
Author: Guenter Roeck <guenter.roeck@ericsson.com>
|
||||
Author: Guenter Roeck <linux@roeck-us.net>
|
||||
|
||||
Description
|
||||
-----------
|
||||
|
@ -3,10 +3,26 @@ ALPS Touchpad Protocol
|
||||
|
||||
Introduction
|
||||
------------
|
||||
Currently the ALPS touchpad driver supports five protocol versions in use by
|
||||
ALPS touchpads, called versions 1, 2, 3, 4 and 5.
|
||||
|
||||
Currently the ALPS touchpad driver supports four protocol versions in use by
|
||||
ALPS touchpads, called versions 1, 2, 3, and 4. Information about the various
|
||||
protocol versions is contained in the following sections.
|
||||
Since roughly mid-2010 several new ALPS touchpads have been released and
|
||||
integrated into a variety of laptops and netbooks. These new touchpads
|
||||
have enough behavior differences that the alps_model_data definition
|
||||
table, describing the properties of the different versions, is no longer
|
||||
adequate. The design choices were to re-define the alps_model_data
|
||||
table, with the risk of regression testing existing devices, or isolate
|
||||
the new devices outside of the alps_model_data table. The latter design
|
||||
choice was made. The new touchpad signatures are named: "Rushmore",
|
||||
"Pinnacle", and "Dolphin", which you will see in the alps.c code.
|
||||
For the purposes of this document, this group of ALPS touchpads will
|
||||
generically be called "new ALPS touchpads".
|
||||
|
||||
We experimented with probing the ACPI interface _HID (Hardware ID)/_CID
|
||||
(Compatibility ID) definition as a way to uniquely identify the
|
||||
different ALPS variants but there did not appear to be a 1:1 mapping.
|
||||
In fact, it appeared to be an m:n mapping between the _HID and actual
|
||||
hardware type.
|
||||
|
||||
Detection
|
||||
---------
|
||||
@ -20,9 +36,13 @@ If the E6 report is successful, the touchpad model is identified using the "E7
|
||||
report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is
|
||||
matched against known models in the alps_model_data_array.
|
||||
|
||||
With protocol versions 3 and 4, the E7 report model signature is always
|
||||
73-02-64. To differentiate between these versions, the response from the
|
||||
"Enter Command Mode" sequence must be inspected as described below.
|
||||
For older touchpads supporting protocol versions 3 and 4, the E7 report
|
||||
model signature is always 73-02-64. To differentiate between these
|
||||
versions, the response from the "Enter Command Mode" sequence must be
|
||||
inspected as described below.
|
||||
|
||||
The new ALPS touchpads have an E7 signature of 73-03-50 or 73-03-0A but
|
||||
seem to be better differentiated by the EC Command Mode response.
|
||||
|
||||
Command Mode
|
||||
------------
|
||||
@ -47,6 +67,14 @@ address of the register being read, and the third contains the value of the
|
||||
register. Registers are written by writing the value one nibble at a time
|
||||
using the same encoding used for addresses.
|
||||
|
||||
For the new ALPS touchpads, the EC command is used to enter command
|
||||
mode. The response in the new ALPS touchpads is significantly different,
|
||||
and more important in determining the behavior. This code has been
|
||||
separated from the original alps_model_data table and put in the
|
||||
alps_identify function. For example, there seem to be two hardware init
|
||||
sequences for the "Dolphin" touchpads as determined by the second byte
|
||||
of the EC response.
|
||||
|
||||
Packet Format
|
||||
-------------
|
||||
|
||||
@ -187,3 +215,28 @@ There are several things worth noting here.
|
||||
well.
|
||||
|
||||
So far no v4 devices with tracksticks have been encountered.
|
||||
|
||||
ALPS Absolute Mode - Protocol Version 5
|
||||
---------------------------------------
|
||||
This is basically Protocol Version 3 but with different logic for packet
|
||||
decode. It uses the same alps_process_touchpad_packet_v3 call with a
|
||||
specialized decode_fields function pointer to correctly interpret the
|
||||
packets. This appears to only be used by the Dolphin devices.
|
||||
|
||||
For single-touch, the 6-byte packet format is:
|
||||
|
||||
byte 0: 1 1 0 0 1 0 0 0
|
||||
byte 1: 0 x6 x5 x4 x3 x2 x1 x0
|
||||
byte 2: 0 y6 y5 y4 y3 y2 y1 y0
|
||||
byte 3: 0 M R L 1 m r l
|
||||
byte 4: y10 y9 y8 y7 x10 x9 x8 x7
|
||||
byte 5: 0 z6 z5 z4 z3 z2 z1 z0
|
||||
|
||||
For mt, the format is:
|
||||
|
||||
byte 0: 1 1 1 n3 1 n2 n1 x24
|
||||
byte 1: 1 y7 y6 y5 y4 y3 y2 y1
|
||||
byte 2: ? x2 x1 y12 y11 y10 y9 y8
|
||||
byte 3: 0 x23 x22 x21 x20 x19 x18 x17
|
||||
byte 4: 0 x9 x8 x7 x6 x5 x4 x3
|
||||
byte 5: 0 x16 x15 x14 x13 x12 x11 x10
|
||||
|
@ -105,6 +105,83 @@ Copyright (C) 1999-2000 Maxim Krasnyansky <max_mk@yahoo.com>
|
||||
Proto [2 bytes]
|
||||
Raw protocol(IP, IPv6, etc) frame.
|
||||
|
||||
3.3 Multiqueue tuntap interface:
|
||||
|
||||
From version 3.8, Linux supports multiqueue tuntap which can uses multiple
|
||||
file descriptors (queues) to parallelize packets sending or receiving. The
|
||||
device allocation is the same as before, and if user wants to create multiple
|
||||
queues, TUNSETIFF with the same device name must be called many times with
|
||||
IFF_MULTI_QUEUE flag.
|
||||
|
||||
char *dev should be the name of the device, queues is the number of queues to
|
||||
be created, fds is used to store and return the file descriptors (queues)
|
||||
created to the caller. Each file descriptor were served as the interface of a
|
||||
queue which could be accessed by userspace.
|
||||
|
||||
#include <linux/if.h>
|
||||
#include <linux/if_tun.h>
|
||||
|
||||
int tun_alloc_mq(char *dev, int queues, int *fds)
|
||||
{
|
||||
struct ifreq ifr;
|
||||
int fd, err, i;
|
||||
|
||||
if (!dev)
|
||||
return -1;
|
||||
|
||||
memset(&ifr, 0, sizeof(ifr));
|
||||
/* Flags: IFF_TUN - TUN device (no Ethernet headers)
|
||||
* IFF_TAP - TAP device
|
||||
*
|
||||
* IFF_NO_PI - Do not provide packet information
|
||||
* IFF_MULTI_QUEUE - Create a queue of multiqueue device
|
||||
*/
|
||||
ifr.ifr_flags = IFF_TAP | IFF_NO_PI | IFF_MULTI_QUEUE;
|
||||
strcpy(ifr.ifr_name, dev);
|
||||
|
||||
for (i = 0; i < queues; i++) {
|
||||
if ((fd = open("/dev/net/tun", O_RDWR)) < 0)
|
||||
goto err;
|
||||
err = ioctl(fd, TUNSETIFF, (void *)&ifr);
|
||||
if (err) {
|
||||
close(fd);
|
||||
goto err;
|
||||
}
|
||||
fds[i] = fd;
|
||||
}
|
||||
|
||||
return 0;
|
||||
err:
|
||||
for (--i; i >= 0; i--)
|
||||
close(fds[i]);
|
||||
return err;
|
||||
}
|
||||
|
||||
A new ioctl(TUNSETQUEUE) were introduced to enable or disable a queue. When
|
||||
calling it with IFF_DETACH_QUEUE flag, the queue were disabled. And when
|
||||
calling it with IFF_ATTACH_QUEUE flag, the queue were enabled. The queue were
|
||||
enabled by default after it was created through TUNSETIFF.
|
||||
|
||||
fd is the file descriptor (queue) that we want to enable or disable, when
|
||||
enable is true we enable it, otherwise we disable it
|
||||
|
||||
#include <linux/if.h>
|
||||
#include <linux/if_tun.h>
|
||||
|
||||
int tun_set_queue(int fd, int enable)
|
||||
{
|
||||
struct ifreq ifr;
|
||||
|
||||
memset(&ifr, 0, sizeof(ifr));
|
||||
|
||||
if (enable)
|
||||
ifr.ifr_flags = IFF_ATTACH_QUEUE;
|
||||
else
|
||||
ifr.ifr_flags = IFF_DETACH_QUEUE;
|
||||
|
||||
return ioctl(fd, TUNSETQUEUE, (void *)&ifr);
|
||||
}
|
||||
|
||||
Universal TUN/TAP device driver Frequently Asked Question.
|
||||
|
||||
1. What platforms are supported by TUN/TAP driver ?
|
||||
|
@ -912,7 +912,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
|
||||
models depending on the codec chip. The list of available models
|
||||
is found in HD-Audio-Models.txt
|
||||
|
||||
The model name "genric" is treated as a special case. When this
|
||||
The model name "generic" is treated as a special case. When this
|
||||
model is given, the driver uses the generic codec parser without
|
||||
"codec-patch". It's sometimes good for testing and debugging.
|
||||
|
||||
|
@ -285,7 +285,7 @@ sample data.
|
||||
<H4>
|
||||
7.2.4 Close Callback</H4>
|
||||
The <TT>close</TT> callback is called when this device is closed by the
|
||||
applicaion. If any private data was allocated in open callback, it must
|
||||
application. If any private data was allocated in open callback, it must
|
||||
be released in the close callback. The deletion of ALSA port should be
|
||||
done here, too. This callback must not be NULL.
|
||||
<H4>
|
||||
|
@ -1873,7 +1873,7 @@ feature:
|
||||
|
||||
status\input | 0 | 1 | else |
|
||||
--------------+------------+------------+------------+
|
||||
not allocated |(do nothing)| alloc+swap | EINVAL |
|
||||
not allocated |(do nothing)| alloc+swap |(do nothing)|
|
||||
--------------+------------+------------+------------+
|
||||
allocated | free | swap | clear |
|
||||
--------------+------------+------------+------------+
|
||||
|
60
MAINTAINERS
60
MAINTAINERS
@ -1338,12 +1338,6 @@ S: Maintained
|
||||
F: drivers/platform/x86/asus*.c
|
||||
F: drivers/platform/x86/eeepc*.c
|
||||
|
||||
ASUS ASB100 HARDWARE MONITOR DRIVER
|
||||
M: "Mark M. Hoffman" <mhoffman@lightlink.com>
|
||||
L: lm-sensors@lm-sensors.org
|
||||
S: Maintained
|
||||
F: drivers/hwmon/asb100.c
|
||||
|
||||
ASYNCHRONOUS TRANSFERS/TRANSFORMS (IOAT) API
|
||||
M: Dan Williams <djbw@fb.com>
|
||||
W: http://sourceforge.net/projects/xscaleiop
|
||||
@ -1467,6 +1461,12 @@ F: drivers/dma/at_hdmac.c
|
||||
F: drivers/dma/at_hdmac_regs.h
|
||||
F: include/linux/platform_data/dma-atmel.h
|
||||
|
||||
ATMEL I2C DRIVER
|
||||
M: Ludovic Desroches <ludovic.desroches@atmel.com>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/i2c/busses/i2c-at91.c
|
||||
|
||||
ATMEL ISI DRIVER
|
||||
M: Josh Wu <josh.wu@atmel.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
@ -2629,7 +2629,7 @@ F: include/uapi/drm/
|
||||
|
||||
INTEL DRM DRIVERS (excluding Poulsbo, Moorestown and derivative chipsets)
|
||||
M: Daniel Vetter <daniel.vetter@ffwll.ch>
|
||||
L: intel-gfx@lists.freedesktop.org (subscribers-only)
|
||||
L: intel-gfx@lists.freedesktop.org
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
T: git git://people.freedesktop.org/~danvet/drm-intel
|
||||
S: Supported
|
||||
@ -3851,7 +3851,7 @@ F: drivers/i2c/busses/i2c-ismt.c
|
||||
F: Documentation/i2c/busses/i2c-ismt
|
||||
|
||||
I2C/SMBUS STUB DRIVER
|
||||
M: "Mark M. Hoffman" <mhoffman@lightlink.com>
|
||||
M: Jean Delvare <khali@linux-fr.org>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/i2c/i2c-stub.c
|
||||
@ -4005,6 +4005,22 @@ M: Stanislaw Gruszka <stf_xl@wp.pl>
|
||||
S: Maintained
|
||||
F: drivers/usb/atm/ueagle-atm.c
|
||||
|
||||
INA209 HARDWARE MONITOR DRIVER
|
||||
M: Guenter Roeck <linux@roeck-us.net>
|
||||
L: lm-sensors@lm-sensors.org
|
||||
S: Maintained
|
||||
F: Documentation/hwmon/ina209
|
||||
F: Documentation/devicetree/bindings/i2c/ina209.txt
|
||||
F: drivers/hwmon/ina209.c
|
||||
|
||||
INA2XX HARDWARE MONITOR DRIVER
|
||||
M: Guenter Roeck <linux@roeck-us.net>
|
||||
L: lm-sensors@lm-sensors.org
|
||||
S: Maintained
|
||||
F: Documentation/hwmon/ina2xx
|
||||
F: drivers/hwmon/ina2xx.c
|
||||
F: include/linux/platform_data/ina2xx.h
|
||||
|
||||
INDUSTRY PACK SUBSYSTEM (IPACK)
|
||||
M: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
|
||||
M: Jens Taprogge <jens.taprogge@taprogge.org>
|
||||
@ -5098,6 +5114,15 @@ S: Maintained
|
||||
F: Documentation/hwmon/max6650
|
||||
F: drivers/hwmon/max6650.c
|
||||
|
||||
MAX6697 HARDWARE MONITOR DRIVER
|
||||
M: Guenter Roeck <linux@roeck-us.net>
|
||||
L: lm-sensors@lm-sensors.org
|
||||
S: Maintained
|
||||
F: Documentation/hwmon/max6697
|
||||
F: Documentation/devicetree/bindings/i2c/max6697.txt
|
||||
F: drivers/hwmon/max6697.c
|
||||
F: include/linux/platform_data/max6697.h
|
||||
|
||||
MAXIRADIO FM RADIO RECEIVER DRIVER
|
||||
M: Hans Verkuil <hverkuil@xs4all.nl>
|
||||
L: linux-media@vger.kernel.org
|
||||
@ -5622,6 +5647,14 @@ S: Maintained
|
||||
F: drivers/video/riva/
|
||||
F: drivers/video/nvidia/
|
||||
|
||||
NVM EXPRESS DRIVER
|
||||
M: Matthew Wilcox <willy@linux.intel.com>
|
||||
L: linux-nvme@lists.infradead.org
|
||||
T: git git://git.infradead.org/users/willy/linux-nvme.git
|
||||
S: Supported
|
||||
F: drivers/block/nvme.c
|
||||
F: include/linux/nvme.h
|
||||
|
||||
OMAP SUPPORT
|
||||
M: Tony Lindgren <tony@atomide.com>
|
||||
L: linux-omap@vger.kernel.org
|
||||
@ -6412,6 +6445,8 @@ F: Documentation/networking/LICENSE.qla3xxx
|
||||
F: drivers/net/ethernet/qlogic/qla3xxx.*
|
||||
|
||||
QLOGIC QLCNIC (1/10)Gb ETHERNET DRIVER
|
||||
M: Rajesh Borundia <rajesh.borundia@qlogic.com>
|
||||
M: Shahed Shaikh <shahed.shaikh@qlogic.com>
|
||||
M: Jitendra Kalsaria <jitendra.kalsaria@qlogic.com>
|
||||
M: Sony Chacko <sony.chacko@qlogic.com>
|
||||
M: linux-driver@qlogic.com
|
||||
@ -7171,13 +7206,6 @@ L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/ethernet/sis/sis900.*
|
||||
|
||||
SIS 96X I2C/SMBUS DRIVER
|
||||
M: "Mark M. Hoffman" <mhoffman@lightlink.com>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/i2c/busses/i2c-sis96x
|
||||
F: drivers/i2c/busses/i2c-sis96x.c
|
||||
|
||||
SIS FRAMEBUFFER DRIVER
|
||||
M: Thomas Winischhofer <thomas@winischhofer.net>
|
||||
W: http://www.winischhofer.net/linuxsisvga.shtml
|
||||
@ -7255,7 +7283,7 @@ F: Documentation/hwmon/sch5627
|
||||
F: drivers/hwmon/sch5627.c
|
||||
|
||||
SMSC47B397 HARDWARE MONITOR DRIVER
|
||||
M: "Mark M. Hoffman" <mhoffman@lightlink.com>
|
||||
M: Jean Delvare <khali@linux-fr.org>
|
||||
L: lm-sensors@lm-sensors.org
|
||||
S: Maintained
|
||||
F: Documentation/hwmon/smsc47b397
|
||||
|
2
Makefile
2
Makefile
@ -1,7 +1,7 @@
|
||||
VERSION = 3
|
||||
PATCHLEVEL = 9
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = Unicycling Gorilla
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
@ -319,13 +319,6 @@ config ARCH_WANT_OLD_COMPAT_IPC
|
||||
select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
|
||||
bool
|
||||
|
||||
config HAVE_VIRT_TO_BUS
|
||||
bool
|
||||
help
|
||||
An architecture should select this if it implements the
|
||||
deprecated interface virt_to_bus(). All new architectures
|
||||
should probably not select this.
|
||||
|
||||
config HAVE_ARCH_SECCOMP_FILTER
|
||||
bool
|
||||
help
|
||||
|
@ -9,7 +9,7 @@ config ALPHA
|
||||
select HAVE_PERF_EVENTS
|
||||
select HAVE_DMA_ATTRS
|
||||
select HAVE_GENERIC_HARDIRQS
|
||||
select HAVE_VIRT_TO_BUS
|
||||
select VIRT_TO_BUS
|
||||
select GENERIC_IRQ_PROBE
|
||||
select AUTO_IRQ_AFFINITY if SMP
|
||||
select GENERIC_IRQ_SHOW
|
||||
|
@ -49,7 +49,6 @@ config ARM
|
||||
select HAVE_REGS_AND_STACK_ACCESS_API
|
||||
select HAVE_SYSCALL_TRACEPOINTS
|
||||
select HAVE_UID16
|
||||
select HAVE_VIRT_TO_BUS
|
||||
select KTIME_SCALAR
|
||||
select PERF_USE_VMALLOC
|
||||
select RTC_LIB
|
||||
@ -556,7 +555,6 @@ config ARCH_IXP4XX
|
||||
config ARCH_DOVE
|
||||
bool "Marvell Dove"
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select COMMON_CLK_DOVE
|
||||
select CPU_V7
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select MIGHT_HAVE_PCI
|
||||
@ -744,6 +742,7 @@ config ARCH_RPC
|
||||
select NEED_MACH_IO_H
|
||||
select NEED_MACH_MEMORY_H
|
||||
select NO_IOPORT
|
||||
select VIRT_TO_BUS
|
||||
help
|
||||
On the Acorn Risc-PC, Linux can support the internal IDE disk and
|
||||
CD-ROM interface, serial and parallel port, and the floppy drive.
|
||||
@ -884,6 +883,7 @@ config ARCH_SHARK
|
||||
select ISA_DMA
|
||||
select NEED_MACH_MEMORY_H
|
||||
select PCI
|
||||
select VIRT_TO_BUS
|
||||
select ZONE_DMA
|
||||
help
|
||||
Support for the StrongARM based Digital DNARD machine, also known
|
||||
@ -1011,12 +1011,12 @@ config ARCH_MULTI_V4_V5
|
||||
bool
|
||||
|
||||
config ARCH_MULTI_V6
|
||||
bool "ARMv6 based platforms (ARM11, Scorpion, ...)"
|
||||
bool "ARMv6 based platforms (ARM11)"
|
||||
select ARCH_MULTI_V6_V7
|
||||
select CPU_V6
|
||||
|
||||
config ARCH_MULTI_V7
|
||||
bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)"
|
||||
bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
|
||||
default y
|
||||
select ARCH_MULTI_V6_V7
|
||||
select ARCH_VEXPRESS
|
||||
@ -1467,10 +1467,6 @@ config ISA_DMA
|
||||
bool
|
||||
select ISA_DMA_API
|
||||
|
||||
config ARCH_NO_VIRT_TO_BUS
|
||||
def_bool y
|
||||
depends on !ARCH_RPC && !ARCH_NETWINDER && !ARCH_SHARK
|
||||
|
||||
# Select ISA DMA interface
|
||||
config ISA_DMA_API
|
||||
bool
|
||||
@ -1662,13 +1658,17 @@ config LOCAL_TIMERS
|
||||
accounting to be spread across the timer interval, preventing a
|
||||
"thundering herd" at every timer tick.
|
||||
|
||||
# The GPIO number here must be sorted by descending number. In case of
|
||||
# a multiplatform kernel, we just want the highest value required by the
|
||||
# selected platforms.
|
||||
config ARCH_NR_GPIO
|
||||
int
|
||||
default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
|
||||
default 355 if ARCH_U8500
|
||||
default 264 if MACH_H4700
|
||||
default 512 if SOC_OMAP5
|
||||
default 288 if ARCH_VT8500 || ARCH_SUNXI
|
||||
default 355 if ARCH_U8500
|
||||
default 352 if ARCH_VT8500
|
||||
default 288 if ARCH_SUNXI
|
||||
default 264 if MACH_H4700
|
||||
default 0
|
||||
help
|
||||
Maximum number of GPIOs in the system.
|
||||
@ -1892,8 +1892,9 @@ config XEN_DOM0
|
||||
|
||||
config XEN
|
||||
bool "Xen guest support on ARM (EXPERIMENTAL)"
|
||||
depends on ARM && OF
|
||||
depends on ARM && AEABI && OF
|
||||
depends on CPU_V7 && !CPU_V6
|
||||
depends on !GENERIC_ATOMIC64
|
||||
help
|
||||
Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
|
||||
|
||||
|
@ -492,7 +492,7 @@ config DEBUG_IMX_UART_PORT
|
||||
DEBUG_IMX31_UART || \
|
||||
DEBUG_IMX35_UART || \
|
||||
DEBUG_IMX51_UART || \
|
||||
DEBUG_IMX50_IMX53_UART || \
|
||||
DEBUG_IMX53_UART || \
|
||||
DEBUG_IMX6Q_UART
|
||||
default 1
|
||||
help
|
||||
|
@ -115,4 +115,4 @@ i:
|
||||
$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
|
||||
$(obj)/Image System.map "$(INSTALL_PATH)"
|
||||
|
||||
subdir- := bootp compressed
|
||||
subdir- := bootp compressed dts
|
||||
|
@ -64,5 +64,13 @@
|
||||
status = "okay";
|
||||
/* No CD or WP GPIOs */
|
||||
};
|
||||
|
||||
usb@d0050000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb@d0051000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -31,7 +31,6 @@
|
||||
mpic: interrupt-controller@d0020000 {
|
||||
compatible = "marvell,mpic";
|
||||
#interrupt-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
interrupt-controller;
|
||||
};
|
||||
@ -54,7 +53,7 @@
|
||||
reg = <0xd0012000 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <41>;
|
||||
reg-io-width = <4>;
|
||||
reg-io-width = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
serial@d0012100 {
|
||||
@ -62,7 +61,7 @@
|
||||
reg = <0xd0012100 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <42>;
|
||||
reg-io-width = <4>;
|
||||
reg-io-width = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -46,7 +46,7 @@
|
||||
reg = <0xd0012200 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <43>;
|
||||
reg-io-width = <4>;
|
||||
reg-io-width = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
serial@d0012300 {
|
||||
@ -54,7 +54,7 @@
|
||||
reg = <0xd0012300 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <44>;
|
||||
reg-io-width = <4>;
|
||||
reg-io-width = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -238,8 +238,32 @@
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
atmel,pins =
|
||||
<3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
|
||||
3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
|
||||
<3 0 0x1 0x0 /* PD0 periph A Read Enable */
|
||||
3 1 0x1 0x0 /* PD1 periph A Write Enable */
|
||||
3 2 0x1 0x0 /* PD2 periph A Address Latch Enable */
|
||||
3 3 0x1 0x0 /* PD3 periph A Command Latch Enable */
|
||||
3 4 0x0 0x1 /* PD4 gpio Chip Enable pin pull_up */
|
||||
3 5 0x0 0x1 /* PD5 gpio RDY/BUSY pin pull_up */
|
||||
3 6 0x1 0x0 /* PD6 periph A Data bit 0 */
|
||||
3 7 0x1 0x0 /* PD7 periph A Data bit 1 */
|
||||
3 8 0x1 0x0 /* PD8 periph A Data bit 2 */
|
||||
3 9 0x1 0x0 /* PD9 periph A Data bit 3 */
|
||||
3 10 0x1 0x0 /* PD10 periph A Data bit 4 */
|
||||
3 11 0x1 0x0 /* PD11 periph A Data bit 5 */
|
||||
3 12 0x1 0x0 /* PD12 periph A Data bit 6 */
|
||||
3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */
|
||||
};
|
||||
|
||||
pinctrl_nand_16bits: nand_16bits-0 {
|
||||
atmel,pins =
|
||||
<3 14 0x1 0x0 /* PD14 periph A Data bit 8 */
|
||||
3 15 0x1 0x0 /* PD15 periph A Data bit 9 */
|
||||
3 16 0x1 0x0 /* PD16 periph A Data bit 10 */
|
||||
3 17 0x1 0x0 /* PD17 periph A Data bit 11 */
|
||||
3 18 0x1 0x0 /* PD18 periph A Data bit 12 */
|
||||
3 19 0x1 0x0 /* PD19 periph A Data bit 13 */
|
||||
3 20 0x1 0x0 /* PD20 periph A Data bit 14 */
|
||||
3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -105,7 +105,7 @@
|
||||
compatible = "fixed-clock";
|
||||
reg = <1>;
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <150000000>;
|
||||
clock-frequency = <250000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -319,9 +319,8 @@
|
||||
};
|
||||
};
|
||||
|
||||
ab8500@5 {
|
||||
ab8500 {
|
||||
compatible = "stericsson,ab8500";
|
||||
reg = <5>; /* mailbox 5 is i2c */
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <0 40 0x4>;
|
||||
interrupt-controller;
|
||||
|
@ -197,6 +197,11 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
rtc@d8500 {
|
||||
compatible = "marvell,orion-rtc";
|
||||
reg = <0xd8500 0x20>;
|
||||
};
|
||||
|
||||
crypto: crypto@30000 {
|
||||
compatible = "marvell,orion-crypto";
|
||||
reg = <0x30000 0x10000>,
|
||||
|
@ -275,18 +275,27 @@
|
||||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0x12680000 0x1000>;
|
||||
interrupts = <0 35 0>;
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <8>;
|
||||
#dma-requests = <32>;
|
||||
};
|
||||
|
||||
pdma1: pdma@12690000 {
|
||||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0x12690000 0x1000>;
|
||||
interrupts = <0 36 0>;
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <8>;
|
||||
#dma-requests = <32>;
|
||||
};
|
||||
|
||||
mdma1: mdma@12850000 {
|
||||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0x12850000 0x1000>;
|
||||
interrupts = <0 34 0>;
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <8>;
|
||||
#dma-requests = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -142,12 +142,18 @@
|
||||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0x120000 0x1000>;
|
||||
interrupts = <0 34 0>;
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <8>;
|
||||
#dma-requests = <32>;
|
||||
};
|
||||
|
||||
pdma1: pdma@121B0000 {
|
||||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0x121000 0x1000>;
|
||||
interrupts = <0 35 0>;
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <8>;
|
||||
#dma-requests = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -221,7 +221,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
ab8500@5 {
|
||||
ab8500 {
|
||||
ab8500-regulators {
|
||||
ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
|
||||
regulator-name = "V-DISPLAY";
|
||||
|
@ -158,7 +158,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
ab8500@5 {
|
||||
ab8500 {
|
||||
ab8500-regulators {
|
||||
ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
|
||||
regulator-name = "V-DISPLAY";
|
||||
|
@ -42,10 +42,9 @@
|
||||
fsl,pins = <689 0x10000 /* DISP1_DRDY */
|
||||
482 0x10000 /* DISP1_HSYNC */
|
||||
489 0x10000 /* DISP1_VSYNC */
|
||||
684 0x10000 /* DISP1_DAT_0 */
|
||||
515 0x10000 /* DISP1_DAT_22 */
|
||||
523 0x10000 /* DISP1_DAT_23 */
|
||||
543 0x10000 /* DISP1_DAT_21 */
|
||||
545 0x10000 /* DISP1_DAT_21 */
|
||||
553 0x10000 /* DISP1_DAT_20 */
|
||||
558 0x10000 /* DISP1_DAT_19 */
|
||||
564 0x10000 /* DISP1_DAT_18 */
|
||||
|
@ -42,12 +42,10 @@
|
||||
|
||||
ocp@f1000000 {
|
||||
serial@12000 {
|
||||
clock-frequency = <166666667>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
serial@12100 {
|
||||
clock-frequency = <166666667>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
@ -50,7 +50,6 @@
|
||||
};
|
||||
};
|
||||
serial@12000 {
|
||||
clock-frequency = <200000000>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
@ -37,7 +37,6 @@
|
||||
};
|
||||
};
|
||||
serial@12000 {
|
||||
clock-frequency = <200000000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
|
@ -38,7 +38,6 @@
|
||||
};
|
||||
};
|
||||
serial@12000 {
|
||||
clock-frequency = <200000000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
|
@ -73,7 +73,6 @@
|
||||
};
|
||||
};
|
||||
serial@12000 {
|
||||
clock-frequency = <200000000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
|
@ -51,7 +51,6 @@
|
||||
};
|
||||
};
|
||||
serial@12000 {
|
||||
clock-frequency = <200000000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
@ -78,7 +78,6 @@
|
||||
};
|
||||
};
|
||||
serial@12000 {
|
||||
clock-frequency = <200000000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
|
@ -115,7 +115,6 @@
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
clock-frequency = <200000000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
|
@ -34,7 +34,6 @@
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
clock-frequency = <200000000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
|
@ -13,7 +13,6 @@
|
||||
|
||||
ocp@f1000000 {
|
||||
serial@12000 {
|
||||
clock-frequency = <166666667>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
@ -13,7 +13,6 @@
|
||||
|
||||
ocp@f1000000 {
|
||||
serial@12000 {
|
||||
clock-frequency = <200000000>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
@ -90,7 +90,6 @@
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
clock-frequency = <200000000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
|
@ -23,7 +23,6 @@
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
clock-frequency = <166666667>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
@ -117,7 +117,6 @@
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
clock-frequency = <200000000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
|
@ -18,12 +18,10 @@
|
||||
|
||||
ocp@f1000000 {
|
||||
serial@12000 {
|
||||
clock-frequency = <200000000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
serial@12100 {
|
||||
clock-frequency = <200000000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
|
@ -108,7 +108,6 @@
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
clock-frequency = <200000000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
|
@ -38,6 +38,7 @@
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <35>, <36>, <37>, <38>;
|
||||
clocks = <&gate_clk 7>;
|
||||
};
|
||||
|
||||
gpio1: gpio@10140 {
|
||||
@ -49,6 +50,7 @@
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <39>, <40>, <41>;
|
||||
clocks = <&gate_clk 7>;
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
@ -57,7 +59,6 @@
|
||||
reg-shift = <2>;
|
||||
interrupts = <33>;
|
||||
clocks = <&gate_clk 7>;
|
||||
/* set clock-frequency in board dts */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -67,7 +68,6 @@
|
||||
reg-shift = <2>;
|
||||
interrupts = <34>;
|
||||
clocks = <&gate_clk 7>;
|
||||
/* set clock-frequency in board dts */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -75,6 +75,7 @@
|
||||
compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
|
||||
reg = <0x10300 0x20>;
|
||||
interrupts = <53>;
|
||||
clocks = <&gate_clk 7>;
|
||||
};
|
||||
|
||||
spi@10600 {
|
||||
|
@ -11,7 +11,7 @@
|
||||
|
||||
/ {
|
||||
model = "LaCie Ethernet Disk mini V2";
|
||||
compatible = "lacie,ethernet-disk-mini-v2", "marvell-orion5x-88f5182", "marvell,orion5x";
|
||||
compatible = "lacie,ethernet-disk-mini-v2", "marvell,orion5x-88f5182", "marvell,orion5x";
|
||||
|
||||
memory {
|
||||
reg = <0x00000000 0x4000000>; /* 64 MB */
|
||||
|
@ -298,7 +298,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
ab8500@5 {
|
||||
ab8500 {
|
||||
ab8500-regulators {
|
||||
ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
|
||||
regulator-name = "V-DISPLAY";
|
||||
|
@ -75,6 +75,9 @@
|
||||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0xffe01000 0x1000>;
|
||||
interrupts = <0 180 4>;
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <8>;
|
||||
#dma-requests = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -118,6 +118,7 @@
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0x50040600 0x20>;
|
||||
interrupts = <1 13 0x304>;
|
||||
clocks = <&tegra_car 132>;
|
||||
};
|
||||
|
||||
intc: interrupt-controller {
|
||||
|
@ -119,6 +119,7 @@
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0x50040600 0x20>;
|
||||
interrupts = <1 13 0xf04>;
|
||||
clocks = <&tegra_car 214>;
|
||||
};
|
||||
|
||||
intc: interrupt-controller {
|
||||
|
@ -25,11 +25,13 @@
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
gpio: gpio-controller@d8110000 {
|
||||
compatible = "via,vt8500-gpio";
|
||||
gpio-controller;
|
||||
pinctrl: pinctrl@d8110000 {
|
||||
compatible = "via,vt8500-pinctrl";
|
||||
reg = <0xd8110000 0x10000>;
|
||||
#gpio-cells = <3>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
pmc@d8130000 {
|
||||
|
@ -40,11 +40,13 @@
|
||||
interrupts = <56 57 58 59 60 61 62 63>;
|
||||
};
|
||||
|
||||
gpio: gpio-controller@d8110000 {
|
||||
compatible = "wm,wm8505-gpio";
|
||||
gpio-controller;
|
||||
pinctrl: pinctrl@d8110000 {
|
||||
compatible = "wm,wm8505-pinctrl";
|
||||
reg = <0xd8110000 0x10000>;
|
||||
#gpio-cells = <3>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
pmc@d8130000 {
|
||||
|
@ -34,11 +34,13 @@
|
||||
interrupts = <56 57 58 59 60 61 62 63>;
|
||||
};
|
||||
|
||||
gpio: gpio-controller@d8110000 {
|
||||
compatible = "wm,wm8650-gpio";
|
||||
gpio-controller;
|
||||
pinctrl: pinctrl@d8110000 {
|
||||
compatible = "wm,wm8650-pinctrl";
|
||||
reg = <0xd8110000 0x10000>;
|
||||
#gpio-cells = <3>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
pmc@d8130000 {
|
||||
|
@ -41,11 +41,13 @@
|
||||
interrupts = <56 57 58 59 60 61 62 63>;
|
||||
};
|
||||
|
||||
gpio: gpio-controller@d8110000 {
|
||||
compatible = "wm,wm8650-gpio";
|
||||
gpio-controller;
|
||||
pinctrl: pinctrl@d8110000 {
|
||||
compatible = "wm,wm8850-pinctrl";
|
||||
reg = <0xd8110000 0x10000>;
|
||||
#gpio-cells = <3>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
pmc@d8130000 {
|
||||
|
@ -116,6 +116,7 @@ CONFIG_SND_SOC=y
|
||||
CONFIG_SND_MXS_SOC=y
|
||||
CONFIG_SND_SOC_MXS_SGTL5000=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_CHIPIDEA=y
|
||||
CONFIG_USB_CHIPIDEA_HOST=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
|
@ -126,6 +126,8 @@ CONFIG_INPUT_MISC=y
|
||||
CONFIG_INPUT_TWL4030_PWRBUTTON=y
|
||||
CONFIG_VT_HW_CONSOLE_BINDING=y
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=32
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_MANY_PORTS=y
|
||||
|
@ -2,6 +2,7 @@
|
||||
#define _ASM_ARM_XEN_EVENTS_H
|
||||
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/atomic.h>
|
||||
|
||||
enum ipi_vector {
|
||||
XEN_PLACEHOLDER_VECTOR,
|
||||
@ -15,26 +16,8 @@ static inline int xen_irqs_disabled(struct pt_regs *regs)
|
||||
return raw_irqs_disabled_flags(regs->ARM_cpsr);
|
||||
}
|
||||
|
||||
/*
|
||||
* We cannot use xchg because it does not support 8-byte
|
||||
* values. However it is safe to use {ldr,dtd}exd directly because all
|
||||
* platforms which Xen can run on support those instructions.
|
||||
*/
|
||||
static inline xen_ulong_t xchg_xen_ulong(xen_ulong_t *ptr, xen_ulong_t val)
|
||||
{
|
||||
xen_ulong_t oldval;
|
||||
unsigned int tmp;
|
||||
|
||||
wmb();
|
||||
asm volatile("@ xchg_xen_ulong\n"
|
||||
"1: ldrexd %0, %H0, [%3]\n"
|
||||
" strexd %1, %2, %H2, [%3]\n"
|
||||
" teq %1, #0\n"
|
||||
" bne 1b"
|
||||
: "=&r" (oldval), "=&r" (tmp)
|
||||
: "r" (val), "r" (ptr)
|
||||
: "memory", "cc");
|
||||
return oldval;
|
||||
}
|
||||
#define xchg_xen_ulong(ptr, val) atomic64_xchg(container_of((ptr), \
|
||||
atomic64_t, \
|
||||
counter), (val))
|
||||
|
||||
#endif /* _ASM_ARM_XEN_EVENTS_H */
|
||||
|
@ -480,7 +480,7 @@ static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt)
|
||||
evt->features = CLOCK_EVT_FEAT_ONESHOT |
|
||||
CLOCK_EVT_FEAT_PERIODIC |
|
||||
CLOCK_EVT_FEAT_DUMMY;
|
||||
evt->rating = 400;
|
||||
evt->rating = 100;
|
||||
evt->mult = 1;
|
||||
evt->set_mode = broadcast_timer_set_mode;
|
||||
|
||||
|
@ -14,31 +14,15 @@
|
||||
|
||||
.text
|
||||
.align 5
|
||||
.word 0
|
||||
|
||||
1: subs r2, r2, #4 @ 1 do we have enough
|
||||
blt 5f @ 1 bytes to align with?
|
||||
cmp r3, #2 @ 1
|
||||
strltb r1, [ip], #1 @ 1
|
||||
strleb r1, [ip], #1 @ 1
|
||||
strb r1, [ip], #1 @ 1
|
||||
add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
|
||||
/*
|
||||
* The pointer is now aligned and the length is adjusted. Try doing the
|
||||
* memset again.
|
||||
*/
|
||||
|
||||
ENTRY(memset)
|
||||
/*
|
||||
* Preserve the contents of r0 for the return value.
|
||||
*/
|
||||
mov ip, r0
|
||||
ands r3, ip, #3 @ 1 unaligned?
|
||||
bne 1b @ 1
|
||||
ands r3, r0, #3 @ 1 unaligned?
|
||||
mov ip, r0 @ preserve r0 as return value
|
||||
bne 6f @ 1
|
||||
/*
|
||||
* we know that the pointer in ip is aligned to a word boundary.
|
||||
*/
|
||||
orr r1, r1, r1, lsl #8
|
||||
1: orr r1, r1, r1, lsl #8
|
||||
orr r1, r1, r1, lsl #16
|
||||
mov r3, r1
|
||||
cmp r2, #16
|
||||
@ -127,4 +111,13 @@ ENTRY(memset)
|
||||
tst r2, #1
|
||||
strneb r1, [ip], #1
|
||||
mov pc, lr
|
||||
|
||||
6: subs r2, r2, #4 @ 1 do we have enough
|
||||
blt 5b @ 1 bytes to align with?
|
||||
cmp r3, #2 @ 1
|
||||
strltb r1, [ip], #1 @ 1
|
||||
strleb r1, [ip], #1 @ 1
|
||||
strb r1, [ip], #1 @ 1
|
||||
add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
|
||||
b 1b
|
||||
ENDPROC(memset)
|
||||
|
@ -176,6 +176,7 @@ static struct w1_gpio_platform_data w1_gpio_pdata = {
|
||||
/* If you choose to use a pin other than PB16 it needs to be 3.3V */
|
||||
.pin = AT91_PIN_PB16,
|
||||
.is_open_drain = 1,
|
||||
.ext_pullup_enable_pin = -EINVAL,
|
||||
};
|
||||
|
||||
static struct platform_device w1_device = {
|
||||
|
@ -188,6 +188,7 @@ static struct spi_board_info portuxg20_spi_devices[] = {
|
||||
static struct w1_gpio_platform_data w1_gpio_pdata = {
|
||||
.pin = AT91_PIN_PA29,
|
||||
.is_open_drain = 1,
|
||||
.ext_pullup_enable_pin = -EINVAL,
|
||||
};
|
||||
|
||||
static struct platform_device w1_device = {
|
||||
|
@ -209,6 +209,14 @@ extern int at91_get_gpio_value(unsigned pin);
|
||||
extern void at91_gpio_suspend(void);
|
||||
extern void at91_gpio_resume(void);
|
||||
|
||||
#ifdef CONFIG_PINCTRL_AT91
|
||||
extern void at91_pinctrl_gpio_suspend(void);
|
||||
extern void at91_pinctrl_gpio_resume(void);
|
||||
#else
|
||||
static inline void at91_pinctrl_gpio_suspend(void) {}
|
||||
static inline void at91_pinctrl_gpio_resume(void) {}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif
|
||||
|
@ -92,23 +92,21 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value)
|
||||
|
||||
void at91_irq_suspend(void)
|
||||
{
|
||||
int i = 0, bit;
|
||||
int bit = -1;
|
||||
|
||||
if (has_aic5()) {
|
||||
/* disable enabled irqs */
|
||||
while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) {
|
||||
while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
|
||||
at91_aic_write(AT91_AIC5_SSR,
|
||||
bit & AT91_AIC5_INTSEL_MSK);
|
||||
at91_aic_write(AT91_AIC5_IDCR, 1);
|
||||
i = bit;
|
||||
}
|
||||
/* enable wakeup irqs */
|
||||
i = 0;
|
||||
while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) {
|
||||
bit = -1;
|
||||
while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
|
||||
at91_aic_write(AT91_AIC5_SSR,
|
||||
bit & AT91_AIC5_INTSEL_MSK);
|
||||
at91_aic_write(AT91_AIC5_IECR, 1);
|
||||
i = bit;
|
||||
}
|
||||
} else {
|
||||
at91_aic_write(AT91_AIC_IDCR, *backups);
|
||||
@ -118,23 +116,21 @@ void at91_irq_suspend(void)
|
||||
|
||||
void at91_irq_resume(void)
|
||||
{
|
||||
int i = 0, bit;
|
||||
int bit = -1;
|
||||
|
||||
if (has_aic5()) {
|
||||
/* disable wakeup irqs */
|
||||
while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) {
|
||||
while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
|
||||
at91_aic_write(AT91_AIC5_SSR,
|
||||
bit & AT91_AIC5_INTSEL_MSK);
|
||||
at91_aic_write(AT91_AIC5_IDCR, 1);
|
||||
i = bit;
|
||||
}
|
||||
/* enable irqs disabled for suspend */
|
||||
i = 0;
|
||||
while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) {
|
||||
bit = -1;
|
||||
while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
|
||||
at91_aic_write(AT91_AIC5_SSR,
|
||||
bit & AT91_AIC5_INTSEL_MSK);
|
||||
at91_aic_write(AT91_AIC5_IECR, 1);
|
||||
i = bit;
|
||||
}
|
||||
} else {
|
||||
at91_aic_write(AT91_AIC_IDCR, *wakeups);
|
||||
|
@ -201,7 +201,10 @@ extern u32 at91_slow_clock_sz;
|
||||
|
||||
static int at91_pm_enter(suspend_state_t state)
|
||||
{
|
||||
at91_gpio_suspend();
|
||||
if (of_have_populated_dt())
|
||||
at91_pinctrl_gpio_suspend();
|
||||
else
|
||||
at91_gpio_suspend();
|
||||
at91_irq_suspend();
|
||||
|
||||
pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
|
||||
@ -286,7 +289,10 @@ static int at91_pm_enter(suspend_state_t state)
|
||||
error:
|
||||
target_state = PM_SUSPEND_ON;
|
||||
at91_irq_resume();
|
||||
at91_gpio_resume();
|
||||
if (of_have_populated_dt())
|
||||
at91_pinctrl_gpio_resume();
|
||||
else
|
||||
at91_gpio_resume();
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -743,6 +743,9 @@ EXPORT_SYMBOL(edma_free_channel);
|
||||
*/
|
||||
int edma_alloc_slot(unsigned ctlr, int slot)
|
||||
{
|
||||
if (!edma_cc[ctlr])
|
||||
return -EINVAL;
|
||||
|
||||
if (slot >= 0)
|
||||
slot = EDMA_CHAN_SLOT(slot);
|
||||
|
||||
|
@ -67,6 +67,7 @@ config ARCH_NETWINDER
|
||||
select ISA
|
||||
select ISA_DMA
|
||||
select PCI
|
||||
select VIRT_TO_BUS
|
||||
help
|
||||
Say Y here if you intend to run this kernel on the Rebel.COM
|
||||
NetWinder. Information about this machine can be found at:
|
||||
|
@ -264,6 +264,7 @@ int __init mx35_clocks_init(void)
|
||||
clk_prepare_enable(clk[gpio3_gate]);
|
||||
clk_prepare_enable(clk[iim_gate]);
|
||||
clk_prepare_enable(clk[emi_gate]);
|
||||
clk_prepare_enable(clk[max_gate]);
|
||||
|
||||
/*
|
||||
* SCC is needed to boot via mmc after a watchdog reset. The clock code
|
||||
|
@ -172,7 +172,7 @@ static struct clk *clk[clk_max];
|
||||
static struct clk_onecell_data clk_data;
|
||||
|
||||
static enum mx6q_clks const clks_init_on[] __initconst = {
|
||||
mmdc_ch0_axi, rom,
|
||||
mmdc_ch0_axi, rom, pll1_sys,
|
||||
};
|
||||
|
||||
static struct clk_div_table clk_enet_ref_table[] = {
|
||||
|
@ -26,16 +26,16 @@ ENDPROC(v7_secondary_startup)
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
/*
|
||||
* The following code is located into the .data section. This is to
|
||||
* allow phys_l2x0_saved_regs to be accessed with a relative load
|
||||
* as we are running on physical address here.
|
||||
* The following code must assume it is running from physical address
|
||||
* where absolute virtual addresses to the data section have to be
|
||||
* turned into relative ones.
|
||||
*/
|
||||
.data
|
||||
.align
|
||||
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
.macro pl310_resume
|
||||
ldr r2, phys_l2x0_saved_regs
|
||||
adr r0, l2x0_saved_regs_offset
|
||||
ldr r2, [r0]
|
||||
add r2, r2, r0
|
||||
ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0
|
||||
ldr r1, [r2, #L2X0_R_AUX_CTRL] @ get aux_ctrl value
|
||||
str r1, [r0, #L2X0_AUX_CTRL] @ restore aux_ctrl
|
||||
@ -43,9 +43,9 @@ ENDPROC(v7_secondary_startup)
|
||||
str r1, [r0, #L2X0_CTRL] @ re-enable L2
|
||||
.endm
|
||||
|
||||
.globl phys_l2x0_saved_regs
|
||||
phys_l2x0_saved_regs:
|
||||
.long 0
|
||||
l2x0_saved_regs_offset:
|
||||
.word l2x0_saved_regs - .
|
||||
|
||||
#else
|
||||
.macro pl310_resume
|
||||
.endm
|
||||
|
@ -27,6 +27,11 @@ static const char * const imx25_dt_board_compat[] __initconst = {
|
||||
NULL
|
||||
};
|
||||
|
||||
static void __init imx25_timer_init(void)
|
||||
{
|
||||
mx25_clocks_init_dt();
|
||||
}
|
||||
|
||||
DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
|
||||
.map_io = mx25_map_io,
|
||||
.init_early = imx25_init_early,
|
||||
|
@ -22,8 +22,6 @@
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
|
||||
extern unsigned long phys_l2x0_saved_regs;
|
||||
|
||||
static int imx6q_suspend_finish(unsigned long val)
|
||||
{
|
||||
cpu_do_idle();
|
||||
@ -57,18 +55,5 @@ static const struct platform_suspend_ops imx6q_pm_ops = {
|
||||
|
||||
void __init imx6q_pm_init(void)
|
||||
{
|
||||
/*
|
||||
* The l2x0 core code provides an infrastucture to save and restore
|
||||
* l2x0 registers across suspend/resume cycle. But because imx6q
|
||||
* retains L2 content during suspend and needs to resume L2 before
|
||||
* MMU is enabled, it can only utilize register saving support and
|
||||
* have to take care of restoring on its own. So we save physical
|
||||
* address of the data structure used by l2x0 core to save registers,
|
||||
* and later restore the necessary ones in imx6q resume entry.
|
||||
*/
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
phys_l2x0_saved_regs = __pa(&l2x0_saved_regs);
|
||||
#endif
|
||||
|
||||
suspend_set_ops(&imx6q_pm_ops);
|
||||
}
|
||||
|
@ -163,6 +163,7 @@ static struct platform_device vulcan_max6369 = {
|
||||
|
||||
static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = {
|
||||
.pin = 14,
|
||||
.ext_pullup_enable_pin = -EINVAL,
|
||||
};
|
||||
|
||||
static struct platform_device vulcan_w1_gpio = {
|
||||
|
@ -41,16 +41,12 @@ static void __init kirkwood_legacy_clk_init(void)
|
||||
|
||||
struct device_node *np = of_find_compatible_node(
|
||||
NULL, NULL, "marvell,kirkwood-gating-clock");
|
||||
|
||||
struct of_phandle_args clkspec;
|
||||
struct clk *clk;
|
||||
|
||||
clkspec.np = np;
|
||||
clkspec.args_count = 1;
|
||||
|
||||
clkspec.args[0] = CGC_BIT_GE0;
|
||||
orion_clkdev_add(NULL, "mv643xx_eth_port.0",
|
||||
of_clk_get_from_provider(&clkspec));
|
||||
|
||||
clkspec.args[0] = CGC_BIT_PEX0;
|
||||
orion_clkdev_add("0", "pcie",
|
||||
of_clk_get_from_provider(&clkspec));
|
||||
@ -59,9 +55,24 @@ static void __init kirkwood_legacy_clk_init(void)
|
||||
orion_clkdev_add("1", "pcie",
|
||||
of_clk_get_from_provider(&clkspec));
|
||||
|
||||
clkspec.args[0] = CGC_BIT_GE1;
|
||||
orion_clkdev_add(NULL, "mv643xx_eth_port.1",
|
||||
clkspec.args[0] = CGC_BIT_SDIO;
|
||||
orion_clkdev_add(NULL, "mvsdio",
|
||||
of_clk_get_from_provider(&clkspec));
|
||||
|
||||
/*
|
||||
* The ethernet interfaces forget the MAC address assigned by
|
||||
* u-boot if the clocks are turned off. Until proper DT support
|
||||
* is available we always enable them for now.
|
||||
*/
|
||||
clkspec.args[0] = CGC_BIT_GE0;
|
||||
clk = of_clk_get_from_provider(&clkspec);
|
||||
orion_clkdev_add(NULL, "mv643xx_eth_port.0", clk);
|
||||
clk_prepare_enable(clk);
|
||||
|
||||
clkspec.args[0] = CGC_BIT_GE1;
|
||||
clk = of_clk_get_from_provider(&clkspec);
|
||||
orion_clkdev_add(NULL, "mv643xx_eth_port.1", clk);
|
||||
clk_prepare_enable(clk);
|
||||
}
|
||||
|
||||
static void __init kirkwood_of_clk_init(void)
|
||||
|
@ -9,6 +9,7 @@
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
|
@ -100,7 +100,7 @@ static struct irq_domain_ops icoll_irq_domain_ops = {
|
||||
.xlate = irq_domain_xlate_onecell,
|
||||
};
|
||||
|
||||
void __init icoll_of_init(struct device_node *np,
|
||||
static void __init icoll_of_init(struct device_node *np,
|
||||
struct device_node *interrupt_parent)
|
||||
{
|
||||
/*
|
||||
|
@ -402,17 +402,17 @@ static void __init cfa10049_init(void)
|
||||
{
|
||||
enable_clk_enet_out();
|
||||
update_fec_mac_prop(OUI_CRYSTALFONTZ);
|
||||
|
||||
mxsfb_pdata.mode_list = cfa10049_video_modes;
|
||||
mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
|
||||
mxsfb_pdata.default_bpp = 32;
|
||||
mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
|
||||
}
|
||||
|
||||
static void __init cfa10037_init(void)
|
||||
{
|
||||
enable_clk_enet_out();
|
||||
update_fec_mac_prop(OUI_CRYSTALFONTZ);
|
||||
|
||||
mxsfb_pdata.mode_list = cfa10049_video_modes;
|
||||
mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
|
||||
mxsfb_pdata.default_bpp = 32;
|
||||
mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
|
||||
}
|
||||
|
||||
static void __init apf28_init(void)
|
||||
|
@ -18,6 +18,7 @@
|
||||
|
||||
#include <mach/mx23.h>
|
||||
#include <mach/mx28.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
/*
|
||||
* Define the MX23 memory map.
|
||||
|
@ -19,6 +19,7 @@
|
||||
#include <asm/processor.h> /* for cpu_relax() */
|
||||
|
||||
#include <mach/mxs.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#define OCOTP_WORD_OFFSET 0x20
|
||||
#define OCOTP_WORD_COUNT 0x20
|
||||
|
@ -31,6 +31,8 @@
|
||||
|
||||
#include <plat/i2c.h>
|
||||
|
||||
#include <mach/irqs.h>
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
|
||||
void omap7xx_map_io(void);
|
||||
#else
|
||||
|
@ -311,9 +311,6 @@ config MACH_OMAP_ZOOM2
|
||||
default y
|
||||
select OMAP_PACKAGE_CBB
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
select SERIAL_8250
|
||||
select SERIAL_8250_CONSOLE
|
||||
select SERIAL_CORE_CONSOLE
|
||||
|
||||
config MACH_OMAP_ZOOM3
|
||||
bool "OMAP3630 Zoom3 board"
|
||||
@ -321,9 +318,6 @@ config MACH_OMAP_ZOOM3
|
||||
default y
|
||||
select OMAP_PACKAGE_CBP
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
select SERIAL_8250
|
||||
select SERIAL_8250_CONSOLE
|
||||
select SERIAL_CORE_CONSOLE
|
||||
|
||||
config MACH_CM_T35
|
||||
bool "CompuLab CM-T35/CM-T3730 modules"
|
||||
|
@ -102,6 +102,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
|
||||
.init_irq = omap_intc_of_init,
|
||||
.handle_irq = omap3_intc_handle_irq,
|
||||
.init_machine = omap_generic_init,
|
||||
.init_late = omap3_init_late,
|
||||
.init_time = omap3_sync32k_timer_init,
|
||||
.dt_compat = omap3_boards_compat,
|
||||
.restart = omap3xxx_restart,
|
||||
@ -119,6 +120,7 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
|
||||
.init_irq = omap_intc_of_init,
|
||||
.handle_irq = omap3_intc_handle_irq,
|
||||
.init_machine = omap_generic_init,
|
||||
.init_late = omap3_init_late,
|
||||
.init_time = omap3_secure_sync32k_timer_init,
|
||||
.dt_compat = omap3_gp_boards_compat,
|
||||
.restart = omap3xxx_restart,
|
||||
|
@ -17,6 +17,7 @@
|
||||
#include <linux/io.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/usb/phy.h>
|
||||
#include <linux/usb/musb.h>
|
||||
#include <linux/platform_data/spi-omap2-mcspi.h>
|
||||
|
||||
@ -98,6 +99,7 @@ static void __init rx51_init(void)
|
||||
sdrc_params = nokia_get_sdram_timings();
|
||||
omap_sdrc_init(sdrc_params, sdrc_params);
|
||||
|
||||
usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
|
||||
usb_musb_init(&musb_board_data);
|
||||
rx51_peripherals_init();
|
||||
|
||||
|
@ -108,7 +108,6 @@ void omap35xx_init_late(void);
|
||||
void omap3630_init_late(void);
|
||||
void am35xx_init_late(void);
|
||||
void ti81xx_init_late(void);
|
||||
void omap4430_init_late(void);
|
||||
int omap2_common_pm_late_init(void);
|
||||
|
||||
#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
|
||||
|
@ -1122,9 +1122,6 @@ int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
|
||||
/* TODO: remove, see function definition */
|
||||
gpmc_convert_ps_to_ns(gpmc_t);
|
||||
|
||||
/* Now the GPMC is initialised, unreserve the chip-selects */
|
||||
gpmc_cs_map = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1383,6 +1380,9 @@ static int gpmc_probe(struct platform_device *pdev)
|
||||
if (IS_ERR_VALUE(gpmc_setup_irq()))
|
||||
dev_warn(gpmc_dev, "gpmc_setup_irq failed\n");
|
||||
|
||||
/* Now the GPMC is initialised, unreserve the chip-selects */
|
||||
gpmc_cs_map = 0;
|
||||
|
||||
rc = gpmc_probe_dt(pdev);
|
||||
if (rc < 0) {
|
||||
clk_disable_unprepare(gpmc_l3_clk);
|
||||
|
@ -211,8 +211,6 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
pr_err("%s: Could not find signal %s\n", __func__, muxname);
|
||||
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
@ -234,6 +232,8 @@ int __init omap_mux_get_by_name(const char *muxname,
|
||||
return mux_mode;
|
||||
}
|
||||
|
||||
pr_err("%s: Could not find signal %s\n", __func__, muxname);
|
||||
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
@ -739,8 +739,9 @@ static void __init omap_mux_dbg_create_entry(
|
||||
list_for_each_entry(e, &partition->muxmodes, node) {
|
||||
struct omap_mux *m = &e->mux;
|
||||
|
||||
(void)debugfs_create_file(m->muxnames[0], S_IWUSR, mux_dbg_dir,
|
||||
m, &omap_mux_dbg_signal_fops);
|
||||
(void)debugfs_create_file(m->muxnames[0], S_IWUSR | S_IRUGO,
|
||||
mux_dbg_dir, m,
|
||||
&omap_mux_dbg_signal_fops);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -505,6 +505,7 @@ static struct w1_gpio_platform_data w1_gpio_platform_data = {
|
||||
.pin = GPIO_ONE_WIRE,
|
||||
.is_open_drain = 0,
|
||||
.enable_external_pullup = w1_enable_external_pullup,
|
||||
.ext_pullup_enable_pin = -EINVAL,
|
||||
};
|
||||
|
||||
struct platform_device raumfeld_w1_gpio_device = {
|
||||
|
@ -214,11 +214,6 @@ static struct clk clk_pcmcdclk2 = {
|
||||
.name = "pcmcdclk",
|
||||
};
|
||||
|
||||
static struct clk dummy_apb_pclk = {
|
||||
.name = "apb_pclk",
|
||||
.id = -1,
|
||||
};
|
||||
|
||||
static struct clk *clkset_vpllsrc_list[] = {
|
||||
[0] = &clk_fin_vpll,
|
||||
[1] = &clk_sclk_hdmi27m,
|
||||
@ -305,18 +300,6 @@ static struct clk_ops clk_fout_apll_ops = {
|
||||
|
||||
static struct clk init_clocks_off[] = {
|
||||
{
|
||||
.name = "dma",
|
||||
.devname = "dma-pl330.0",
|
||||
.parent = &clk_hclk_psys.clk,
|
||||
.enable = s5pv210_clk_ip0_ctrl,
|
||||
.ctrlbit = (1 << 3),
|
||||
}, {
|
||||
.name = "dma",
|
||||
.devname = "dma-pl330.1",
|
||||
.parent = &clk_hclk_psys.clk,
|
||||
.enable = s5pv210_clk_ip0_ctrl,
|
||||
.ctrlbit = (1 << 4),
|
||||
}, {
|
||||
.name = "rot",
|
||||
.parent = &clk_hclk_dsys.clk,
|
||||
.enable = s5pv210_clk_ip0_ctrl,
|
||||
@ -573,6 +556,20 @@ static struct clk clk_hsmmc3 = {
|
||||
.ctrlbit = (1<<19),
|
||||
};
|
||||
|
||||
static struct clk clk_pdma0 = {
|
||||
.name = "pdma0",
|
||||
.parent = &clk_hclk_psys.clk,
|
||||
.enable = s5pv210_clk_ip0_ctrl,
|
||||
.ctrlbit = (1 << 3),
|
||||
};
|
||||
|
||||
static struct clk clk_pdma1 = {
|
||||
.name = "pdma1",
|
||||
.parent = &clk_hclk_psys.clk,
|
||||
.enable = s5pv210_clk_ip0_ctrl,
|
||||
.ctrlbit = (1 << 4),
|
||||
};
|
||||
|
||||
static struct clk *clkset_uart_list[] = {
|
||||
[6] = &clk_mout_mpll.clk,
|
||||
[7] = &clk_mout_epll.clk,
|
||||
@ -1075,6 +1072,8 @@ static struct clk *clk_cdev[] = {
|
||||
&clk_hsmmc1,
|
||||
&clk_hsmmc2,
|
||||
&clk_hsmmc3,
|
||||
&clk_pdma0,
|
||||
&clk_pdma1,
|
||||
};
|
||||
|
||||
/* Clock initialisation code */
|
||||
@ -1333,6 +1332,8 @@ static struct clk_lookup s5pv210_clk_lookup[] = {
|
||||
CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
|
||||
CLKDEV_INIT("s5pv210-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
|
||||
CLKDEV_INIT("s5pv210-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
|
||||
CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
|
||||
CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
|
||||
};
|
||||
|
||||
void __init s5pv210_register_clocks(void)
|
||||
@ -1361,6 +1362,5 @@ void __init s5pv210_register_clocks(void)
|
||||
for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
|
||||
s3c_disable_clocks(clk_cdev[ptr], 1);
|
||||
|
||||
s3c24xx_register_clock(&dummy_apb_pclk);
|
||||
s3c_pwmclk_init();
|
||||
}
|
||||
|
@ -845,7 +845,7 @@ static struct fimc_source_info goni_camera_sensors[] = {
|
||||
.mux_id = 0,
|
||||
.flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
|
||||
V4L2_MBUS_VSYNC_ACTIVE_LOW,
|
||||
.bus_type = FIMC_BUS_TYPE_ITU_601,
|
||||
.fimc_bus_type = FIMC_BUS_TYPE_ITU_601,
|
||||
.board_info = &noon010pc30_board_info,
|
||||
.i2c_bus_num = 0,
|
||||
.clk_frequency = 16000000UL,
|
||||
|
@ -32,6 +32,7 @@
|
||||
#include <linux/smsc911x.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/sh_hspi.h>
|
||||
#include <linux/mmc/host.h>
|
||||
#include <linux/mmc/sh_mobile_sdhi.h>
|
||||
#include <linux/mfd/tmio.h>
|
||||
#include <linux/usb/otg.h>
|
||||
|
@ -14,7 +14,7 @@
|
||||
#define pr_fmt(fmt) "SPEAr3xx: " fmt
|
||||
|
||||
#include <linux/amba/pl022.h>
|
||||
#include <linux/amba/pl08x.h>
|
||||
#include <linux/amba/pl080.h>
|
||||
#include <linux/io.h>
|
||||
#include <plat/pl080.h>
|
||||
#include <mach/generic.h>
|
||||
|
@ -7,6 +7,7 @@ config ARCH_VT8500
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_CLK
|
||||
select VT8500_TIMER
|
||||
select PINCTRL
|
||||
help
|
||||
Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
|
||||
|
||||
|
@ -342,6 +342,7 @@ static int __init atomic_pool_init(void)
|
||||
{
|
||||
struct dma_pool *pool = &atomic_pool;
|
||||
pgprot_t prot = pgprot_dmacoherent(pgprot_kernel);
|
||||
gfp_t gfp = GFP_KERNEL | GFP_DMA;
|
||||
unsigned long nr_pages = pool->size >> PAGE_SHIFT;
|
||||
unsigned long *bitmap;
|
||||
struct page *page;
|
||||
@ -361,8 +362,8 @@ static int __init atomic_pool_init(void)
|
||||
ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page,
|
||||
atomic_pool_init);
|
||||
else
|
||||
ptr = __alloc_remap_buffer(NULL, pool->size, GFP_KERNEL, prot,
|
||||
&page, atomic_pool_init);
|
||||
ptr = __alloc_remap_buffer(NULL, pool->size, gfp, prot, &page,
|
||||
atomic_pool_init);
|
||||
if (ptr) {
|
||||
int i;
|
||||
|
||||
|
@ -576,7 +576,7 @@ load_ind:
|
||||
/* x = ((*(frame + k)) & 0xf) << 2; */
|
||||
ctx->seen |= SEEN_X | SEEN_DATA | SEEN_CALL;
|
||||
/* the interpreter should deal with the negative K */
|
||||
if (k < 0)
|
||||
if ((int)k < 0)
|
||||
return -1;
|
||||
/* offset in r1: we might have to take the slow path */
|
||||
emit_mov_i(r_off, k, ctx);
|
||||
|
@ -157,9 +157,12 @@ void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
|
||||
u32 size = readl(ddr_window_cpu_base + DDR_SIZE_CS_OFF(i));
|
||||
|
||||
/*
|
||||
* Chip select enabled?
|
||||
* We only take care of entries for which the chip
|
||||
* select is enabled, and that don't have high base
|
||||
* address bits set (devices can only access the first
|
||||
* 32 bits of the memory).
|
||||
*/
|
||||
if (size & 1) {
|
||||
if ((size & 1) && !(base & 0xF)) {
|
||||
struct mbus_dram_window *w;
|
||||
|
||||
w = &orion_mbus_dram_info.cs[cs++];
|
||||
|
@ -10,7 +10,7 @@ choice
|
||||
|
||||
config ARCH_SPEAR13XX
|
||||
bool "ST SPEAr13xx with Device Tree"
|
||||
select ARCH_HAVE_CPUFREQ
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARM_GIC
|
||||
select CPU_V7
|
||||
select GPIO_SPEAR_SPICS
|
||||
|
@ -9,7 +9,6 @@ config ARM64
|
||||
select CLONE_BACKWARDS
|
||||
select COMMON_CLK
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select GENERIC_HARDIRQS_NO_DEPRECATED
|
||||
select GENERIC_IOMAP
|
||||
select GENERIC_IRQ_PROBE
|
||||
select GENERIC_IRQ_SHOW
|
||||
|
@ -6,17 +6,6 @@ config FRAME_POINTER
|
||||
bool
|
||||
default y
|
||||
|
||||
config DEBUG_ERRORS
|
||||
bool "Verbose kernel error messages"
|
||||
depends on DEBUG_KERNEL
|
||||
help
|
||||
This option controls verbose debugging information which can be
|
||||
printed when the kernel detects an internal error. This debugging
|
||||
information is useful to kernel hackers when tracking down problems,
|
||||
but mostly meaningless to other people. It's safe to say Y unless
|
||||
you are concerned with the code size or don't want to see these
|
||||
messages.
|
||||
|
||||
config DEBUG_STACK_USAGE
|
||||
bool "Enable stack utilization instrumentation"
|
||||
depends on DEBUG_KERNEL
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user