Merge branch 'topic/sebastian-devinit-fixups' into next

* topic/sebastian-devinit-fixups:
  scripts/modpost: check for bad references in .pci.fixups area
  sh/PCI: move fixup hooks from __init to __devinit
  powerpc/PCI: move fixup hooks from __init to __devinit
  frv/PCI: move fixup hooks from __init to __devinit
  arm/PCI: move fixup hooks from __init to __devinit
  alpha/PCI: move fixup hooks from __init to __devinit
  PCI: move fixup hooks from __init to __devinit
  x86/PCI: move fixup hooks from __init to __devinit
This commit is contained in:
Bjorn Helgaas 2012-06-18 12:14:10 -06:00
commit e822a00704
13 changed files with 34 additions and 26 deletions

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@ -59,15 +59,13 @@ struct pci_controller *pci_isa_hose;
* Quirks. * Quirks.
*/ */
static void __init static void __devinit quirk_isa_bridge(struct pci_dev *dev)
quirk_isa_bridge(struct pci_dev *dev)
{ {
dev->class = PCI_CLASS_BRIDGE_ISA << 8; dev->class = PCI_CLASS_BRIDGE_ISA << 8;
} }
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82378, quirk_isa_bridge); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82378, quirk_isa_bridge);
static void __init static void __devinit quirk_cypress(struct pci_dev *dev)
quirk_cypress(struct pci_dev *dev)
{ {
/* The Notorious Cy82C693 chip. */ /* The Notorious Cy82C693 chip. */
@ -106,8 +104,7 @@ quirk_cypress(struct pci_dev *dev)
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, quirk_cypress); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, quirk_cypress);
/* Called for each device after PCI setup is done. */ /* Called for each device after PCI setup is done. */
static void __init static void __devinit pcibios_fixup_final(struct pci_dev *dev)
pcibios_fixup_final(struct pci_dev *dev)
{ {
unsigned int class = dev->class >> 8; unsigned int class = dev->class >> 8;

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@ -253,7 +253,7 @@ static void __devinit pci_fixup_cy82c693(struct pci_dev *dev)
} }
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693);
static void __init pci_fixup_it8152(struct pci_dev *dev) static void __devinit pci_fixup_it8152(struct pci_dev *dev)
{ {
int i; int i;
/* fixup for ITE 8152 devices */ /* fixup for ITE 8152 devices */

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@ -268,7 +268,7 @@ static void __init pci_fixup_umc_ide(struct pci_dev *d)
d->resource[i].flags |= PCI_BASE_ADDRESS_SPACE_IO; d->resource[i].flags |= PCI_BASE_ADDRESS_SPACE_IO;
} }
static void __init pci_fixup_ide_bases(struct pci_dev *d) static void __devinit pci_fixup_ide_bases(struct pci_dev *d)
{ {
int i; int i;
@ -287,7 +287,7 @@ static void __init pci_fixup_ide_bases(struct pci_dev *d)
} }
} }
static void __init pci_fixup_ide_trash(struct pci_dev *d) static void __devinit pci_fixup_ide_trash(struct pci_dev *d)
{ {
int i; int i;

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@ -102,7 +102,7 @@ static void tqm85xx_show_cpuinfo(struct seq_file *m)
seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
} }
static void __init tqm85xx_ti1520_fixup(struct pci_dev *pdev) static void __devinit tqm85xx_ti1520_fixup(struct pci_dev *pdev)
{ {
unsigned int val; unsigned int val;

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@ -164,7 +164,7 @@ static void gef_ppc9a_show_cpuinfo(struct seq_file *m)
gef_ppc9a_get_vme_is_syscon() ? "yes" : "no"); gef_ppc9a_get_vme_is_syscon() ? "yes" : "no");
} }
static void __init gef_ppc9a_nec_fixup(struct pci_dev *pdev) static void __devinit gef_ppc9a_nec_fixup(struct pci_dev *pdev)
{ {
unsigned int val; unsigned int val;

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@ -152,7 +152,7 @@ static void gef_sbc310_show_cpuinfo(struct seq_file *m)
} }
static void __init gef_sbc310_nec_fixup(struct pci_dev *pdev) static void __devinit gef_sbc310_nec_fixup(struct pci_dev *pdev)
{ {
unsigned int val; unsigned int val;

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@ -141,7 +141,7 @@ static void gef_sbc610_show_cpuinfo(struct seq_file *m)
seq_printf(m, "SVR\t\t: 0x%x\n", svid); seq_printf(m, "SVR\t\t: 0x%x\n", svid);
} }
static void __init gef_sbc610_nec_fixup(struct pci_dev *pdev) static void __devinit gef_sbc610_nec_fixup(struct pci_dev *pdev)
{ {
unsigned int val; unsigned int val;

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@ -36,7 +36,7 @@
static int fsl_pcie_bus_fixup, is_mpc83xx_pci; static int fsl_pcie_bus_fixup, is_mpc83xx_pci;
static void __init quirk_fsl_pcie_header(struct pci_dev *dev) static void __devinit quirk_fsl_pcie_header(struct pci_dev *dev)
{ {
u8 progif; u8 progif;

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@ -104,7 +104,7 @@ subsys_initcall(mv64x60_sysfs_init);
#endif /* CONFIG_SYSFS */ #endif /* CONFIG_SYSFS */
static void __init mv64x60_pci_fixup_early(struct pci_dev *dev) static void __devinit mv64x60_pci_fixup_early(struct pci_dev *dev)
{ {
/* /*
* Set the host bridge hdr_type to an invalid value so that * Set the host bridge hdr_type to an invalid value so that

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@ -28,7 +28,7 @@
#include <asm/irq.h> #include <asm/irq.h>
#include <mach/pci.h> #include <mach/pci.h>
static void __init gapspci_fixup_resources(struct pci_dev *dev) static void __devinit gapspci_fixup_resources(struct pci_dev *dev)
{ {
struct pci_channel *p = dev->sysdata; struct pci_channel *p = dev->sysdata;

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@ -512,7 +512,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
#if defined(CONFIG_PCI) && defined(CONFIG_NUMA) #if defined(CONFIG_PCI) && defined(CONFIG_NUMA)
/* Set correct numa_node information for AMD NB functions */ /* Set correct numa_node information for AMD NB functions */
static void __init quirk_amd_nb_node(struct pci_dev *dev) static void __devinit quirk_amd_nb_node(struct pci_dev *dev)
{ {
struct pci_dev *nb_ht; struct pci_dev *nb_ht;
unsigned int devfn; unsigned int devfn;

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@ -253,7 +253,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C576, quirk_vsfx)
* workaround applied too * workaround applied too
* [Info kindly provided by ALi] * [Info kindly provided by ALi]
*/ */
static void __init quirk_alimagik(struct pci_dev *dev) static void __devinit quirk_alimagik(struct pci_dev *dev)
{ {
if ((pci_pci_problems&PCIPCI_ALIMAGIK)==0) { if ((pci_pci_problems&PCIPCI_ALIMAGIK)==0) {
dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n"); dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n");
@ -789,7 +789,7 @@ static void __devinit quirk_amd_ioapic(struct pci_dev *dev)
} }
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410, quirk_amd_ioapic); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410, quirk_amd_ioapic);
static void __init quirk_ioapic_rmw(struct pci_dev *dev) static void __devinit quirk_ioapic_rmw(struct pci_dev *dev)
{ {
if (dev->devfn == 0 && dev->bus->number == 0) if (dev->devfn == 0 && dev->bus->number == 0)
sis_apic_bug = 1; sis_apic_bug = 1;
@ -801,7 +801,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_ANY_ID, quirk_ioapic_rmw);
* Some settings of MMRBC can lead to data corruption so block changes. * Some settings of MMRBC can lead to data corruption so block changes.
* See AMD 8131 HyperTransport PCI-X Tunnel Revision Guide * See AMD 8131 HyperTransport PCI-X Tunnel Revision Guide
*/ */
static void __init quirk_amd_8131_mmrbc(struct pci_dev *dev) static void __devinit quirk_amd_8131_mmrbc(struct pci_dev *dev)
{ {
if (dev->subordinate && dev->revision <= 0x12) { if (dev->subordinate && dev->revision <= 0x12) {
dev_info(&dev->dev, "AMD8131 rev %x detected; " dev_info(&dev->dev, "AMD8131 rev %x detected; "
@ -1082,7 +1082,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB
/* /*
* Intel 82801CAM ICH3-M datasheet says IDE modes must be the same * Intel 82801CAM ICH3-M datasheet says IDE modes must be the same
*/ */
static void __init quirk_ide_samemode(struct pci_dev *pdev) static void __devinit quirk_ide_samemode(struct pci_dev *pdev)
{ {
u8 prog; u8 prog;
@ -1121,7 +1121,7 @@ DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_VIA, PCI_ANY_ID,
/* This was originally an Alpha specific thing, but it really fits here. /* This was originally an Alpha specific thing, but it really fits here.
* The i82375 PCI/EISA bridge appears as non-classified. Fix that. * The i82375 PCI/EISA bridge appears as non-classified. Fix that.
*/ */
static void __init quirk_eisa_bridge(struct pci_dev *dev) static void __devinit quirk_eisa_bridge(struct pci_dev *dev)
{ {
dev->class = PCI_CLASS_BRIDGE_EISA << 8; dev->class = PCI_CLASS_BRIDGE_EISA << 8;
} }
@ -1155,7 +1155,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82375, quirk_e
*/ */
static int asus_hides_smbus; static int asus_hides_smbus;
static void __init asus_hides_smbus_hostbridge(struct pci_dev *dev) static void __devinit asus_hides_smbus_hostbridge(struct pci_dev *dev)
{ {
if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_ASUSTEK)) { if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_ASUSTEK)) {
if (dev->device == PCI_DEVICE_ID_INTEL_82845_HB) if (dev->device == PCI_DEVICE_ID_INTEL_82845_HB)
@ -1538,7 +1538,7 @@ DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB3
#endif #endif
#ifdef CONFIG_X86_IO_APIC #ifdef CONFIG_X86_IO_APIC
static void __init quirk_alder_ioapic(struct pci_dev *pdev) static void __devinit quirk_alder_ioapic(struct pci_dev *pdev)
{ {
int i; int i;
@ -1777,7 +1777,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS, qui
* but the PIO transfers won't work if BAR0 falls at the odd 8 bytes. * but the PIO transfers won't work if BAR0 falls at the odd 8 bytes.
* Re-allocate the region if needed... * Re-allocate the region if needed...
*/ */
static void __init quirk_tc86c001_ide(struct pci_dev *dev) static void __devinit quirk_tc86c001_ide(struct pci_dev *dev)
{ {
struct resource *r = &dev->resource[0]; struct resource *r = &dev->resource[0];
@ -2169,7 +2169,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8624, quirk_tile_plx_gen1);
* aware of it. Instead of setting the flag on all busses in the * aware of it. Instead of setting the flag on all busses in the
* machine, simply disable MSI globally. * machine, simply disable MSI globally.
*/ */
static void __init quirk_disable_all_msi(struct pci_dev *dev) static void __devinit quirk_disable_all_msi(struct pci_dev *dev)
{ {
pci_no_msi(); pci_no_msi();
dev_warn(&dev->dev, "MSI quirk detected; MSI disabled\n"); dev_warn(&dev->dev, "MSI quirk detected; MSI disabled\n");

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@ -865,6 +865,11 @@ static void check_section(const char *modname, struct elf_info *elf,
#define ALL_EXIT_TEXT_SECTIONS \ #define ALL_EXIT_TEXT_SECTIONS \
".exit.text$", ".devexit.text$", ".cpuexit.text$", ".memexit.text$" ".exit.text$", ".devexit.text$", ".cpuexit.text$", ".memexit.text$"
#define ALL_PCI_INIT_SECTIONS \
".pci_fixup_early$", ".pci_fixup_header$", ".pci_fixup_final$", \
".pci_fixup_enable$", ".pci_fixup_resume$", \
".pci_fixup_resume_early$", ".pci_fixup_suspend$"
#define ALL_XXXINIT_SECTIONS DEV_INIT_SECTIONS, CPU_INIT_SECTIONS, \ #define ALL_XXXINIT_SECTIONS DEV_INIT_SECTIONS, CPU_INIT_SECTIONS, \
MEM_INIT_SECTIONS MEM_INIT_SECTIONS
#define ALL_XXXEXIT_SECTIONS DEV_EXIT_SECTIONS, CPU_EXIT_SECTIONS, \ #define ALL_XXXEXIT_SECTIONS DEV_EXIT_SECTIONS, CPU_EXIT_SECTIONS, \
@ -1027,6 +1032,12 @@ const struct sectioncheck sectioncheck[] = {
.mismatch = ANY_EXIT_TO_ANY_INIT, .mismatch = ANY_EXIT_TO_ANY_INIT,
.symbol_white_list = { DEFAULT_SYMBOL_WHITE_LIST, NULL }, .symbol_white_list = { DEFAULT_SYMBOL_WHITE_LIST, NULL },
}, },
{
.fromsec = { ALL_PCI_INIT_SECTIONS, NULL },
.tosec = { INIT_SECTIONS, NULL },
.mismatch = ANY_INIT_TO_ANY_EXIT,
.symbol_white_list = { NULL },
},
/* Do not export init/exit functions or data */ /* Do not export init/exit functions or data */
{ {
.fromsec = { "__ksymtab*", NULL }, .fromsec = { "__ksymtab*", NULL },