forked from Minki/linux
V4L/DVB (7670): pxa-camera: handle FIFO overruns
FIFO overruns are not seldom on PXA camera interface FIFOs. Handle them by dropping the corrupted frame, waiting for the next start-of-frame, and restarting capture. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
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@ -118,6 +118,7 @@ struct pxa_camera_dev {
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unsigned int irq;
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void __iomem *base;
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int channels;
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unsigned int dma_chans[3];
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struct pxacamera_platform_data *pdata;
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@ -398,14 +399,10 @@ static void pxa_videobuf_queue(struct videobuf_queue *vq,
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} else {
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struct pxa_cam_dma *buf_dma;
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struct pxa_cam_dma *act_dma;
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int channels = 1;
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int nents;
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int i;
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if (buf->fmt->fourcc == V4L2_PIX_FMT_YUV422P)
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channels = 3;
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for (i = 0; i < channels; i++) {
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for (i = 0; i < pcdev->channels; i++) {
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buf_dma = &buf->dmas[i];
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act_dma = &active->dmas[i];
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nents = buf_dma->sglen;
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@ -445,20 +442,6 @@ static void pxa_videobuf_queue(struct videobuf_queue *vq,
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DCSR(pcdev->dma_chans[i]) = DCSR_RUN;
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}
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#ifdef DEBUG
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if (CISR & (CISR_IFO_0 | CISR_IFO_1 | CISR_IFO_2)) {
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dev_warn(pcdev->dev, "FIFO overrun\n");
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for (i = 0; i < channels; i++)
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DDADR(pcdev->dma_chans[i]) =
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pcdev->active->dmas[i].sg_dma;
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CICR0 &= ~CICR0_ENB;
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CIFR |= CIFR_RESET_F;
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for (i = 0; i < channels; i++)
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DCSR(pcdev->dma_chans[i]) = DCSR_RUN;
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CICR0 |= CICR0_ENB;
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}
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#endif
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}
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spin_unlock_irqrestore(&pcdev->lock, flags);
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@ -522,7 +505,7 @@ static void pxa_camera_dma_irq(int channel, struct pxa_camera_dev *pcdev,
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{
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struct pxa_buffer *buf;
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unsigned long flags;
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unsigned int status;
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u32 status, camera_status, overrun;
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struct videobuf_buffer *vb;
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spin_lock_irqsave(&pcdev->lock, flags);
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@ -546,6 +529,25 @@ static void pxa_camera_dma_irq(int channel, struct pxa_camera_dev *pcdev,
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goto out;
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}
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camera_status = CISR;
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overrun = CISR_IFO_0;
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if (pcdev->channels == 3)
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overrun |= CISR_IFO_1 | CISR_IFO_2;
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if (camera_status & overrun) {
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dev_dbg(pcdev->dev, "FIFO overrun! CISR: %x\n", camera_status);
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/* Stop the Capture Interface */
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CICR0 &= ~CICR0_ENB;
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/* Stop DMA */
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DCSR(channel) = 0;
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/* Reset the FIFOs */
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CIFR |= CIFR_RESET_F;
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/* Enable End-Of-Frame Interrupt */
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CICR0 &= ~CICR0_EOFM;
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/* Restart the Capture Interface */
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CICR0 |= CICR0_ENB;
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goto out;
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}
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vb = &pcdev->active->vb;
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buf = container_of(vb, struct pxa_buffer, vb);
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WARN_ON(buf->inwork || list_empty(&vb->queue));
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@ -670,7 +672,21 @@ static irqreturn_t pxa_camera_irq(int irq, void *data)
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dev_dbg(pcdev->dev, "Camera interrupt status 0x%x\n", status);
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if (!status)
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return IRQ_NONE;
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CISR = status;
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if (status & CISR_EOF) {
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int i;
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for (i = 0; i < pcdev->channels; i++) {
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DDADR(pcdev->dma_chans[i]) =
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pcdev->active->dmas[i].sg_dma;
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DCSR(pcdev->dma_chans[i]) = DCSR_RUN;
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}
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CICR0 |= CICR0_EOFM;
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}
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return IRQ_HANDLED;
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}
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@ -785,6 +801,8 @@ static int pxa_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
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if (!common_flags)
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return -EINVAL;
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pcdev->channels = 1;
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/* Make choises, based on platform preferences */
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if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) &&
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(common_flags & SOCAM_HSYNC_ACTIVE_LOW)) {
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@ -855,6 +873,7 @@ static int pxa_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
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switch (pixfmt) {
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case V4L2_PIX_FMT_YUV422P:
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pcdev->channels = 3;
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cicr1 |= CICR1_YCBCR_F;
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case V4L2_PIX_FMT_YUYV:
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cicr1 |= CICR1_COLOR_SP_VAL(2);
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