forked from Minki/linux
ARM: 7059/1: LPAE: Use PMD_(SHIFT|SIZE|MASK) instead of PGDIR_*
PGDIR_SHIFT and PMD_SHIFT for the classic 2-level page table format have the same value (21). This patch converts the PGDIR_* uses in the kernel to the PMD_* equivalent so that LPAE builds can reuse the same code. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Catalin Marinas
Russell King
parent
01f461a3a4
commit
e73fc88e19
@ -21,6 +21,7 @@
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#include <asm/memory.h>
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#include <asm/thread_info.h>
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#include <asm/system.h>
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#include <asm/pgtable.h>
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#ifdef CONFIG_DEBUG_LL
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#include <mach/debug-macro.S>
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@ -38,11 +39,14 @@
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#error KERNEL_RAM_VADDR must start at 0xXXXX8000
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#endif
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#define PG_DIR_SIZE 0x4000
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#define PMD_ORDER 2
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.globl swapper_pg_dir
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.equ swapper_pg_dir, KERNEL_RAM_VADDR - 0x4000
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.equ swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE
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.macro pgtbl, rd, phys
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add \rd, \phys, #TEXT_OFFSET - 0x4000
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add \rd, \phys, #TEXT_OFFSET - PG_DIR_SIZE
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.endm
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#ifdef CONFIG_XIP_KERNEL
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@ -148,11 +152,11 @@ __create_page_tables:
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pgtbl r4, r8 @ page table address
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/*
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* Clear the 16K level 1 swapper page table
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* Clear the swapper page table
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*/
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mov r0, r4
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mov r3, #0
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add r6, r0, #0x4000
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add r6, r0, #PG_DIR_SIZE
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1: str r3, [r0], #4
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str r3, [r0], #4
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str r3, [r0], #4
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@ -171,30 +175,30 @@ __create_page_tables:
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sub r0, r0, r3 @ virt->phys offset
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add r5, r5, r0 @ phys __enable_mmu
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add r6, r6, r0 @ phys __enable_mmu_end
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mov r5, r5, lsr #20
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mov r6, r6, lsr #20
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mov r5, r5, lsr #SECTION_SHIFT
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mov r6, r6, lsr #SECTION_SHIFT
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1: orr r3, r7, r5, lsl #20 @ flags + kernel base
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str r3, [r4, r5, lsl #2] @ identity mapping
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teq r5, r6
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addne r5, r5, #1 @ next section
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bne 1b
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1: orr r3, r7, r5, lsl #SECTION_SHIFT @ flags + kernel base
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str r3, [r4, r5, lsl #PMD_ORDER] @ identity mapping
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cmp r5, r6
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addlo r5, r5, #1 @ next section
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blo 1b
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/*
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* Now setup the pagetables for our kernel direct
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* mapped region.
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*/
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mov r3, pc
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mov r3, r3, lsr #20
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orr r3, r7, r3, lsl #20
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add r0, r4, #(KERNEL_START & 0xff000000) >> 18
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str r3, [r0, #(KERNEL_START & 0x00f00000) >> 18]!
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mov r3, r3, lsr #SECTION_SHIFT
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orr r3, r7, r3, lsl #SECTION_SHIFT
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add r0, r4, #(KERNEL_START & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER)
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str r3, [r0, #((KERNEL_START & 0x00f00000) >> SECTION_SHIFT) << PMD_ORDER]!
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ldr r6, =(KERNEL_END - 1)
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add r0, r0, #4
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add r6, r4, r6, lsr #18
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add r0, r0, #1 << PMD_ORDER
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add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER)
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1: cmp r0, r6
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add r3, r3, #1 << 20
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strls r3, [r0], #4
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add r3, r3, #1 << SECTION_SHIFT
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strls r3, [r0], #1 << PMD_ORDER
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bls 1b
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#ifdef CONFIG_XIP_KERNEL
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@ -203,11 +207,11 @@ __create_page_tables:
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*/
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add r3, r8, #TEXT_OFFSET
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orr r3, r3, r7
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add r0, r4, #(KERNEL_RAM_VADDR & 0xff000000) >> 18
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str r3, [r0, #(KERNEL_RAM_VADDR & 0x00f00000) >> 18]!
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add r0, r4, #(KERNEL_RAM_VADDR & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER)
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str r3, [r0, #(KERNEL_RAM_VADDR & 0x00f00000) >> (SECTION_SHIFT - PMD_ORDER)]!
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ldr r6, =(_end - 1)
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add r0, r0, #4
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add r6, r4, r6, lsr #18
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add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER)
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1: cmp r0, r6
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add r3, r3, #1 << 20
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strls r3, [r0], #4
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@ -218,12 +222,12 @@ __create_page_tables:
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* Then map boot params address in r2 or
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* the first 1MB of ram if boot params address is not specified.
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*/
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mov r0, r2, lsr #20
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movs r0, r0, lsl #20
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mov r0, r2, lsr #SECTION_SHIFT
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movs r0, r0, lsl #SECTION_SHIFT
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moveq r0, r8
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sub r3, r0, r8
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add r3, r3, #PAGE_OFFSET
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add r3, r4, r3, lsr #18
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add r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER)
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orr r6, r7, r0
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str r6, [r3]
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@ -236,21 +240,21 @@ __create_page_tables:
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*/
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addruart r7, r3
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mov r3, r3, lsr #20
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mov r3, r3, lsl #2
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mov r3, r3, lsr #SECTION_SHIFT
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mov r3, r3, lsl #PMD_ORDER
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add r0, r4, r3
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rsb r3, r3, #0x4000 @ PTRS_PER_PGD*sizeof(long)
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cmp r3, #0x0800 @ limit to 512MB
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movhi r3, #0x0800
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add r6, r0, r3
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mov r3, r7, lsr #20
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mov r3, r7, lsr #SECTION_SHIFT
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ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags
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orr r3, r7, r3, lsl #20
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orr r3, r7, r3, lsl #SECTION_SHIFT
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1: str r3, [r0], #4
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add r3, r3, #1 << 20
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teq r0, r6
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bne 1b
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add r3, r3, #1 << SECTION_SHIFT
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cmp r0, r6
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blo 1b
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#else /* CONFIG_DEBUG_ICEDCC */
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/* we don't need any serial debugging mappings for ICEDCC */
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@ -262,7 +266,7 @@ __create_page_tables:
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* If we're using the NetWinder or CATS, we also need to map
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* in the 16550-type serial port for the debug messages
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*/
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add r0, r4, #0xff000000 >> 18
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add r0, r4, #0xff000000 >> (SECTION_SHIFT - PMD_ORDER)
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orr r3, r7, #0x7c000000
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str r3, [r0]
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#endif
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@ -272,10 +276,10 @@ __create_page_tables:
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* Similar reasons here - for debug. This is
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* only for Acorn RiscPC architectures.
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*/
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add r0, r4, #0x02000000 >> 18
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add r0, r4, #0x02000000 >> (SECTION_SHIFT - PMD_ORDER)
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orr r3, r7, #0x02000000
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str r3, [r0]
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add r0, r4, #0xd8000000 >> 18
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add r0, r4, #0xd8000000 >> (SECTION_SHIFT - PMD_ORDER)
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str r3, [r0]
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#endif
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#endif
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@ -33,7 +33,7 @@
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* recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off.
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*/
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#undef MODULES_VADDR
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#define MODULES_VADDR (((unsigned long)_etext + ~PGDIR_MASK) & PGDIR_MASK)
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#define MODULES_VADDR (((unsigned long)_etext + ~PMD_MASK) & PMD_MASK)
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#endif
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#ifdef CONFIG_MMU
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@ -123,8 +123,8 @@ static void __dma_free_buffer(struct page *page, size_t size)
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#endif
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#define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT)
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#define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT)
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#define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT)
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#define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PMD_SHIFT)
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#define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PMD_SHIFT)
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/*
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* These are the page tables (2MB each) covering uncached, DMA consistent allocations
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@ -183,7 +183,7 @@ static int __init consistent_init(void)
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}
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consistent_pte[i++] = pte;
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base += (1 << PGDIR_SHIFT);
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base += PMD_SIZE;
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} while (base < CONSISTENT_END);
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return ret;
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@ -863,14 +863,14 @@ static inline void prepare_page_table(void)
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/*
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* Clear out all the mappings below the kernel image.
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*/
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for (addr = 0; addr < MODULES_VADDR; addr += PGDIR_SIZE)
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for (addr = 0; addr < MODULES_VADDR; addr += PMD_SIZE)
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pmd_clear(pmd_off_k(addr));
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#ifdef CONFIG_XIP_KERNEL
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/* The XIP kernel is mapped in the module area -- skip over it */
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addr = ((unsigned long)_etext + PGDIR_SIZE - 1) & PGDIR_MASK;
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addr = ((unsigned long)_etext + PMD_SIZE - 1) & PMD_MASK;
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#endif
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for ( ; addr < PAGE_OFFSET; addr += PGDIR_SIZE)
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for ( ; addr < PAGE_OFFSET; addr += PMD_SIZE)
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pmd_clear(pmd_off_k(addr));
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/*
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@ -885,10 +885,12 @@ static inline void prepare_page_table(void)
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* memory bank, up to the end of the vmalloc region.
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*/
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for (addr = __phys_to_virt(end);
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addr < VMALLOC_END; addr += PGDIR_SIZE)
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addr < VMALLOC_END; addr += PMD_SIZE)
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pmd_clear(pmd_off_k(addr));
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}
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#define SWAPPER_PG_DIR_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
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/*
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* Reserve the special regions of memory
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*/
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@ -898,7 +900,7 @@ void __init arm_mm_memblock_reserve(void)
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* Reserve the page tables. These are already in use,
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* and can only be in node 0.
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*/
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memblock_reserve(__pa(swapper_pg_dir), PTRS_PER_PGD * sizeof(pgd_t));
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memblock_reserve(__pa(swapper_pg_dir), SWAPPER_PG_DIR_SIZE);
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#ifdef CONFIG_SA1111
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/*
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@ -926,7 +928,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
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*/
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vectors_page = early_alloc(PAGE_SIZE);
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for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE)
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for (addr = VMALLOC_END; addr; addr += PMD_SIZE)
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pmd_clear(pmd_off_k(addr));
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/*
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