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x86: assign IRQs to HPET timers

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The userspace API for the HPET (see Documentation/hpet.txt) did not work. The
HPET_IE_ON ioctl was failing as there was no IRQ assigned to the timer
device. This patch fixes it by allocating IRQs to timer blocks in the HPET.

arch/x86/kernel/hpet.c |   13 +++++--------
drivers/char/hpet.c    |   45 ++++++++++++++++++++++++++++++++++++++-------
include/linux/hpet.h   |    2 +-
3 files changed, 44 insertions(+), 16 deletions(-)

Signed-off-by: Balaji Rao <balajirrao@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Balaji Rao 2008-01-30 13:30:03 +01:00 committed by Ingo Molnar
parent 45fe4fe191
commit e3f37a54f6
3 changed files with 45 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
arch/x86/kernel/hpet.c
View File

@ -117,8 +117,7 @@ int is_hpet_enabled(void)
static void hpet_reserve_platform_timers(unsigned long id)
{
struct hpet __iomem *hpet = hpet_virt_address;
struct hpet_timer __iomem *timer = &hpet->hpet_timers[2];
unsigned int nrtimers, i;
unsigned int nrtimers;
struct hpet_data hd;
nrtimers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
@ -133,16 +132,14 @@ static void hpet_reserve_platform_timers(unsigned long id)
#ifdef CONFIG_HPET_EMULATE_RTC
hpet_reserve_timer(&hd, 1);
#endif
hd.hd_irq[0] = HPET_LEGACY_8254;
hd.hd_irq[1] = HPET_LEGACY_RTC;
for (i = 2; i < nrtimers; timer++, i++)
hd.hd_irq[i] = (timer->hpet_config & Tn_INT_ROUTE_CNF_MASK) >>
Tn_INT_ROUTE_CNF_SHIFT;
/*
* IRQs for the other timers are assigned dynamically
* in hpet_alloc
*/
hpet_alloc(&hd);
}
#else
static void hpet_reserve_platform_timers(unsigned long id) { }

47
drivers/char/hpet.c
View File

@ -806,14 +806,14 @@ static unsigned long hpet_calibrate(struct hpets *hpetp)
int hpet_alloc(struct hpet_data *hdp)
{
u64 cap, mcfg;
u64 cap, mcfg, hpet_config;
struct hpet_dev *devp;
u32 i, ntimer;
u32 i, ntimer, irq;
struct hpets *hpetp;
size_t siz;
struct hpet __iomem *hpet;
static struct hpets *last = NULL;
unsigned long period;
unsigned long period, irq_bitmap;
unsigned long long temp;
/*
@ -840,12 +840,42 @@ int hpet_alloc(struct hpet_data *hdp)
hpetp->hp_hpet_phys = hdp->hd_phys_address;
hpetp->hp_ntimer = hdp->hd_nirqs;
for (i = 0; i < hdp->hd_nirqs; i++)
hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
hpet = hpetp->hp_hpet;
/* Assign IRQs statically for legacy devices */
hpetp->hp_dev[0].hd_hdwirq = hdp->hd_irq[0];
hpetp->hp_dev[1].hd_hdwirq = hdp->hd_irq[1];
/* Assign IRQs dynamically for the others */
for (i = 2, devp = &hpetp->hp_dev[2]; i < hdp->hd_nirqs; i++, devp++) {
struct hpet_timer __iomem *timer;
timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
hpet_config = readq(&timer->hpet_config);
irq_bitmap = (hpet_config & Tn_INT_ROUTE_CAP_MASK)
>> Tn_INT_ROUTE_CAP_SHIFT;
if (!irq_bitmap)
irq = 0; /* No valid IRQ Assignable */
else {
irq = find_first_bit(&irq_bitmap, 32);
do {
hpet_config |= irq << Tn_INT_ROUTE_CNF_SHIFT;
writeq(hpet_config, &timer->hpet_config);
/*
* Verify whether we have written a valid
* IRQ number by reading it back again
*/
hpet_config = readq(&timer->hpet_config);
if (irq == (hpet_config & Tn_INT_ROUTE_CNF_MASK)
>> Tn_INT_ROUTE_CNF_SHIFT)
break; /* Success */
} while ((irq = (find_next_bit(&irq_bitmap, 32, irq))));
}
hpetp->hp_dev[i].hd_hdwirq = irq;
}
cap = readq(&hpet->hpet_cap);
ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
@ -875,7 +905,8 @@ int hpet_alloc(struct hpet_data *hdp)
hpetp->hp_which, hdp->hd_phys_address,
hpetp->hp_ntimer > 1 ? "s" : "");
for (i = 0; i < hpetp->hp_ntimer; i++)
printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
printk("%s %d", i > 0 ? "," : "",
hpetp->hp_dev[i].hd_hdwirq);
printk("\n");
printk(KERN_INFO "hpet%u: %u %d-bit timers, %Lu Hz\n",

2
include/linux/hpet.h
View File

@ -64,7 +64,7 @@ struct hpet {
*/
#define Tn_INT_ROUTE_CAP_MASK (0xffffffff00000000ULL)
#define Tn_INI_ROUTE_CAP_SHIFT (32UL)
#define Tn_INT_ROUTE_CAP_SHIFT (32UL)
#define Tn_FSB_INT_DELCAP_MASK (0x8000UL)
#define Tn_FSB_INT_DELCAP_SHIFT (15)
#define Tn_FSB_EN_CNF_MASK (0x4000UL)