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MIPS: Loongson1: Remove several redundant RTC-related macros

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Move the RTC-related macros to regs-rtc.h.

Signed-off-by: Yang Ling <gnaygnil@gmail.com>
Cc: keguang.zhang@gmail.com
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14642/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Yang Ling 2016-12-04 22:57:03 +08:00 committed by Ralf Baechle
parent 3ae34beb5e
commit e31e4505b2
3 changed files with 38 additions and 19 deletions
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1
arch/mips/include/asm/mach-loongson32/loongson1.h
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@ -52,6 +52,7 @@
#include <regs-clk.h>
#include <regs-mux.h>
#include <regs-pwm.h>
#include <regs-rtc.h>
#include <regs-wdt.h>
#endif /* __ASM_MACH_LOONGSON32_LOONGSON1_H */

23
arch/mips/include/asm/mach-loongson32/regs-rtc.h Normal file
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@ -0,0 +1,23 @@
/*
* Copyright (c) 2016 Yang Ling <gnaygnil@gmail.com>
*
* Loongson 1 RTC timer Register Definitions.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __ASM_MACH_LOONGSON32_REGS_RTC_H
#define __ASM_MACH_LOONGSON32_REGS_RTC_H
#define LS1X_RTC_REG(x) \
((void __iomem *)KSEG1ADDR(LS1X_RTC_BASE + (x)))
#define LS1X_RTC_CTRL LS1X_RTC_REG(0x40)
#define RTC_EXTCLK_OK (BIT(5) | BIT(8))
#define RTC_EXTCLK_EN BIT(8)
#endif /* __ASM_MACH_LOONGSON32_REGS_RTC_H */

21
arch/mips/loongson32/common/platform.c
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@ -23,10 +23,6 @@
#include <dma.h>
#include <nand.h>
#define LS1X_RTC_CTRL ((void __iomem *)KSEG1ADDR(LS1X_RTC_BASE + 0x40))
#define RTC_EXTCLK_OK (BIT(5) | BIT(8))
#define RTC_EXTCLK_EN BIT(8)
/* 8250/16550 compatible UART */
#define LS1X_UART(_id) \
{ \
@ -70,15 +66,6 @@ void __init ls1x_serial_set_uartclk(struct platform_device *pdev)
p->uartclk = clk_get_rate(clk);
}
void __init ls1x_rtc_set_extclk(struct platform_device *pdev)
{
u32 val;
val = __raw_readl(LS1X_RTC_CTRL);
if (!(val & RTC_EXTCLK_OK))
__raw_writel(val | RTC_EXTCLK_EN, LS1X_RTC_CTRL);
}
/* CPUFreq */
static struct plat_ls1x_cpufreq ls1x_cpufreq_pdata = {
.clk_name = "cpu_clk",
@ -357,6 +344,14 @@ struct platform_device ls1x_ehci_pdev = {
};
/* Real Time Clock */
void __init ls1x_rtc_set_extclk(struct platform_device *pdev)
{
u32 val = __raw_readl(LS1X_RTC_CTRL);
if (!(val & RTC_EXTCLK_OK))
__raw_writel(val | RTC_EXTCLK_EN, LS1X_RTC_CTRL);
}
struct platform_device ls1x_rtc_pdev = {
.name = "ls1x-rtc",
.id = -1,