Merge branches 'pci/host-keystone', 'pci/host-tegra', 'pci/host-xgene' and 'pci/host-xilinx' into next

* pci/host-keystone:
  PCI: keystone: Fix misspelling of current function in debug output

* pci/host-tegra:
  PCI: tegra: Remove unnecessary tegra_pcie_fixup_bridge()

* pci/host-xgene:
  PCI: xgene: Include clk.h instead of clk-private.h

* pci/host-xilinx:
  PCI: xilinx: Fix harmless format string warning
This commit is contained in:
Bjorn Helgaas 2015-01-27 15:34:04 -06:00
3 changed files with 4 additions and 4 deletions

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@ -119,7 +119,7 @@ static void ks_pcie_msi_irq_handler(unsigned int irq, struct irq_desc *desc)
struct pcie_port *pp = &ks_pcie->pp;
struct irq_chip *chip = irq_desc_get_chip(desc);
dev_dbg(pp->dev, "ks_pci_msi_irq_handler, irq %d\n", irq);
dev_dbg(pp->dev, "%s, irq %d\n", __func__, irq);
/*
* The chained irq handler installation would have replaced normal

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@ -16,7 +16,7 @@
* GNU General Public License for more details.
*
*/
#include <linux/clk-private.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/jiffies.h>

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@ -148,10 +148,10 @@ static inline bool xilinx_pcie_link_is_up(struct xilinx_pcie_port *port)
*/
static void xilinx_pcie_clear_err_interrupts(struct xilinx_pcie_port *port)
{
u32 val = pcie_read(port, XILINX_PCIE_REG_RPEFR);
unsigned long val = pcie_read(port, XILINX_PCIE_REG_RPEFR);
if (val & XILINX_PCIE_RPEFR_ERR_VALID) {
dev_dbg(port->dev, "Requester ID %d\n",
dev_dbg(port->dev, "Requester ID %lu\n",
val & XILINX_PCIE_RPEFR_REQ_ID);
pcie_write(port, XILINX_PCIE_RPEFR_ALL_MASK,
XILINX_PCIE_REG_RPEFR);