forked from Minki/linux
Merge branch 'davinci-i2c' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci into for-2636/i2c/davinci
This commit is contained in:
Ben Dooks
commit
e126613e67
@ -36,14 +36,16 @@
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/cpufreq.h>
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#include <linux/gpio.h>
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#include <mach/hardware.h>
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#include <mach/i2c.h>
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/* ----- global defines ----------------------------------------------- */
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#define DAVINCI_I2C_TIMEOUT (1*HZ)
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#define DAVINCI_I2C_MAX_TRIES 2
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#define I2C_DAVINCI_INTR_ALL (DAVINCI_I2C_IMR_AAS | \
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DAVINCI_I2C_IMR_SCD | \
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DAVINCI_I2C_IMR_ARDY | \
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@ -72,37 +74,29 @@
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#define DAVINCI_I2C_IVR_NACK 0x02
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#define DAVINCI_I2C_IVR_AL 0x01
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#define DAVINCI_I2C_STR_BB (1 << 12)
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#define DAVINCI_I2C_STR_RSFULL (1 << 11)
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#define DAVINCI_I2C_STR_SCD (1 << 5)
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#define DAVINCI_I2C_STR_ARDY (1 << 2)
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#define DAVINCI_I2C_STR_NACK (1 << 1)
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#define DAVINCI_I2C_STR_AL (1 << 0)
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#define DAVINCI_I2C_STR_BB BIT(12)
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#define DAVINCI_I2C_STR_RSFULL BIT(11)
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#define DAVINCI_I2C_STR_SCD BIT(5)
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#define DAVINCI_I2C_STR_ARDY BIT(2)
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#define DAVINCI_I2C_STR_NACK BIT(1)
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#define DAVINCI_I2C_STR_AL BIT(0)
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#define DAVINCI_I2C_MDR_NACK (1 << 15)
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#define DAVINCI_I2C_MDR_STT (1 << 13)
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#define DAVINCI_I2C_MDR_STP (1 << 11)
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#define DAVINCI_I2C_MDR_MST (1 << 10)
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#define DAVINCI_I2C_MDR_TRX (1 << 9)
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#define DAVINCI_I2C_MDR_XA (1 << 8)
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#define DAVINCI_I2C_MDR_RM (1 << 7)
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#define DAVINCI_I2C_MDR_IRS (1 << 5)
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#define DAVINCI_I2C_MDR_NACK BIT(15)
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#define DAVINCI_I2C_MDR_STT BIT(13)
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#define DAVINCI_I2C_MDR_STP BIT(11)
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#define DAVINCI_I2C_MDR_MST BIT(10)
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#define DAVINCI_I2C_MDR_TRX BIT(9)
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#define DAVINCI_I2C_MDR_XA BIT(8)
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#define DAVINCI_I2C_MDR_RM BIT(7)
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#define DAVINCI_I2C_MDR_IRS BIT(5)
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#define DAVINCI_I2C_IMR_AAS (1 << 6)
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#define DAVINCI_I2C_IMR_SCD (1 << 5)
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#define DAVINCI_I2C_IMR_XRDY (1 << 4)
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#define DAVINCI_I2C_IMR_RRDY (1 << 3)
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#define DAVINCI_I2C_IMR_ARDY (1 << 2)
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#define DAVINCI_I2C_IMR_NACK (1 << 1)
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#define DAVINCI_I2C_IMR_AL (1 << 0)
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#define MOD_REG_BIT(val, mask, set) do { \
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if (set) { \
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val |= mask; \
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} else { \
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val &= ~mask; \
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} \
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} while (0)
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#define DAVINCI_I2C_IMR_AAS BIT(6)
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#define DAVINCI_I2C_IMR_SCD BIT(5)
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#define DAVINCI_I2C_IMR_XRDY BIT(4)
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#define DAVINCI_I2C_IMR_RRDY BIT(3)
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#define DAVINCI_I2C_IMR_ARDY BIT(2)
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#define DAVINCI_I2C_IMR_NACK BIT(1)
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#define DAVINCI_I2C_IMR_AL BIT(0)
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struct davinci_i2c_dev {
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struct device *dev;
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@ -113,8 +107,13 @@ struct davinci_i2c_dev {
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u8 *buf;
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size_t buf_len;
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int irq;
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int stop;
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u8 terminate;
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struct i2c_adapter adapter;
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#ifdef CONFIG_CPU_FREQ
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struct completion xfr_complete;
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struct notifier_block freq_transition;
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#endif
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};
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/* default platform data to use if not supplied in the platform_device */
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@ -134,12 +133,59 @@ static inline u16 davinci_i2c_read_reg(struct davinci_i2c_dev *i2c_dev, int reg)
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return __raw_readw(i2c_dev->base + reg);
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}
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/*
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* This functions configures I2C and brings I2C out of reset.
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* This function is called during I2C init function. This function
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* also gets called if I2C encounters any errors.
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/* Generate a pulse on the i2c clock pin. */
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static void generic_i2c_clock_pulse(unsigned int scl_pin)
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{
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u16 i;
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if (scl_pin) {
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/* Send high and low on the SCL line */
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for (i = 0; i < 9; i++) {
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gpio_set_value(scl_pin, 0);
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udelay(20);
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gpio_set_value(scl_pin, 1);
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udelay(20);
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}
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}
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}
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/* This routine does i2c bus recovery as specified in the
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* i2c protocol Rev. 03 section 3.16 titled "Bus clear"
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*/
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static int i2c_davinci_init(struct davinci_i2c_dev *dev)
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static void i2c_recover_bus(struct davinci_i2c_dev *dev)
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{
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u32 flag = 0;
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struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
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dev_err(dev->dev, "initiating i2c bus recovery\n");
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/* Send NACK to the slave */
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flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
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flag |= DAVINCI_I2C_MDR_NACK;
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/* write the data into mode register */
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davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
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if (pdata)
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generic_i2c_clock_pulse(pdata->scl_pin);
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/* Send STOP */
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flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
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flag |= DAVINCI_I2C_MDR_STP;
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davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
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}
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static inline void davinci_i2c_reset_ctrl(struct davinci_i2c_dev *i2c_dev,
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int val)
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{
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u16 w;
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w = davinci_i2c_read_reg(i2c_dev, DAVINCI_I2C_MDR_REG);
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if (!val) /* put I2C into reset */
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w &= ~DAVINCI_I2C_MDR_IRS;
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else /* take I2C out of reset */
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w |= DAVINCI_I2C_MDR_IRS;
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davinci_i2c_write_reg(i2c_dev, DAVINCI_I2C_MDR_REG, w);
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}
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static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev)
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{
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struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
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u16 psc;
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@ -148,15 +194,6 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev)
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u32 clkh;
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u32 clkl;
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u32 input_clock = clk_get_rate(dev->clk);
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u16 w;
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if (!pdata)
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pdata = &davinci_i2c_platform_data_default;
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/* put I2C into reset */
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w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
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MOD_REG_BIT(w, DAVINCI_I2C_MDR_IRS, 0);
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davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
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/* NOTE: I2C Clock divider programming info
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* As per I2C specs the following formulas provide prescaler
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@ -188,12 +225,32 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev)
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davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKH_REG, clkh);
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davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKL_REG, clkl);
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dev_dbg(dev->dev, "input_clock = %d, CLK = %d\n", input_clock, clk);
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}
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/*
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* This function configures I2C and brings I2C out of reset.
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* This function is called during I2C init function. This function
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* also gets called if I2C encounters any errors.
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*/
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static int i2c_davinci_init(struct davinci_i2c_dev *dev)
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{
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struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
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if (!pdata)
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pdata = &davinci_i2c_platform_data_default;
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/* put I2C into reset */
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davinci_i2c_reset_ctrl(dev, 0);
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/* compute clock dividers */
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i2c_davinci_calc_clk_dividers(dev);
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/* Respond at reserved "SMBus Host" slave address" (and zero);
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* we seem to have no option to not respond...
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*/
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davinci_i2c_write_reg(dev, DAVINCI_I2C_OAR_REG, 0x08);
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dev_dbg(dev->dev, "input_clock = %d, CLK = %d\n", input_clock, clk);
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dev_dbg(dev->dev, "PSC = %d\n",
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davinci_i2c_read_reg(dev, DAVINCI_I2C_PSC_REG));
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dev_dbg(dev->dev, "CLKL = %d\n",
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@ -204,9 +261,7 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev)
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pdata->bus_freq, pdata->bus_delay);
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/* Take the I2C module out of reset: */
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w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
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MOD_REG_BIT(w, DAVINCI_I2C_MDR_IRS, 1);
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davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
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davinci_i2c_reset_ctrl(dev, 1);
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/* Enable interrupts */
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davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, I2C_DAVINCI_INTR_ALL);
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@ -221,14 +276,22 @@ static int i2c_davinci_wait_bus_not_busy(struct davinci_i2c_dev *dev,
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char allow_sleep)
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{
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unsigned long timeout;
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static u16 to_cnt;
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timeout = jiffies + dev->adapter.timeout;
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while (davinci_i2c_read_reg(dev, DAVINCI_I2C_STR_REG)
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& DAVINCI_I2C_STR_BB) {
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if (time_after(jiffies, timeout)) {
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dev_warn(dev->dev,
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"timeout waiting for bus ready\n");
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return -ETIMEDOUT;
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if (to_cnt <= DAVINCI_I2C_MAX_TRIES) {
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if (time_after(jiffies, timeout)) {
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dev_warn(dev->dev,
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"timeout waiting for bus ready\n");
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to_cnt++;
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return -ETIMEDOUT;
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} else {
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to_cnt = 0;
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i2c_recover_bus(dev);
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i2c_davinci_init(dev);
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}
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}
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if (allow_sleep)
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schedule_timeout(1);
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@ -250,9 +313,6 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
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u16 w;
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int r;
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if (msg->len == 0)
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return -EINVAL;
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if (!pdata)
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pdata = &davinci_i2c_platform_data_default;
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/* Introduce a delay, required for some boards (e.g Davinci EVM) */
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@ -264,6 +324,7 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
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dev->buf = msg->buf;
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dev->buf_len = msg->len;
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dev->stop = stop;
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davinci_i2c_write_reg(dev, DAVINCI_I2C_CNT_REG, dev->buf_len);
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@ -281,23 +342,40 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
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flag |= DAVINCI_I2C_MDR_TRX;
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if (stop)
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flag |= DAVINCI_I2C_MDR_STP;
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if (msg->len == 0) {
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flag |= DAVINCI_I2C_MDR_RM;
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flag &= ~DAVINCI_I2C_MDR_STP;
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}
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/* Enable receive or transmit interrupts */
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w = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG);
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if (msg->flags & I2C_M_RD)
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MOD_REG_BIT(w, DAVINCI_I2C_IMR_RRDY, 1);
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w |= DAVINCI_I2C_IMR_RRDY;
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else
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MOD_REG_BIT(w, DAVINCI_I2C_IMR_XRDY, 1);
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w |= DAVINCI_I2C_IMR_XRDY;
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davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, w);
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dev->terminate = 0;
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/* write the data into mode register */
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davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
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/*
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* First byte should be set here, not after interrupt,
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* because transmit-data-ready interrupt can come before
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* NACK-interrupt during sending of previous message and
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* ICDXR may have wrong data
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*/
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if ((!(msg->flags & I2C_M_RD)) && dev->buf_len) {
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davinci_i2c_write_reg(dev, DAVINCI_I2C_DXR_REG, *dev->buf++);
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dev->buf_len--;
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}
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r = wait_for_completion_interruptible_timeout(&dev->cmd_complete,
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dev->adapter.timeout);
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if (r == 0) {
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dev_err(dev->dev, "controller timed out\n");
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i2c_recover_bus(dev);
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i2c_davinci_init(dev);
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dev->buf_len = 0;
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return -ETIMEDOUT;
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@ -334,7 +412,7 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
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return msg->len;
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if (stop) {
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w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
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MOD_REG_BIT(w, DAVINCI_I2C_MDR_STP, 1);
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w |= DAVINCI_I2C_MDR_STP;
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davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
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}
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return -EREMOTEIO;
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@ -367,12 +445,17 @@ i2c_davinci_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
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if (ret < 0)
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return ret;
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}
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#ifdef CONFIG_CPU_FREQ
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complete(&dev->xfr_complete);
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#endif
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return num;
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}
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static u32 i2c_davinci_func(struct i2c_adapter *adap)
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{
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return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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}
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static void terminate_read(struct davinci_i2c_dev *dev)
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@ -431,6 +514,14 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
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case DAVINCI_I2C_IVR_ARDY:
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davinci_i2c_write_reg(dev,
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DAVINCI_I2C_STR_REG, DAVINCI_I2C_STR_ARDY);
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if (((dev->buf_len == 0) && (dev->stop != 0)) ||
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(dev->cmd_err & DAVINCI_I2C_STR_NACK)) {
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w = davinci_i2c_read_reg(dev,
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DAVINCI_I2C_MDR_REG);
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w |= DAVINCI_I2C_MDR_STP;
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davinci_i2c_write_reg(dev,
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DAVINCI_I2C_MDR_REG, w);
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}
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complete(&dev->cmd_complete);
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break;
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@ -462,7 +553,7 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
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w = davinci_i2c_read_reg(dev,
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DAVINCI_I2C_IMR_REG);
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MOD_REG_BIT(w, DAVINCI_I2C_IMR_XRDY, 0);
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w &= ~DAVINCI_I2C_IMR_XRDY;
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davinci_i2c_write_reg(dev,
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DAVINCI_I2C_IMR_REG,
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w);
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@ -491,6 +582,48 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
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return count ? IRQ_HANDLED : IRQ_NONE;
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}
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#ifdef CONFIG_CPU_FREQ
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static int i2c_davinci_cpufreq_transition(struct notifier_block *nb,
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unsigned long val, void *data)
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{
|
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struct davinci_i2c_dev *dev;
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dev = container_of(nb, struct davinci_i2c_dev, freq_transition);
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if (val == CPUFREQ_PRECHANGE) {
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wait_for_completion(&dev->xfr_complete);
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davinci_i2c_reset_ctrl(dev, 0);
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} else if (val == CPUFREQ_POSTCHANGE) {
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i2c_davinci_calc_clk_dividers(dev);
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davinci_i2c_reset_ctrl(dev, 1);
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}
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return 0;
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}
|
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|
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static inline int i2c_davinci_cpufreq_register(struct davinci_i2c_dev *dev)
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{
|
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dev->freq_transition.notifier_call = i2c_davinci_cpufreq_transition;
|
||||
|
||||
return cpufreq_register_notifier(&dev->freq_transition,
|
||||
CPUFREQ_TRANSITION_NOTIFIER);
|
||||
}
|
||||
|
||||
static inline void i2c_davinci_cpufreq_deregister(struct davinci_i2c_dev *dev)
|
||||
{
|
||||
cpufreq_unregister_notifier(&dev->freq_transition,
|
||||
CPUFREQ_TRANSITION_NOTIFIER);
|
||||
}
|
||||
#else
|
||||
static inline int i2c_davinci_cpufreq_register(struct davinci_i2c_dev *dev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void i2c_davinci_cpufreq_deregister(struct davinci_i2c_dev *dev)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
static struct i2c_algorithm i2c_davinci_algo = {
|
||||
.master_xfer = i2c_davinci_xfer,
|
||||
.functionality = i2c_davinci_func,
|
||||
@ -530,6 +663,9 @@ static int davinci_i2c_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
init_completion(&dev->cmd_complete);
|
||||
#ifdef CONFIG_CPU_FREQ
|
||||
init_completion(&dev->xfr_complete);
|
||||
#endif
|
||||
dev->dev = get_device(&pdev->dev);
|
||||
dev->irq = irq->start;
|
||||
platform_set_drvdata(pdev, dev);
|
||||
@ -541,7 +677,12 @@ static int davinci_i2c_probe(struct platform_device *pdev)
|
||||
}
|
||||
clk_enable(dev->clk);
|
||||
|
||||
dev->base = (void __iomem *)IO_ADDRESS(mem->start);
|
||||
dev->base = ioremap(mem->start, resource_size(mem));
|
||||
if (!dev->base) {
|
||||
r = -EBUSY;
|
||||
goto err_mem_ioremap;
|
||||
}
|
||||
|
||||
i2c_davinci_init(dev);
|
||||
|
||||
r = request_irq(dev->irq, i2c_davinci_isr, 0, pdev->name, dev);
|
||||
@ -550,6 +691,12 @@ static int davinci_i2c_probe(struct platform_device *pdev)
|
||||
goto err_unuse_clocks;
|
||||
}
|
||||
|
||||
r = i2c_davinci_cpufreq_register(dev);
|
||||
if (r) {
|
||||
dev_err(&pdev->dev, "failed to register cpufreq\n");
|
||||
goto err_free_irq;
|
||||
}
|
||||
|
||||
adap = &dev->adapter;
|
||||
i2c_set_adapdata(adap, dev);
|
||||
adap->owner = THIS_MODULE;
|
||||
@ -571,6 +718,8 @@ static int davinci_i2c_probe(struct platform_device *pdev)
|
||||
err_free_irq:
|
||||
free_irq(dev->irq, dev);
|
||||
err_unuse_clocks:
|
||||
iounmap(dev->base);
|
||||
err_mem_ioremap:
|
||||
clk_disable(dev->clk);
|
||||
clk_put(dev->clk);
|
||||
dev->clk = NULL;
|
||||
@ -589,6 +738,8 @@ static int davinci_i2c_remove(struct platform_device *pdev)
|
||||
struct davinci_i2c_dev *dev = platform_get_drvdata(pdev);
|
||||
struct resource *mem;
|
||||
|
||||
i2c_davinci_cpufreq_deregister(dev);
|
||||
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
i2c_del_adapter(&dev->adapter);
|
||||
put_device(&pdev->dev);
|
||||
@ -599,6 +750,7 @@ static int davinci_i2c_remove(struct platform_device *pdev)
|
||||
|
||||
davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, 0);
|
||||
free_irq(IRQ_I2C, dev);
|
||||
iounmap(dev->base);
|
||||
kfree(dev);
|
||||
|
||||
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
@ -606,6 +758,41 @@ static int davinci_i2c_remove(struct platform_device *pdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int davinci_i2c_suspend(struct device *dev)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
struct davinci_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
|
||||
|
||||
/* put I2C into reset */
|
||||
davinci_i2c_reset_ctrl(i2c_dev, 0);
|
||||
clk_disable(i2c_dev->clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int davinci_i2c_resume(struct device *dev)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
struct davinci_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
|
||||
|
||||
clk_enable(i2c_dev->clk);
|
||||
/* take I2C out of reset */
|
||||
davinci_i2c_reset_ctrl(i2c_dev, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops davinci_i2c_pm = {
|
||||
.suspend = davinci_i2c_suspend,
|
||||
.resume = davinci_i2c_resume,
|
||||
};
|
||||
|
||||
#define davinci_i2c_pm_ops (&davinci_i2c_pm)
|
||||
#else
|
||||
#define davinci_i2c_pm_ops NULL
|
||||
#endif
|
||||
|
||||
/* work with hotplug and coldplug */
|
||||
MODULE_ALIAS("platform:i2c_davinci");
|
||||
|
||||
@ -615,6 +802,7 @@ static struct platform_driver davinci_i2c_driver = {
|
||||
.driver = {
|
||||
.name = "i2c_davinci",
|
||||
.owner = THIS_MODULE,
|
||||
.pm = davinci_i2c_pm_ops,
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user